int palmas_mmc1_poweron_ldo(uint voltage)
{
u8 val = 0;
#if defined(CONFIG_DRA7XX)
/*
* Currently valid for the dra7xx_evm board:
* Set TPS659038 LDO1 to 3.0 V
*/
val = LDO_VOLT_3V0;
if (palmas_i2c_write_u8(TPS65903X_CHIP_P1, LDO1_VOLTAGE, val)) {
printf("tps65903x: could not set LDO1 voltage.\n");
return 1;
}
/* TURN ON LDO1 */
val = RSC_MODE_SLEEP | RSC_MODE_ACTIVE;
if (palmas_i2c_write_u8(TPS65903X_CHIP_P1, LDO1_CTRL, val)) {
printf("tps65903x: could not turn on LDO1.\n");
return 1;
}
return 0;
#else
/*
* We assume that this is a OMAP543X + TWL603X board:
* Set TWL6035/37 LDO9 to 3.0 V
*/
val = LDO_VOLT_3V0;
return twl603x_mmc1_set_ldo9(val);
#endif
}
/*
* On some OMAP5 + TWL603X hardware the SD card socket and LDO9_IN are
* powered by an external 3.3 V regulator, while the output of LDO9
* supplies VDDS_SDCARD for the OMAP5 interface only. This implies that
* LDO9 could be set to 'bypass' mode when required (e.g. for 3.3 V cards).
*/
int twl603x_mmc1_set_ldo9(u8 vsel)
{
u8 cval = 0, vval = 0; /* Off by default */
int err;
if (vsel) {
/* Turn on */
if (vsel > LDO_VOLT_3V3) {
/* Put LDO9 in bypass */
cval = LDO9_BYP_EN | RSC_MODE_SLEEP | RSC_MODE_ACTIVE;
vval = LDO_VOLT_3V3;
} else {
cval = RSC_MODE_SLEEP | RSC_MODE_ACTIVE;
vval = vsel & 0x3f;
}
}
err = palmas_i2c_write_u8(TWL603X_CHIP_P1, LDO9_VOLTAGE, vval);
if (err) {
printf("twl603x: could not set LDO9 %s: err = %d\n",
vsel > LDO_VOLT_3V3 ? "bypass" : "voltage", err);
return err;
}
err = palmas_i2c_write_u8(TWL603X_CHIP_P1, LDO9_CTRL, cval);
if (err)
printf("twl603x: could not turn %s LDO9: err = %d\n",
cval ? "on" : "off", err);
return err;
}
/*
* Turn audio codec power and 32 kHz clock on/off. Use for
* testing OMAP543X + TWL603X + TWL604X boards only.
*/
int twl603x_audio_power(u8 on)
{
u8 cval = 0, vval = 0, c32k = 0;
int err;
if (on) {
vval = SMPS_VOLT_2V1;
cval = SMPS_MODE_SLP_AUTO | SMPS_MODE_ACT_AUTO;
c32k = RSC_MODE_SLEEP | RSC_MODE_ACTIVE;
}
/* Set SMPS9 to 2.1 V (for TWL604x), or to 0 (off) */
err = palmas_i2c_write_u8(TWL603X_CHIP_P1, SMPS9_VOLTAGE, vval);
if (err) {
printf("twl603x: could not set SMPS9 voltage: err = %d\n",
err);
return err;
}
/* Turn on or off SMPS9 */
err = palmas_i2c_write_u8(TWL603X_CHIP_P1, SMPS9_CTRL, cval);
if (err) {
printf("twl603x: could not turn SMPS9 %s: err = %d\n",
cval ? "on" : "off", err);
return err;
}
/* Output 32 kHz clock on or off */
err = palmas_i2c_write_u8(TWL603X_CHIP_P1, CLK32KGAUDIO_CTRL, c32k);
if (err)
printf("twl603x: could not turn CLK32KGAUDIO %s: err = %d\n",
c32k ? "on" : "off", err);
return err;
}
int lp873x_mmc1_poweron_ldo(uint voltage)
{
if (palmas_i2c_write_u8(LP873X_LDO1_ADDR, LP873X_LDO1_VOLTAGE,
voltage)) {
printf("lp873x: could not set LDO1 voltage.\n");
return 1;
}
/* TURN ON LDO1 */
if (palmas_i2c_write_u8(LP873X_LDO1_ADDR, LP873X_LDO1_CTRL,
LP873X_LDO_CTRL_EN | LP873X_LDO_CTRL_RDIS_EN)) {
printf("lp873x: could not turn on LDO1.\n");
return 1;
}
return 0;
}
int board_late_init(void)
{
char *idk_lcd;
setup_board_eeprom_env();
/*
* DEV_CTRL.DEV_ON = 1 please - else palmas switches off in 8 seconds
* This is the POWERHOLD-in-Low behavior.
*/
palmas_i2c_write_u8(TPS65903X_CHIP_P1, 0xA0, 0x1);
/* TBD: Add LCD panel detection once information is available */
if (am571x_idk_needs_lcd())
idk_lcd = "osd101t2045"; /* Default to legacy LCD */
else
idk_lcd = "no";
setenv("idk_lcd", idk_lcd);
#if !defined(CONFIG_SPL_BUILD)
board_set_ethaddr();
#endif
return 0;
}
int board_init(void)
{
/* Disable PMIC Powerhold feature, DEV_CTRL.DEV_ON = 1 */
palmas_i2c_write_u8(TPS65903X_CHIP_P1, 0xA0, 0x1);
gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
return 0;
}
int board_late_init(void)
{
init_sata(0);
/*
* DEV_CTRL.DEV_ON = 1 please - else palmas switches off in 8 seconds
* This is the POWERHOLD-in-Low behavior.
*/
palmas_i2c_write_u8(TPS65903X_CHIP_P1, 0xA0, 0x1);
return 0;
}
int board_late_init(void)
{
setup_board_eeprom_env();
u8 val;
/*
* DEV_CTRL.DEV_ON = 1 please - else palmas switches off in 8 seconds
* This is the POWERHOLD-in-Low behavior.
*/
palmas_i2c_write_u8(TPS65903X_CHIP_P1, 0xA0, 0x1);
/*
* Default FIT boot on HS devices. Non FIT images are not allowed
* on HS devices.
*/
if (get_device_type() == HS_DEVICE)
env_set("boot_fit", "1");
/*
* Set the GPIO7 Pad to POWERHOLD. This has higher priority
* over DEV_CTRL.DEV_ON bit. This can be reset in case of
* PMIC Power off. So to be on the safer side set it back
* to POWERHOLD mode irrespective of the current state.
*/
palmas_i2c_read_u8(TPS65903X_CHIP_P1, TPS65903X_PRIMARY_SECONDARY_PAD2,
&val);
val = val | TPS65903X_PAD2_POWERHOLD_MASK;
palmas_i2c_write_u8(TPS65903X_CHIP_P1, TPS65903X_PRIMARY_SECONDARY_PAD2,
val);
omap_die_id_serial();
omap_set_fastboot_vars();
am57x_idk_lcd_detect();
#if !defined(CONFIG_SPL_BUILD)
board_ti_set_ethaddr(2);
#endif
return 0;
}
/*
* Enable/disable back-up battery (or super cap) charging on TWL6035/37.
* Please use defined BB_xxx values.
*/
int twl603x_enable_bb_charge(u8 bb_fields)
{
u8 val = bb_fields & 0x0f;
int err;
val |= (VRTC_EN_SLP | VRTC_EN_OFF | VRTC_PWEN);
err = palmas_i2c_write_u8(TWL603X_CHIP_P1, BB_VRTC_CTRL, val);
if (err)
printf("twl603x: could not set BB_VRTC_CTRL to 0x%02x: err = %d\n",
val, err);
return err;
}
int palmas_mmc1_poweron_ldo(void)
{
u8 val = 0;
/* set LDO9 TWL6035 to 3V */
val = 0x2b; /* (3 -.9)*28 +1 */
if (palmas_i2c_write_u8(0x48, LDO9_VOLTAGE, val)) {
printf("twl6035: could not set LDO9 voltage.\n");
return 1;
}
/* TURN ON LDO9 */
val = LDO_ON | LDO_MODE_SLEEP | LDO_MODE_ACTIVE;
if (palmas_i2c_write_u8(0x48, LDO9_CTRL, val)) {
printf("twl6035: could not turn on LDO9.\n");
return 1;
}
return 0;
}
void palmas_init_settings(void)
{
#ifdef CONFIG_PALMAS_SMPS7_FPWM
int err;
/*
* Set SMPS7 (1.8 V I/O supply on platforms with TWL6035/37) to
* forced PWM mode. This reduces noise (but affects efficiency).
*/
u8 val = SMPS_MODE_SLP_FPWM | SMPS_MODE_ACT_FPWM;
err = palmas_i2c_write_u8(TWL603X_CHIP_P1, SMPS7_CTRL, val);
if (err)
printf("palmas: could not force PWM for SMPS7: err = %d\n",
err);
#endif
}
int board_late_init(void)
{
#ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
char *name = "unknown";
if (is_dra72x()) {
if (board_is_dra72x_revc_or_later())
name = "dra72x-revc";
else if (board_is_dra71x_evm())
name = "dra71x";
else
name = "dra72x";
} else if (is_dra76x_abz()) {
name = "dra76x_abz";
} else if (is_dra76x_acd()) {
name = "dra76x_acd";
} else {
name = "dra7xx";
}
set_board_info_env(name);
/*
* Default FIT boot on HS devices. Non FIT images are not allowed
* on HS devices.
*/
if (get_device_type() == HS_DEVICE)
env_set("boot_fit", "1");
omap_die_id_serial();
omap_set_fastboot_vars();
/*
* Hook the LDO1 regulator to EN pin. This applies only to LP8733
* Rest all regulators are hooked to EN Pin at reset.
*/
if (board_is_dra71x_evm())
palmas_i2c_write_u8(LP873X_I2C_SLAVE_ADDR, 0x9, 0x7);
#endif
#if CONFIG_IS_ENABLED(DM_USB) && CONFIG_IS_ENABLED(OF_CONTROL)
if (device_okay("/ocp/omap_dwc3_1@48880000"))
enable_usb_clocks(0);
if (device_okay("/ocp/omap_dwc3_2@488c0000"))
enable_usb_clocks(1);
#endif
return 0;
}
/**
* @brief palmas_enable_ss_ldo - Configure EVM board specific configurations
* for the USB Super speed SMPS10 regulator.
*
* @return 0
*/
int palmas_enable_ss_ldo(void)
{
/* Enable smps10 regulator */
return palmas_i2c_write_u8(TWL603X_CHIP_P1, SMPS10_CTRL,
SMPS10_MODE_ACTIVE_D);
}
int __devinit dwc3_probe(struct platform_device *pdev)
{
struct dwc3 *dwc;
#if !defined(CONFIG_DRA7XX)
u8 vali;
#endif
int ret = -ENOMEM;
void __iomem *regs;
void *mem;
u8 mode;
/* Initialize all the clocks (system clocks/ optional clocks etc) */
/* USB_OTG_SS_CLKSTCTRL */
writel(USB_OTG_SS_OPTFCLKEN_REFCLK960M | USB_OTG_SS_MODULEMODE_HW,
CM_L3INIT_USB_OTG_SS_CLKCTRL);
/* OCP2SCP1 register for PHY register access */
writel(OCP2SCP1_MODULEMODE_HW, CM_L3INIT_OCP2SCP1_CLKCTRL);
/* Turn on 32K AON clk */
writel(USB_PHY_CORE_OPTFCLKEN_CLK32K, CM_COREAON_USB_PHY_CORE_CLKCTRL);
/* Setting CM_L3INIT_CLKSTCTRL to NO sleep */
writel(L3INIT_CLKSTCTRL_NOSLEEP, CM_L3INIT_CLKSTCTRL);
/* Setting USBOTGSS_SYSCONFIG to NO idle */
writel((SYSCONFIG_DMADISABLE | SYSCONFIG_STANDBY_SMART | SYSCONFIG_IDLEMODE),
USBOTGSS_SYSCONFIG);
/* Initialize the wrapper registers */
dwc3_wrapper_init();
mem = kzalloc(sizeof(*dwc) + DWC3_ALIGN_MASK, GFP_KERNEL);
if (!mem) {
dev_err(&pdev->dev, "not enough memory\n");
goto err0;
}
dwc = PTR_ALIGN(mem, DWC3_ALIGN_MASK + 1);
dwc->mem = mem;
global_dwc3 = dwc;
dwc->regs = CONFIG_USB_DWC3_UDC_REGS;
dwc->regs_size = DWC3_USB_REGS_SIZE;
dwc->dev = &pdev->dev;
if (!strncmp("super", maximum_speed, 5))
dwc->maximum_speed = DWC3_DCFG_SUPERSPEED;
else if (!strncmp("high", maximum_speed, 4))
dwc->maximum_speed = DWC3_DCFG_HIGHSPEED;
else if (!strncmp("full", maximum_speed, 4))
dwc->maximum_speed = DWC3_DCFG_FULLSPEED1;
else if (!strncmp("low", maximum_speed, 3))
dwc->maximum_speed = DWC3_DCFG_LOWSPEED;
else
dwc->maximum_speed = DWC3_DCFG_SUPERSPEED;
pm_runtime_enable(&pdev->dev);
pm_runtime_get_sync(&pdev->dev);
pm_runtime_forbid(&pdev->dev);
dwc3_cache_hwparams(dwc);
ret = dwc3_alloc_event_buffers(dwc, DWC3_EVENT_BUFFERS_SIZE);
if (ret) {
dev_err(&pdev->dev, "failed to initialize core\n");
goto err3;
}
omap_usb2_suspend(0);
omap_usb3_suspend(0);
ret = dwc3_core_init(dwc);
if (ret) {
dev_err(dev, "failed to initialize core\n");
goto err0;
}
mode = DWC3_MODE_DEVICE /*DWC3_MODE(dwc->hwparams.hwparams0)*/;
switch (mode) {
case DWC3_MODE_DEVICE:
dwc3_set_mode(dwc, DWC3_GCTL_PRTCAP_DEVICE);
ret = dwc3_gadget_init(dwc);
if (ret) {
dev_err(&pdev->dev, "failed to initialize gadget\n");
goto err4;
}
break;
case DWC3_MODE_HOST:
dwc3_set_mode(dwc, DWC3_GCTL_PRTCAP_HOST);
ret = dwc3_host_init(dwc);
if (ret) {
dev_err(&pdev->dev, "failed to initialize host\n");
goto err4;
}
break;
case DWC3_MODE_DRD:
dwc3_set_mode(dwc, DWC3_GCTL_PRTCAP_OTG);
ret = dwc3_host_init(dwc);
if (ret) {
dev_err(&pdev->dev, "failed to initialize host\n");
goto err4;
}
ret = dwc3_gadget_init(dwc);
if (ret) {
dev_err(&pdev->dev, "failed to initialize gadget\n");
goto err4;
}
break;
default:
dev_err(&pdev->dev, "Unsupported mode of operation %d\n", mode);
goto err4;
}
dwc->mode = mode;
#if !defined(CONFIG_DRA7XX)
/* Enable the VBUS comparator in the palmas chip */
palmas_i2c_read_u8(0x49, 0x1C, &vali);
palmas_i2c_write_u8(0x49, 0x53, 0x1);
/* Wait for the vbus line state interrupt */
do {
palmas_i2c_read_u8(0x49, 0x1C, &vali);
} while (!(vali & 0x80));
#endif
return 0;
err4:
dwc3_core_exit(dwc);
err3:
iounmap(regs);
kfree(dwc->mem);
err0:
return ret;
}
