예제 #1
0
void
JMPfar_pm(UINT16 selector, UINT32 new_ip)
{
    selector_t jmp_sel;
    int rv;

    VERBOSE(("JMPfar_pm: old EIP = %04x:%08x, ESP = %04x:%08x", CPU_CS, CPU_PREV_EIP, CPU_SS, CPU_ESP));
    VERBOSE(("JMPfar_pm: selector = 0x%04x, new_ip = 0x%08x", selector, new_ip));

    rv = parse_selector(&jmp_sel, selector);
    if (rv < 0) {
        VERBOSE(("JMPfar_pm: parse_selector (selector = %04x, rv = %d)", selector, rv));
        EXCEPTION(GP_EXCEPTION, jmp_sel.idx);
    }

    if (jmp_sel.desc.s) {
        VERBOSE(("JMPfar_pm: code or data segment descriptor"));

        /* check segment type */
        if (!jmp_sel.desc.u.seg.c) {
            /* data segment */
            VERBOSE(("JMPfar_pm: data segment"));
            EXCEPTION(GP_EXCEPTION, jmp_sel.idx);
        }

        /* code segment descriptor */
        JMPfar_pm_code_segment(&jmp_sel, new_ip);
    } else {
        /* system descriptor */
        VERBOSE(("JMPfar_pm: system descriptor"));

        switch (jmp_sel.desc.type) {
        case CPU_SYSDESC_TYPE_CALL_16:
        case CPU_SYSDESC_TYPE_CALL_32:
            JMPfar_pm_call_gate(&jmp_sel);
            break;

        case CPU_SYSDESC_TYPE_TASK:
            JMPfar_pm_task_gate(&jmp_sel);
            break;

        case CPU_SYSDESC_TYPE_TSS_16:
        case CPU_SYSDESC_TYPE_TSS_32:
            JMPfar_pm_tss(&jmp_sel);
            break;

        case CPU_SYSDESC_TYPE_TSS_BUSY_16:
        case CPU_SYSDESC_TYPE_TSS_BUSY_32:
            VERBOSE(("JMPfar_pm: task is busy"));
        /*FALLTHROUGH*/
        default:
            VERBOSE(("JMPfar_pm: invalid descriptor type (type = %d)", jmp_sel.desc.type));
            EXCEPTION(GP_EXCEPTION, jmp_sel.idx);
            break;
        }
    }

    VERBOSE(("JMPfar_pm: new EIP = %04x:%08x, ESP = %04x:%08x", CPU_CS, CPU_EIP, CPU_SS, CPU_ESP));
}
예제 #2
0
bool is_selector_only(const char* str)
{
	string enm,snm;
	parse_selector(str, enm, snm);
	if (enm.length() && snm.length() )
		return true;
	return false;
}
예제 #3
0
static test_patch_t*
parse_patch (scanner_t *scanner)
{
	test_patch_t *patch;

	patch = g_new0 (test_patch_t, 1);
	patch->selector = parse_selector (scanner);
	patch->effect = parse_effect (scanner);
	return patch;
}
예제 #4
0
/*---
 * CALLfar_pm: task gate
 */
static void
CALLfar_pm_task_gate(selector_t *taskgate_sel)
{
    selector_t tss_sel;
    int rv;

    VERBOSE(("CALLfar_pm: TASK-GATE"));

    /* check privilege level */
    if (taskgate_sel->desc.dpl < CPU_STAT_CPL) {
        VERBOSE(("CALLfar_pm: DPL(%d) < CPL(%d)", taskgate_sel->desc.dpl, CPU_STAT_CPL));
        EXCEPTION(GP_EXCEPTION, taskgate_sel->idx);
    }
    if (taskgate_sel->desc.dpl < taskgate_sel->rpl) {
        VERBOSE(("CALLfar_pm: DPL(%d) < CPL(%d)", taskgate_sel->desc.dpl, taskgate_sel->rpl));
        EXCEPTION(GP_EXCEPTION, taskgate_sel->idx);
    }

    /* not present */
    if (selector_is_not_present(taskgate_sel)) {
        VERBOSE(("CALLfar_pm: selector is not present"));
        EXCEPTION(NP_EXCEPTION, taskgate_sel->idx);
    }

    /* tss descriptor */
    rv = parse_selector(&tss_sel, taskgate_sel->desc.u.gate.selector);
    if (rv < 0 || tss_sel.ldt) {
        VERBOSE(("CALLfar_pm: parse_selector (selector = %04x, rv = %d, %cDT)", tss_sel.selector, rv, tss_sel.ldt ? 'L' : 'G'));
        EXCEPTION(GP_EXCEPTION, tss_sel.idx);
    }

    /* check descriptor type */
    switch (tss_sel.desc.type) {
    case CPU_SYSDESC_TYPE_TSS_16:
    case CPU_SYSDESC_TYPE_TSS_32:
        break;

    case CPU_SYSDESC_TYPE_TSS_BUSY_16:
    case CPU_SYSDESC_TYPE_TSS_BUSY_32:
        VERBOSE(("CALLfar_pm: task is busy"));
    /*FALLTHROUGH*/
    default:
        VERBOSE(("CALLfar_pm: invalid descriptor type (type = %d)", tss_sel.desc.type));
        EXCEPTION(GP_EXCEPTION, tss_sel.idx);
        break;
    }

    /* not present */
    if (selector_is_not_present(&tss_sel)) {
        VERBOSE(("CALLfar_pm: TSS selector is not present"));
        EXCEPTION(NP_EXCEPTION, tss_sel.idx);
    }

    task_switch(&tss_sel, TASK_SWITCH_CALL);
}
예제 #5
0
파일: exception.c 프로젝트: nmlgc/np2debug
static void CPUCALL
interrupt_task_gate(const descriptor_t *gsdp, int intrtype, int errorp, int error_code)
{
    selector_t task_sel;
    int rv;

    VERBOSE(("interrupt: TASK-GATE"));

    rv = parse_selector(&task_sel, gsdp->u.gate.selector);
    if (rv < 0 || task_sel.ldt || !SEG_IS_SYSTEM(&task_sel.desc)) {
        VERBOSE(("interrupt: parse_selector (selector = %04x, rv = %d, %cDT, type = %s)", gsdp->u.gate.selector, rv, task_sel.ldt ? 'L' : 'G', task_sel.desc.s ? "code/data" : "system"));
        EXCEPTION(TS_EXCEPTION, task_sel.idx);
    }

    /* check gate type */
    switch (task_sel.desc.type) {
    case CPU_SYSDESC_TYPE_TSS_16:
    case CPU_SYSDESC_TYPE_TSS_32:
        break;

    case CPU_SYSDESC_TYPE_TSS_BUSY_16:
    case CPU_SYSDESC_TYPE_TSS_BUSY_32:
        VERBOSE(("interrupt: task is busy."));
    /*FALLTHROUGH*/
    default:
        VERBOSE(("interrupt: invalid gate type (%d)", task_sel.desc.type));
        EXCEPTION(TS_EXCEPTION, task_sel.idx);
        break;
    }

    /* not present */
    if (selector_is_not_present(&task_sel)) {
        VERBOSE(("interrupt: selector is not present"));
        EXCEPTION(NP_EXCEPTION, task_sel.idx);
    }

    task_switch(&task_sel, TASK_SWITCH_INTR);

    CPU_SET_PREV_ESP();

    if (errorp) {
        VERBOSE(("interrupt: push error code (%08x)", error_code));
        if (task_sel.desc.type == CPU_SYSDESC_TYPE_TSS_32) {
            PUSH0_32(error_code);
        } else {
            PUSH0_16(error_code);
        }
    }

    /* out of range */
    if (CPU_EIP > CPU_STAT_CS_LIMIT) {
        VERBOSE(("interrupt: new_ip is out of range. new_ip = %08x, limit = %08x", CPU_EIP, CPU_STAT_CS_LIMIT));
        EXCEPTION(GP_EXCEPTION, 0);
    }
}
예제 #6
0
/*---
 * IRET_pm: PROTECTED-MODE-RETURN
 */
static void
IRET_pm_protected_mode_return(UINT16 new_cs, UINT32 new_ip, UINT32 new_flags)
{
    selector_t cs_sel;
    int rv;

    /* PROTECTED-MODE-RETURN */
    VERBOSE(("IRET_pm: PE=1, VM=0 in flags image"));

    rv = parse_selector(&cs_sel, new_cs);
    if (rv < 0) {
        VERBOSE(("IRET_pm: parse_selector (selector = %04x, rv = %d)", cs_sel.selector, rv));
        EXCEPTION(GP_EXCEPTION, cs_sel.idx);
    }

    /* check code segment descriptor */
    if (!cs_sel.desc.s) {
        VERBOSE(("IRET_pm: return code segment is system segment"));
        EXCEPTION(GP_EXCEPTION, cs_sel.idx);
    }
    if (!cs_sel.desc.u.seg.c) {
        VERBOSE(("IRET_pm: return code segment is data segment"));
        EXCEPTION(GP_EXCEPTION, cs_sel.idx);
    }

    /* check privilege level */
    if (cs_sel.rpl < CPU_STAT_CPL) {
        VERBOSE(("IRET_pm: RPL(%d) < CPL(%d)", cs_sel.rpl, CPU_STAT_CPL));
        EXCEPTION(GP_EXCEPTION, cs_sel.idx);
    }
    if (cs_sel.desc.u.seg.ec && (cs_sel.desc.dpl > cs_sel.rpl)) {
        VERBOSE(("IRET_pm: CONFORMING-CODE-SEGMENT and DPL(%d) != RPL(%d)", cs_sel.desc.dpl, cs_sel.rpl));
        EXCEPTION(GP_EXCEPTION, cs_sel.idx);
    }

    /* not present */
    if (selector_is_not_present(&cs_sel)) {
        VERBOSE(("IRET_pm: code segment is not present"));
        EXCEPTION(NP_EXCEPTION, cs_sel.idx);
    }

    if (cs_sel.rpl > CPU_STAT_CPL) {
        IRET_pm_protected_mode_return_outer_privilege(&cs_sel, new_ip, new_flags);
    } else {
        IRET_pm_protected_mode_return_same_privilege(&cs_sel, new_ip, new_flags);
    }
}
예제 #7
0
/*---
 * IRET_pm: NT_FLAG
 */
static void
IRET_pm_nested_task(void)
{
    selector_t tss_sel;
    UINT16 new_tss;
    int rv;

    VERBOSE(("IRET_pm: TASK-RETURN: PE=1, VM=0, NT=1"));

    new_tss = get_backlink_selector_from_tss();

    rv = parse_selector(&tss_sel, new_tss);
    if (rv < 0 || tss_sel.ldt) {
        VERBOSE(("IRET_pm: parse_selector (selector = %04x, rv = %d, %cDT)", tss_sel.selector, rv, tss_sel.ldt ? 'L' : 'G'));
        EXCEPTION(GP_EXCEPTION, tss_sel.idx);
    }

    /* check system segment */
    if (tss_sel.desc.s) {
        VERBOSE(("IRET_pm: task segment is %s segment", tss_sel.desc.u.seg.c ? "code" : "data"));
        EXCEPTION(GP_EXCEPTION, tss_sel.idx);
    }

    switch (tss_sel.desc.type) {
    case CPU_SYSDESC_TYPE_TSS_BUSY_16:
    case CPU_SYSDESC_TYPE_TSS_BUSY_32:
        break;

    case CPU_SYSDESC_TYPE_TSS_16:
    case CPU_SYSDESC_TYPE_TSS_32:
        VERBOSE(("IRET_pm: task is not busy"));
    /*FALLTHROUGH*/
    default:
        VERBOSE(("IRET_pm: invalid descriptor type (type = %d)", tss_sel.desc.type));
        EXCEPTION(GP_EXCEPTION, tss_sel.idx);
        break;
    }

    /* not present */
    if (selector_is_not_present(&tss_sel)) {
        VERBOSE(("IRET_pm: tss segment is not present"));
        EXCEPTION(NP_EXCEPTION, tss_sel.idx);
    }

    task_switch(&tss_sel, TASK_SWITCH_IRET);
}
예제 #8
0
파일: remix.c 프로젝트: kernelOfTruth/dsp
struct effect * remix_effect_init(struct effect_info *ei, struct stream_info *istream, char *channel_selector, int argc, char **argv)
{
	struct effect *e;
	struct remix_state *state;
	int i, out_channels;

	if (argc <= 1) {
		LOG(LL_ERROR, "dsp: %s: usage: %s\n", argv[0], ei->usage);
		return NULL;
	}

	out_channels = argc - 1;
	state = calloc(1, sizeof(struct remix_state));
	state->channel_selectors = calloc(out_channels, sizeof(char *));
	for (i = 0; i < out_channels; ++i) {
		state->channel_selectors[i] = NEW_SELECTOR(istream->channels);
		if (strcmp(argv[i + 1], ".") != 0 && parse_selector(argv[i + 1], state->channel_selectors[i], istream->channels))
			goto fail;
	}

	e = calloc(1, sizeof(struct effect));
	e->name = ei->name;
	e->istream.fs = e->ostream.fs = istream->fs;
	e->istream.channels = istream->channels;
	e->ostream.channels = out_channels;
	e->worst_case_ratio = e->ratio = (double) e->ostream.channels / e->istream.channels;
	e->run = remix_effect_run;
	e->reset = remix_effect_reset;
	e->drain = remix_effect_drain;
	e->destroy = remix_effect_destroy;
	e->data = state;
	return e;

	fail:
	if (state->channel_selectors)
		for (i = 0; i < out_channels; ++i)
			free(state->channel_selectors[i]);
	free(state->channel_selectors);
	free(state);
	return NULL;
}
예제 #9
0
파일: exception.c 프로젝트: nmlgc/np2debug
static void CPUCALL
interrupt_intr_or_trap(const descriptor_t *gsdp, int intrtype, int errorp, int error_code)
{
    selector_t cs_sel, ss_sel;
    UINT stacksize;
    UINT32 old_flags;
    UINT32 new_flags;
    UINT32 mask;
    UINT32 sp;
    UINT32 new_ip, new_sp;
    UINT32 old_ip, old_sp;
    UINT16 old_cs, old_ss, new_ss;
    BOOL is32bit;
    int exc_errcode;
    int rv;

    new_ip = gsdp->u.gate.offset;
    old_ss = CPU_SS;
    old_cs = CPU_CS;
    old_ip = CPU_EIP;
    old_sp = CPU_ESP;
    old_flags = REAL_EFLAGREG;
    new_flags = REAL_EFLAGREG & ~(T_FLAG|RF_FLAG|NT_FLAG|VM_FLAG);
    mask = T_FLAG|RF_FLAG|NT_FLAG|VM_FLAG;

    switch (gsdp->type) {
    case CPU_SYSDESC_TYPE_INTR_16:
    case CPU_SYSDESC_TYPE_INTR_32:
        VERBOSE(("interrupt: INTERRUPT-GATE"));
        new_flags &= ~I_FLAG;
        mask |= I_FLAG;
        break;

    case CPU_SYSDESC_TYPE_TRAP_16:
    case CPU_SYSDESC_TYPE_TRAP_32:
        VERBOSE(("interrupt: TRAP-GATE"));
        break;

    default:
        ia32_panic("interrupt: gate descriptor type is invalid (type = %d)", gsdp->type);
        break;
    }

    exc_errcode = gsdp->u.gate.selector & ~3;
    if (intrtype == INTR_TYPE_EXTINTR)
        exc_errcode++;

    rv = parse_selector(&cs_sel, gsdp->u.gate.selector);
    if (rv < 0) {
        VERBOSE(("interrupt: parse_selector (selector = %04x, rv = %d)", gsdp->u.gate.selector, rv));
        EXCEPTION(GP_EXCEPTION, exc_errcode);
    }

    /* check segment type */
    if (SEG_IS_SYSTEM(&cs_sel.desc)) {
        VERBOSE(("interrupt: code segment is system segment"));
        EXCEPTION(GP_EXCEPTION, exc_errcode);
    }
    if (SEG_IS_DATA(&cs_sel.desc)) {
        VERBOSE(("interrupt: code segment is data segment"));
        EXCEPTION(GP_EXCEPTION, exc_errcode);
    }

    /* check privilege level */
    if (cs_sel.desc.dpl > CPU_STAT_CPL) {
        VERBOSE(("interrupt: DPL(%d) > CPL(%d)", cs_sel.desc.dpl, CPU_STAT_CPL));
        EXCEPTION(GP_EXCEPTION, exc_errcode);
    }

    /* not present */
    if (selector_is_not_present(&cs_sel)) {
        VERBOSE(("interrupt: selector is not present"));
        EXCEPTION(NP_EXCEPTION, exc_errcode);
    }

    is32bit = gsdp->type & CPU_SYSDESC_TYPE_32BIT;
    if (!SEG_IS_CONFORMING_CODE(&cs_sel.desc) && (cs_sel.desc.dpl < CPU_STAT_CPL)) {
        stacksize = errorp ? 12 : 10;
        if (!CPU_STAT_VM86) {
            VERBOSE(("interrupt: INTER-PRIVILEGE-LEVEL-INTERRUPT"));
        } else {
            /* VM86 */
            VERBOSE(("interrupt: INTERRUPT-FROM-VIRTUAL-8086-MODE"));
            if (cs_sel.desc.dpl != 0) {
                /* 16.3.1.1 */
                VERBOSE(("interrupt: DPL[CS](%d) != 0", cs_sel.desc.dpl));
                EXCEPTION(GP_EXCEPTION, exc_errcode);
            }
            stacksize += 8;
        }
        if (is32bit) {
            stacksize *= 2;
        }

        /* get stack pointer from TSS */
        get_stack_pointer_from_tss(cs_sel.desc.dpl, &new_ss, &new_sp);

        /* parse stack segment descriptor */
        rv = parse_selector(&ss_sel, new_ss);

        /* update exception error code */
        exc_errcode = ss_sel.idx;
        if (intrtype == INTR_TYPE_EXTINTR)
            exc_errcode++;

        if (rv < 0) {
            VERBOSE(("interrupt: parse_selector (selector = %04x, rv = %d)", new_ss, rv));
            EXCEPTION(TS_EXCEPTION, exc_errcode);
        }

        /* check privilege level */
        if (ss_sel.rpl != cs_sel.desc.dpl) {
            VERBOSE(("interrupt: selector RPL[SS](%d) != DPL[CS](%d)", ss_sel.rpl, cs_sel.desc.dpl));
            EXCEPTION(TS_EXCEPTION, exc_errcode);
        }
        if (ss_sel.desc.dpl != cs_sel.desc.dpl) {
            VERBOSE(("interrupt: descriptor DPL[SS](%d) != DPL[CS](%d)", ss_sel.desc.dpl, cs_sel.desc.dpl));
            EXCEPTION(TS_EXCEPTION, exc_errcode);
        }

        /* stack segment must be writable data segment. */
        if (SEG_IS_SYSTEM(&ss_sel.desc)) {
            VERBOSE(("interrupt: stack segment is system segment"));
            EXCEPTION(TS_EXCEPTION, exc_errcode);
        }
        if (SEG_IS_CODE(&ss_sel.desc)) {
            VERBOSE(("interrupt: stack segment is code segment"));
            EXCEPTION(TS_EXCEPTION, exc_errcode);
        }
        if (!SEG_IS_WRITABLE_DATA(&ss_sel.desc)) {
            VERBOSE(("interrupt: stack segment is read-only data segment"));
            EXCEPTION(TS_EXCEPTION, exc_errcode);
        }

        /* not present */
        if (selector_is_not_present(&ss_sel)) {
            VERBOSE(("interrupt: selector is not present"));
            EXCEPTION(SS_EXCEPTION, exc_errcode);
        }

        /* check stack room size */
        cpu_stack_push_check(ss_sel.idx, &ss_sel.desc, new_sp, stacksize, ss_sel.desc.d);

        /* out of range */
        if (new_ip > cs_sel.desc.u.seg.limit) {
            VERBOSE(("interrupt: new_ip is out of range. new_ip = %08x, limit = %08x", new_ip, cs_sel.desc.u.seg.limit));
            EXCEPTION(GP_EXCEPTION, 0);
        }

        load_ss(ss_sel.selector, &ss_sel.desc, cs_sel.desc.dpl);
        CPU_ESP = new_sp;

        load_cs(cs_sel.selector, &cs_sel.desc, cs_sel.desc.dpl);
        CPU_EIP = new_ip;

        if (is32bit) {
            if (CPU_STAT_VM86) {
                PUSH0_32(CPU_GS);
                PUSH0_32(CPU_FS);
                PUSH0_32(CPU_DS);
                PUSH0_32(CPU_ES);

                LOAD_SEGREG(CPU_GS_INDEX, 0);
                CPU_STAT_SREG(CPU_GS_INDEX).valid = 0;
                LOAD_SEGREG(CPU_FS_INDEX, 0);
                CPU_STAT_SREG(CPU_FS_INDEX).valid = 0;
                LOAD_SEGREG(CPU_DS_INDEX, 0);
                CPU_STAT_SREG(CPU_DS_INDEX).valid = 0;
                LOAD_SEGREG(CPU_ES_INDEX, 0);
                CPU_STAT_SREG(CPU_ES_INDEX).valid = 0;
            }
            PUSH0_32(old_ss);
            PUSH0_32(old_sp);
            PUSH0_32(old_flags);
            PUSH0_32(old_cs);
            PUSH0_32(old_ip);
            if (errorp) {
                PUSH0_32(error_code);
            }
        } else {
            if (CPU_STAT_VM86) {
                ia32_panic("interrupt: 16bit gate && VM86");
            }
            PUSH0_16(old_ss);
            PUSH0_16(old_sp);
            PUSH0_16(old_flags);
            PUSH0_16(old_cs);
            PUSH0_16(old_ip);
            if (errorp) {
                PUSH0_16(error_code);
            }
        }
    } else {
        if (CPU_STAT_VM86) {
            VERBOSE(("interrupt: VM86"));
            EXCEPTION(GP_EXCEPTION, exc_errcode);
        }
        if (!SEG_IS_CONFORMING_CODE(&cs_sel.desc) && (cs_sel.desc.dpl != CPU_STAT_CPL)) {
            VERBOSE(("interrupt: %sCONFORMING-CODE-SEGMENT(%d) && DPL[CS](%d) != CPL", SEG_IS_CONFORMING_CODE(&cs_sel.desc) ? "" : "NON-", cs_sel.desc.dpl, CPU_STAT_CPL));
            EXCEPTION(GP_EXCEPTION, exc_errcode);
        }

        VERBOSE(("interrupt: INTRA-PRIVILEGE-LEVEL-INTERRUPT"));

        stacksize = errorp ? 8 : 6;
        if (is32bit) {
            stacksize *= 2;
        }

        /* check stack room size */
        if (CPU_STAT_SS32) {
            sp = CPU_ESP;
        } else {
            sp = CPU_SP;
        }
        /*
         * 17.1
         * コールゲート、割り込みゲート、またはトラップゲートを通じて
         * プログラムの制御を他のコード・セグメントに移行するときは、
         * 移行中に使用されるオペランド・サイズは使用されるゲートの
         * タイプ(16 ビットまたは32 ビット)によって決まる(移行命
         * 令のD フラグ、プリフィックスのいずれにもよらない)。
         */
        SS_PUSH_CHECK1(sp, stacksize, is32bit);

        /* out of range */
        if (new_ip > cs_sel.desc.u.seg.limit) {
            VERBOSE(("interrupt: new_ip is out of range. new_ip = %08x, limit = %08x", new_ip, cs_sel.desc.u.seg.limit));
            EXCEPTION(GP_EXCEPTION, 0);
        }

        load_cs(cs_sel.selector, &cs_sel.desc, CPU_STAT_CPL);
        CPU_EIP = new_ip;

        if (is32bit) {
            PUSH0_32(old_flags);
            PUSH0_32(old_cs);
            PUSH0_32(old_ip);
            if (errorp) {
                PUSH0_32(error_code);
            }
        } else {
            PUSH0_16(old_flags);
            PUSH0_16(old_cs);
            PUSH0_16(old_ip);
            if (errorp) {
                PUSH0_16(error_code);
            }
        }
    }
    set_eflags(new_flags, mask);

    VERBOSE(("interrupt: new EIP = %04x:%08x, ESP = %04x:%08x", CPU_CS, CPU_EIP, CPU_SS, CPU_ESP));
}
예제 #10
0
/*---
 * CALLfar_pm: call gate (MORE-PRIVILEGE)
 */
static void
CALLfar_pm_call_gate_more_privilege(const selector_t *callgate_sel, selector_t *cs_sel)
{
    UINT32 param[32];	/* copy param */
    selector_t ss_sel;
    UINT32 old_eip, old_esp;
    UINT32 new_esp;
    UINT16 old_cs, old_ss;
    UINT16 new_ss;
    int param_count;
    int i;
    int rv;

    VERBOSE(("CALLfar_pm: MORE-PRIVILEGE"));

    /* save register */
    old_cs = CPU_CS;
    old_ss = CPU_SS;
    old_eip = CPU_EIP;
    old_esp = CPU_ESP;
    if (!CPU_STAT_SS32) {
        old_esp &= 0xffff;
    }

    /* get stack pointer from TSS */
    get_stack_pointer_from_tss(cs_sel->desc.dpl, &new_ss, &new_esp);

    /* parse stack segment descriptor */
    rv = parse_selector(&ss_sel, new_ss);
    if (rv < 0) {
        VERBOSE(("CALLfar_pm: parse_selector (selector = %04x, rv = %d)", new_ss, rv));
        EXCEPTION(TS_EXCEPTION, ss_sel.idx);
    }

    /* check privilege level */
    if (ss_sel.rpl != cs_sel->desc.dpl) {
        VERBOSE(("CALLfar_pm: RPL[SS](%d) != DPL[CS](%d)", ss_sel.rpl, cs_sel->desc.dpl));
        EXCEPTION(TS_EXCEPTION, ss_sel.idx);
    }
    if (ss_sel.desc.dpl != cs_sel->desc.dpl) {
        VERBOSE(("CALLfar_pm: DPL[SS](%d) != DPL[CS](%d)", ss_sel.desc.dpl, cs_sel->desc.dpl));
        EXCEPTION(TS_EXCEPTION, ss_sel.idx);
    }

    /* stack segment must be writable data segment. */
    if (!ss_sel.desc.s) {
        VERBOSE(("CALLfar_pm: stack segment is system segment"));
        EXCEPTION(TS_EXCEPTION, ss_sel.idx);
    }
    if (ss_sel.desc.u.seg.c) {
        VERBOSE(("CALLfar_pm: stack segment is code segment"));
        EXCEPTION(TS_EXCEPTION, ss_sel.idx);
    }
    if (!ss_sel.desc.u.seg.wr) {
        VERBOSE(("CALLfar_pm: stack segment is read-only data segment"));
        EXCEPTION(TS_EXCEPTION, ss_sel.idx);
    }

    /* not present */
    if (selector_is_not_present(&ss_sel)) {
        VERBOSE(("CALLfar_pm: stack segment selector is not present"));
        EXCEPTION(SS_EXCEPTION, ss_sel.idx);
    }

    param_count = callgate_sel->desc.u.gate.count;
    VERBOSE(("CALLfar_pm: param_count = %d", param_count));

    if (callgate_sel->desc.type == CPU_SYSDESC_TYPE_CALL_32) {
        STACK_PUSH_CHECK(ss_sel.idx, &ss_sel.desc, new_esp, 16 + param_count * 4);

        /* dump param */
        for (i = 0; i < param_count; i++) {
            param[i] = cpu_vmemoryread_d(CPU_SS_INDEX, old_esp + i * 4);
            VERBOSE(("CALLfar_pm: get param[%d] = %08x", i, param[i]));
        }

        load_ss(ss_sel.selector, &ss_sel.desc, ss_sel.desc.dpl);
        if (CPU_STAT_SS32) {
            CPU_ESP = new_esp;
        } else {
            CPU_SP = (UINT16)new_esp;
        }

        load_cs(cs_sel->selector, &cs_sel->desc, cs_sel->desc.dpl);
        SET_EIP(callgate_sel->desc.u.gate.offset);

        PUSH0_32(old_ss);
        PUSH0_32(old_esp);

        /* restore param */
        for (i = param_count; i > 0; i--) {
            PUSH0_32(param[i - 1]);
            VERBOSE(("CALLfar_pm: set param[%d] = %08x", i - 1, param[i - 1]));
        }

        PUSH0_32(old_cs);
        PUSH0_32(old_eip);
    } else {
        STACK_PUSH_CHECK(ss_sel.idx, &ss_sel.desc, new_esp, 8 + param_count * 2);

        /* dump param */
        for (i = 0; i < param_count; i++) {
            param[i] = cpu_vmemoryread_w(CPU_SS_INDEX, old_esp + i * 2);
            VERBOSE(("CALLfar_pm: get param[%d] = %04x", i, param[i]));
        }

        load_ss(ss_sel.selector, &ss_sel.desc, ss_sel.desc.dpl);
        if (CPU_STAT_SS32) {
            CPU_ESP = new_esp;
        } else {
            CPU_SP = (UINT16)new_esp;
        }

        load_cs(cs_sel->selector, &cs_sel->desc, cs_sel->desc.dpl);
        SET_EIP(callgate_sel->desc.u.gate.offset);

        PUSH0_16(old_ss);
        PUSH0_16(old_esp);

        /* restore param */
        for (i = param_count; i > 0; i--) {
            PUSH0_16(param[i - 1]);
            VERBOSE(("CALLfar_pm: set param[%d] = %04x", i - 1, param[i - 1]));
        }

        PUSH0_16(old_cs);
        PUSH0_16(old_eip);
    }
}
예제 #11
0
static void
CALLfar_pm_call_gate(const selector_t *callgate_sel)
{
    selector_t cs_sel;
    int rv;

    VERBOSE(("CALLfar_pm: CALL-GATE"));

    /* check privilege level */
    if (callgate_sel->desc.dpl < CPU_STAT_CPL) {
        VERBOSE(("CALLfar_pm: DPL(%d) < CPL(%d)", callgate_sel->desc.dpl, CPU_STAT_CPL));
        EXCEPTION(GP_EXCEPTION, callgate_sel->idx);
    }
    if (callgate_sel->desc.dpl < callgate_sel->rpl) {
        VERBOSE(("CALLfar_pm: DPL(%d) < CPL(%d)", callgate_sel->desc.dpl, callgate_sel->rpl));
        EXCEPTION(GP_EXCEPTION, callgate_sel->idx);
    }

    /* not present */
    if (selector_is_not_present(callgate_sel)) {
        VERBOSE(("CALLfar_pm: selector is not present"));
        EXCEPTION(NP_EXCEPTION, callgate_sel->idx);
    }

    /* parse code segment descriptor */
    rv = parse_selector(&cs_sel, callgate_sel->desc.u.gate.selector);
    if (rv < 0) {
        VERBOSE(("CALLfar_pm: parse_selector (selector = %04x, rv = %d)", callgate_sel->desc.u.gate.selector, rv));
        EXCEPTION(GP_EXCEPTION, cs_sel.idx);
    }

    /* check segment type */
    if (!cs_sel.desc.s) {
        VERBOSE(("CALLfar_pm: code segment is system segment"));
        EXCEPTION(GP_EXCEPTION, cs_sel.idx);
    }
    if (!cs_sel.desc.u.seg.c) {
        VERBOSE(("CALLfar_pm: code segment is data segment"));
        EXCEPTION(GP_EXCEPTION, cs_sel.idx);
    }

    /* check privilege level */
    if (cs_sel.desc.dpl > CPU_STAT_CPL) {
        VERBOSE(("CALLfar_pm: DPL(%d) > CPL(%d)", cs_sel.desc.dpl, CPU_STAT_CPL));
        EXCEPTION(GP_EXCEPTION, cs_sel.idx);
    }

    /* not present */
    if (selector_is_not_present(&cs_sel)) {
        VERBOSE(("CALLfar_pm: selector is not present"));
        EXCEPTION(NP_EXCEPTION, cs_sel.idx);
    }

    /* out of range */
    if (callgate_sel->desc.u.gate.offset > cs_sel.desc.u.seg.limit) {
        VERBOSE(("CALLfar_pm: new_ip is out of range. new_ip = %08x, limit = %08x", callgate_sel->desc.u.gate.offset, cs_sel.desc.u.seg.limit));
        EXCEPTION(GP_EXCEPTION, 0);
    }

    if (!cs_sel.desc.u.seg.ec && (cs_sel.desc.dpl < CPU_STAT_CPL)) {
        CALLfar_pm_call_gate_more_privilege(callgate_sel, &cs_sel);
    } else {
        CALLfar_pm_call_gate_same_privilege(callgate_sel, &cs_sel);
    }
}
static int u32_parse_opt(struct filter_util *qu, char *handle, int argc, char **argv, struct nlmsghdr *n)
{
	struct {
		struct tc_u32_sel sel;
		struct tc_u32_key keys[128];
	} sel;
	struct tcmsg *t = NLMSG_DATA(n);
	struct rtattr *tail;
	int sel_ok = 0;
	int sample_ok = 0;
	__u32 htid = 0;
	__u32 order = 0;

	memset(&sel, 0, sizeof(sel));

//fprintf(stderr, "handle[%s]\n", handle);

	if (handle && get_u32_handle(&t->tcm_handle, handle)) {
		fprintf(stderr, "Illegal filter ID\n");
		return -1;
	}

	if (argc == 0)
		return 0;



	tail = NLMSG_TAIL(n);
	addattr_l(n, MAX_MSG, TCA_OPTIONS, NULL, 0);

	while (argc > 0) {
		if (matches(*argv, "match") == 0) {
			NEXT_ARG();
			if (parse_selector(&argc, &argv, &sel.sel, n)) {
				fprintf(stderr, "Illegal \"match\"\n");
				return -1;
			}
			sel_ok++;
			continue;
		} else if (matches(*argv, "offset") == 0) {
			NEXT_ARG();
			if (parse_offset(&argc, &argv, &sel.sel)) {
				fprintf(stderr, "Illegal \"offset\"\n");
				return -1;
			}
			continue;
		} else if (matches(*argv, "hashkey") == 0) {
			NEXT_ARG();
			if (parse_hashkey(&argc, &argv, &sel.sel)) {
				fprintf(stderr, "Illegal \"hashkey\"\n");
				return -1;
			}
			continue;
		} else if (matches(*argv, "classid") == 0 ||
			   strcmp(*argv, "flowid") == 0) {
			unsigned handle;
			NEXT_ARG();
			if (get_tc_classid(&handle, *argv)) {
				fprintf(stderr, "Illegal \"classid\"\n");
				return -1;
			}
			addattr_l(n, MAX_MSG, TCA_U32_CLASSID, &handle, 4);
			sel.sel.flags |= TC_U32_TERMINAL;
		} else if (matches(*argv, "divisor") == 0) {
			unsigned int divisor;
fprintf(stderr, "parse divisor\n");
			NEXT_ARG();
			if (get_unsigned(&divisor, *argv, 0) || 
			    divisor == 0 ||
			   //divisor > 0x100 || ((divisor - 1) & divisor)) {//richie1124
			   divisor > 0x1000 || ((divisor - 1) & divisor)) {
				fprintf(stderr, "Illegal \"divisor\"\n");
				return -1;
			}
			addattr_l(n, MAX_MSG, TCA_U32_DIVISOR, &divisor, 4);
		} else if (matches(*argv, "order") == 0) {
			NEXT_ARG();
			if (get_u32(&order, *argv, 0)) {
				fprintf(stderr, "Illegal \"order\"\n");
				return -1;
			}
		} else if (strcmp(*argv, "link") == 0) {
			unsigned handle;
			NEXT_ARG();
			if (get_u32_handle(&handle, *argv)) {
				fprintf(stderr, "Illegal \"link\"\n");
				return -1;
			}
			if (handle && TC_U32_NODE(handle)) {
				fprintf(stderr, "\"link\" must be a hash table.\n");
				return -1;
			}
			addattr_l(n, MAX_MSG, TCA_U32_LINK, &handle, 4);
		} else if (strcmp(*argv, "ht") == 0) {
			unsigned handle;
			NEXT_ARG();
			if (get_u32_handle(&handle, *argv)) {
				fprintf(stderr, "Illegal \"ht\"\n");
				return -1;
			}
//fprintf(stderr, "f_u32, handle[%x]\n", handle);
			if (handle && TC_U32_NODE(handle)) {
				fprintf(stderr, "\"ht\" must be a hash table.\n");
				return -1;
			}
			if (sample_ok)
			{
				//htid = (htid&0xFF000)|(handle&0xFFF00000);
				//htid = (htid&0xFFF00)|(handle&0xFFF00000);
				htid = (htid&0xFFF00)|(handle&0xFFF00000);//richie1124
			}
			else
			{
				//htid = (handle&0xFFFFF000);
				htid = (handle&0xFFFFFF00);
				//htid = (handle&0xFFFFFF00);//richie1124
			}
		} else if (strcmp(*argv, "sample") == 0) {
			__u32 hash;
			unsigned divisor = 0x100;

			struct {
				struct tc_u32_sel sel;
				struct tc_u32_key keys[4];
			} sel2;
			memset(&sel2, 0, sizeof(sel2));
			NEXT_ARG();
			if (parse_selector(&argc, &argv, &sel2.sel, n)) {
				fprintf(stderr, "Illegal \"sample\"\n");
				return -1;
			}
			if (sel2.sel.nkeys != 1) {
				fprintf(stderr, "\"sample\" must contain exactly ONE key.\n");
				return -1;
			}
			if (*argv != 0 && strcmp(*argv, "divisor") == 0) {
				NEXT_ARG();
				if (get_unsigned(&divisor, *argv, 0) || divisor == 0 ||
				    divisor > 0x100 || ((divisor - 1) & divisor)) {
					fprintf(stderr, "Illegal sample \"divisor\"\n");
					return -1;
				}
				NEXT_ARG();
			}
			hash = sel2.sel.keys[0].val&sel2.sel.keys[0].mask;
			hash ^= hash>>16;
			hash ^= hash>>8;
			htid = ((hash%divisor)<<12)|(htid&0xFFF00000);
			sample_ok = 1;
			continue;
		} else if (strcmp(*argv, "indev") == 0) {
예제 #13
0
BX_CPU_C::call_gate64(bx_selector_t *gate_selector)
{
  bx_selector_t cs_selector;
  Bit32u dword1, dword2, dword3;
  bx_descriptor_t cs_descriptor;
  bx_descriptor_t gate_descriptor;

  // examine code segment selector in call gate descriptor
  BX_DEBUG(("call_gate64: CALL 64bit call gate"));

  fetch_raw_descriptor_64(gate_selector, &dword1, &dword2, &dword3, BX_GP_EXCEPTION);
  parse_descriptor(dword1, dword2, &gate_descriptor);

  Bit16u dest_selector = gate_descriptor.u.gate.dest_selector;
  // selector must not be null else #GP(0)
  if ((dest_selector & 0xfffc) == 0) {
    BX_ERROR(("call_gate64: selector in gate null"));
    exception(BX_GP_EXCEPTION, 0, 0);
  }

  parse_selector(dest_selector, &cs_selector);
  // selector must be within its descriptor table limits,
  //   else #GP(code segment selector)
  fetch_raw_descriptor(&cs_selector, &dword1, &dword2, BX_GP_EXCEPTION);
  parse_descriptor(dword1, dword2, &cs_descriptor);

  // find the RIP in the gate_descriptor
  Bit64u new_RIP = gate_descriptor.u.gate.dest_offset;
  new_RIP |= ((Bit64u)dword3 << 32);

  // AR byte of selected descriptor must indicate code segment,
  //   else #GP(code segment selector)
  // DPL of selected descriptor must be <= CPL,
  // else #GP(code segment selector)
  if (cs_descriptor.valid==0 || cs_descriptor.segment==0 ||
      IS_DATA_SEGMENT(cs_descriptor.type) ||
      cs_descriptor.dpl > CPL)
  {
    BX_ERROR(("call_gate64: selected descriptor is not code"));
    exception(BX_GP_EXCEPTION, dest_selector & 0xfffc, 0);
  }

  // In long mode, only 64-bit call gates are allowed, and they must point
  // to 64-bit code segments, else #GP(selector)
  if (! IS_LONG64_SEGMENT(cs_descriptor) || cs_descriptor.u.segment.d_b)
  {
    BX_ERROR(("call_gate64: not 64-bit code segment in call gate 64"));
    exception(BX_GP_EXCEPTION, dest_selector & 0xfffc, 0);
  }

  // code segment must be present else #NP(selector)
  if (! IS_PRESENT(cs_descriptor)) {
    BX_ERROR(("call_gate64: code segment not present !"));
    exception(BX_NP_EXCEPTION, dest_selector & 0xfffc, 0);
  }

  Bit64u old_CS  = BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS].selector.value;
  Bit64u old_RIP = RIP;

  // CALL GATE TO MORE PRIVILEGE
  // if non-conforming code segment and DPL < CPL then
  if (IS_CODE_SEGMENT_NON_CONFORMING(cs_descriptor.type) && (cs_descriptor.dpl < CPL))
  {
    Bit64u RSP_for_cpl_x;

    BX_DEBUG(("CALL GATE TO MORE PRIVILEGE LEVEL"));

    // get new RSP for new privilege level from TSS
    get_RSP_from_TSS(cs_descriptor.dpl, &RSP_for_cpl_x);

    Bit64u old_SS  = BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS].selector.value;
    Bit64u old_RSP = RSP;

    if (! IsCanonical(RSP_for_cpl_x)) {
      // #SS(selector) when changing priviledge level
      BX_ERROR(("call_gate64: canonical address failure %08x%08x",
         GET32H(RSP_for_cpl_x), GET32L(RSP_for_cpl_x)));
      exception(BX_SS_EXCEPTION, old_SS & 0xfffc, 0);
    }

    // push old stack long pointer onto new stack
    write_new_stack_qword_64(RSP_for_cpl_x -  8, cs_descriptor.dpl, old_SS);
    write_new_stack_qword_64(RSP_for_cpl_x - 16, cs_descriptor.dpl, old_RSP);
    // push long pointer to return address onto new stack
    write_new_stack_qword_64(RSP_for_cpl_x - 24, cs_descriptor.dpl, old_CS);
    write_new_stack_qword_64(RSP_for_cpl_x - 32, cs_descriptor.dpl, old_RIP);
    RSP_for_cpl_x -= 32;

    // prepare new stack null SS selector
    bx_selector_t ss_selector;
    bx_descriptor_t ss_descriptor;

    // set up a null descriptor
    parse_selector(0, &ss_selector);
    parse_descriptor(0, 0, &ss_descriptor);

    // load CS:RIP (guaranteed to be in 64 bit mode)
    branch_far64(&cs_selector, &cs_descriptor, new_RIP, cs_descriptor.dpl);

    // set up null SS descriptor
    load_ss(&ss_selector, &ss_descriptor, cs_descriptor.dpl);
    RSP = RSP_for_cpl_x;
  }
  else
  {
    BX_DEBUG(("CALL GATE TO SAME PRIVILEGE"));

    // push to 64-bit stack, switch to long64 guaranteed
    write_new_stack_qword_64(RSP -  8, CPL, old_CS);
    write_new_stack_qword_64(RSP - 16, CPL, old_RIP);
    RSP -= 16;

    // load CS:RIP (guaranteed to be in 64 bit mode)
    branch_far64(&cs_selector, &cs_descriptor, new_RIP, CPL);
  }
}
예제 #14
0
파일: sgen.c 프로젝트: bmc0/dsp
struct codec * sgen_codec_init(const char *path, const char *type, const char *enc, int fs, int channels, int endian, int mode)
{
	char *args = NULL, *arg, *gen_type, *len_str, *next_arg, *next_type, *value, *endptr;
	int parse_ret;
	struct codec *c;
	struct sgen_state *state;
	struct sgen_generator *g;

	c = calloc(1, sizeof(struct codec));
	c->path = path;
	c->type = type;
	c->enc = "sample_t";
	c->fs = fs;
	c->channels = channels;
	c->prec = 53;
	c->frames = -1;
	c->read = sgen_read;
	c->write = sgen_write;
	c->seek = sgen_seek;
	c->delay = sgen_delay;
	c->drop = sgen_drop;
	c->pause = sgen_pause;
	c->destroy = sgen_destroy;

	state = calloc(1, sizeof(struct sgen_state));
	state->n = 0;
	c->data = state;

	args = arg = strdup(path);
	len_str = isolate(arg, '+');
	if (*len_str != '\0') {
		c->frames = parse_len(len_str, fs, &endptr);
		if (check_endptr(type, len_str, endptr, "length"))
			goto fail;
		if (c->frames <= 0) {
			LOG(LL_ERROR, "%s: %s: error: length cannot be <= 0\n", dsp_globals.prog_name, type);
			goto fail;
		}
		/* LOG(LL_VERBOSE, "%s: %s: info: length=%zd\n", dsp_globals.prog_name, type, c->frames); */
	}
	while (*arg != '\0') {
		next_type = isolate(arg, '/');
		next_arg = isolate(arg, ':');
		value = isolate(arg, '@');
		/* LOG(LL_VERBOSE, "%s: %s: info: type=%s channel_selector=%s\n", dsp_globals.prog_name, type, arg, value); */
		state->g = realloc(state->g, (state->n + 1) * sizeof(struct sgen_generator));
		g = &state->g[state->n];
		memset(g, 0, sizeof(struct sgen_generator));
		g->channel_selector = NEW_SELECTOR(channels);
		SET_SELECTOR(g->channel_selector, channels);
		++state->n;

		gen_type = arg;
		if (strcmp(gen_type, "delta") == 0)     g->type = SGEN_TYPE_DELTA;
		else if (strcmp(gen_type, "sine") == 0) g->type = SGEN_TYPE_SINE;
		else {
			LOG(LL_ERROR, "%s: %s: error: illegal type: %s\n", dsp_globals.prog_name, type, gen_type);
			goto fail;
		}
		sgen_init_generator(g, c);
		if (*value != '\0' && parse_selector(value, g->channel_selector, channels))
			goto fail;

		arg = next_arg;
		while (*arg != '\0') {
			next_arg = isolate(arg, ':');
			value = isolate(arg, '=');
			/* LOG(LL_VERBOSE, "%s: %s: %s: arg: key=%s value=%s\n", dsp_globals.prog_name, type, gen_type, arg, value); */
			parse_ret = sgen_parse_param(g, c, type, arg, value);
			if (parse_ret == 1) {
				LOG(LL_ERROR, "%s: %s: %s: error: illegal parameter: %s\n", dsp_globals.prog_name, type, gen_type, arg);
				goto fail;
			}
			else if (parse_ret == -1)
				goto fail;
			arg = next_arg;
		}
		sgen_prepare_generator(g, c);
		arg = next_type;
	}

	done:
	free(args);
	return c;

	fail:
	sgen_destroy(c);
	free(c);
	c = NULL;
	goto done;
}
예제 #15
0
파일: exception.cpp 프로젝트: iver6/BA
void BX_CPU_C::protected_mode_int(Bit8u vector, unsigned soft_int, bx_bool push_error, Bit16u error_code)
{
  bx_descriptor_t gate_descriptor, cs_descriptor;
  bx_selector_t cs_selector;

  Bit16u raw_tss_selector;
  bx_selector_t   tss_selector;
  bx_descriptor_t tss_descriptor;

  Bit16u gate_dest_selector;
  Bit32u gate_dest_offset;

  // interrupt vector must be within IDT table limits,
  // else #GP(vector*8 + 2 + EXT)
  if ((vector*8 + 7) > BX_CPU_THIS_PTR idtr.limit) {
    BX_ERROR(("interrupt(): vector must be within IDT table limits, IDT.limit = 0x%x", BX_CPU_THIS_PTR idtr.limit));
    exception(BX_GP_EXCEPTION, vector*8 + 2);
  }

  Bit64u desctmp = system_read_qword(BX_CPU_THIS_PTR idtr.base + vector*8);

  Bit32u dword1 = GET32L(desctmp);
  Bit32u dword2 = GET32H(desctmp);

  parse_descriptor(dword1, dword2, &gate_descriptor);

  if ((gate_descriptor.valid==0) || gate_descriptor.segment) {
    BX_ERROR(("interrupt(): gate descriptor is not valid sys seg (vector=0x%02x)", vector));
    exception(BX_GP_EXCEPTION, vector*8 + 2);
  }

  // descriptor AR byte must indicate interrupt gate, trap gate,
  // or task gate, else #GP(vector*8 + 2 + EXT)
  switch (gate_descriptor.type) {
  case BX_TASK_GATE:
  case BX_286_INTERRUPT_GATE:
  case BX_286_TRAP_GATE:
  case BX_386_INTERRUPT_GATE:
  case BX_386_TRAP_GATE:
    break;
  default:
    BX_ERROR(("interrupt(): gate.type(%u) != {5,6,7,14,15}",
      (unsigned) gate_descriptor.type));
    exception(BX_GP_EXCEPTION, vector*8 + 2);
  }

  // if software interrupt, then gate descripor DPL must be >= CPL,
  // else #GP(vector * 8 + 2 + EXT)
  if (soft_int && gate_descriptor.dpl < CPL) {
    BX_ERROR(("interrupt(): soft_int && (gate.dpl < CPL)"));
    exception(BX_GP_EXCEPTION, vector*8 + 2);
  }

  // Gate must be present, else #NP(vector * 8 + 2 + EXT)
  if (! IS_PRESENT(gate_descriptor)) {
    BX_ERROR(("interrupt(): gate not present"));
    exception(BX_NP_EXCEPTION, vector*8 + 2);
  }

  switch (gate_descriptor.type) {
  case BX_TASK_GATE:
    // examine selector to TSS, given in task gate descriptor
    raw_tss_selector = gate_descriptor.u.taskgate.tss_selector;
    parse_selector(raw_tss_selector, &tss_selector);

    // must specify global in the local/global bit,
    //      else #GP(TSS selector)
    if (tss_selector.ti) {
      BX_ERROR(("interrupt(): tss_selector.ti=1 from gate descriptor - #GP(tss_selector)"));
      exception(BX_GP_EXCEPTION, raw_tss_selector & 0xfffc);
    }

    // index must be within GDT limits, else #TS(TSS selector)
    fetch_raw_descriptor(&tss_selector, &dword1, &dword2, BX_GP_EXCEPTION);

    parse_descriptor(dword1, dword2, &tss_descriptor);

    // AR byte must specify available TSS,
    //   else #GP(TSS selector)
    if (tss_descriptor.valid==0 || tss_descriptor.segment) {
      BX_ERROR(("interrupt(): TSS selector points to invalid or bad TSS - #GP(tss_selector)"));
      exception(BX_GP_EXCEPTION, raw_tss_selector & 0xfffc);
    }

    if (tss_descriptor.type!=BX_SYS_SEGMENT_AVAIL_286_TSS &&
        tss_descriptor.type!=BX_SYS_SEGMENT_AVAIL_386_TSS)
    {
      BX_ERROR(("interrupt(): TSS selector points to bad TSS - #GP(tss_selector)"));
      exception(BX_GP_EXCEPTION, raw_tss_selector & 0xfffc);
    }

    // TSS must be present, else #NP(TSS selector)
    if (! IS_PRESENT(tss_descriptor)) {
      BX_ERROR(("interrupt(): TSS descriptor.p == 0"));
      exception(BX_NP_EXCEPTION, raw_tss_selector & 0xfffc);
    }

    // switch tasks with nesting to TSS
    task_switch(0, &tss_selector, &tss_descriptor,
                    BX_TASK_FROM_INT, dword1, dword2);

    RSP_SPECULATIVE;

    // if interrupt was caused by fault with error code
    //   stack limits must allow push of 2 more bytes, else #SS(0)
    // push error code onto stack

    if (push_error) {
      if (tss_descriptor.type >= 9) // TSS386
        push_32(error_code);
      else
        push_16(error_code);
    }

    // instruction pointer must be in CS limit, else #GP(0)
    if (EIP > BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS].cache.u.segment.limit_scaled) {
      BX_ERROR(("interrupt(): EIP > CS.limit"));
      exception(BX_GP_EXCEPTION, 0);
    }

    RSP_COMMIT;

    return;

  case BX_286_INTERRUPT_GATE:
  case BX_286_TRAP_GATE:
  case BX_386_INTERRUPT_GATE:
  case BX_386_TRAP_GATE:
    gate_dest_selector = gate_descriptor.u.gate.dest_selector;
    gate_dest_offset   = gate_descriptor.u.gate.dest_offset;

    // examine CS selector and descriptor given in gate descriptor
    // selector must be non-null else #GP(EXT)
    if ((gate_dest_selector & 0xfffc) == 0) {
      BX_ERROR(("int_trap_gate(): selector null"));
      exception(BX_GP_EXCEPTION, 0);
    }

    parse_selector(gate_dest_selector, &cs_selector);

    // selector must be within its descriptor table limits
    // else #GP(selector+EXT)
    fetch_raw_descriptor(&cs_selector, &dword1, &dword2, BX_GP_EXCEPTION);
    parse_descriptor(dword1, dword2, &cs_descriptor);

    // descriptor AR byte must indicate code seg
    // and code segment descriptor DPL<=CPL, else #GP(selector+EXT)
    if (cs_descriptor.valid==0 || cs_descriptor.segment==0 ||
        IS_DATA_SEGMENT(cs_descriptor.type) ||
        cs_descriptor.dpl > CPL)
    {
      BX_ERROR(("interrupt(): not accessible or not code segment cs=0x%04x", cs_selector.value));
      exception(BX_GP_EXCEPTION, cs_selector.value & 0xfffc);
    }

    // segment must be present, else #NP(selector + EXT)
    if (! IS_PRESENT(cs_descriptor)) {
      BX_ERROR(("interrupt(): segment not present"));
      exception(BX_NP_EXCEPTION, cs_selector.value & 0xfffc);
    }

    // if code segment is non-conforming and DPL < CPL then
    // INTERRUPT TO INNER PRIVILEGE
    if(IS_CODE_SEGMENT_NON_CONFORMING(cs_descriptor.type) && cs_descriptor.dpl < CPL)
    {
      Bit16u old_SS, old_CS, SS_for_cpl_x;
      Bit32u ESP_for_cpl_x, old_EIP, old_ESP;
      bx_descriptor_t ss_descriptor;
      bx_selector_t   ss_selector;
      int is_v8086_mode = v8086_mode();

      BX_DEBUG(("interrupt(): INTERRUPT TO INNER PRIVILEGE"));

      // check selector and descriptor for new stack in current TSS
      get_SS_ESP_from_TSS(cs_descriptor.dpl,
                              &SS_for_cpl_x, &ESP_for_cpl_x);

      if (is_v8086_mode && cs_descriptor.dpl != 0) {
        // if code segment DPL != 0 then #GP(new code segment selector)
        BX_ERROR(("interrupt(): code segment DPL(%d) != 0 in v8086 mode", cs_descriptor.dpl));
        exception(BX_GP_EXCEPTION, cs_selector.value & 0xfffc);
      }

      // Selector must be non-null else #TS(EXT)
      if ((SS_for_cpl_x & 0xfffc) == 0) {
        BX_ERROR(("interrupt(): SS selector null"));
        exception(BX_TS_EXCEPTION, 0); /* TS(ext) */
      }

      // selector index must be within its descriptor table limits
      // else #TS(SS selector + EXT)
      parse_selector(SS_for_cpl_x, &ss_selector);
      // fetch 2 dwords of descriptor; call handles out of limits checks
      fetch_raw_descriptor(&ss_selector, &dword1, &dword2, BX_TS_EXCEPTION);
      parse_descriptor(dword1, dword2, &ss_descriptor);

      // selector rpl must = dpl of code segment,
      // else #TS(SS selector + ext)
      if (ss_selector.rpl != cs_descriptor.dpl) {
        BX_ERROR(("interrupt(): SS.rpl != CS.dpl"));
        exception(BX_TS_EXCEPTION, SS_for_cpl_x & 0xfffc);
      }

      // stack seg DPL must = DPL of code segment,
      // else #TS(SS selector + ext)
      if (ss_descriptor.dpl != cs_descriptor.dpl) {
        BX_ERROR(("interrupt(): SS.dpl != CS.dpl"));
        exception(BX_TS_EXCEPTION, SS_for_cpl_x & 0xfffc);
      }

      // descriptor must indicate writable data segment,
      // else #TS(SS selector + EXT)
      if (ss_descriptor.valid==0 || ss_descriptor.segment==0 ||
           IS_CODE_SEGMENT(ss_descriptor.type) ||
          !IS_DATA_SEGMENT_WRITEABLE(ss_descriptor.type))
      {
        BX_ERROR(("interrupt(): SS is not writable data segment"));
        exception(BX_TS_EXCEPTION, SS_for_cpl_x & 0xfffc);
      }

      // seg must be present, else #SS(SS selector + ext)
      if (! IS_PRESENT(ss_descriptor)) {
        BX_ERROR(("interrupt(): SS not present"));
        exception(BX_SS_EXCEPTION, SS_for_cpl_x & 0xfffc);
      }

      // IP must be within CS segment boundaries, else #GP(0)
      if (gate_dest_offset > cs_descriptor.u.segment.limit_scaled) {
        BX_ERROR(("interrupt(): gate EIP > CS.limit"));
        exception(BX_GP_EXCEPTION, 0);
      }

      old_ESP = ESP;
      old_SS  = BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS].selector.value;
      old_EIP = EIP;
      old_CS  = BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS].selector.value;

      // Prepare new stack segment
      bx_segment_reg_t new_stack;
      new_stack.selector = ss_selector;
      new_stack.cache = ss_descriptor;
      new_stack.selector.rpl = cs_descriptor.dpl;
      // add cpl to the selector value
      new_stack.selector.value = (0xfffc & new_stack.selector.value) |
        new_stack.selector.rpl;

      if (ss_descriptor.u.segment.d_b) {
        Bit32u temp_ESP = ESP_for_cpl_x;

        if (is_v8086_mode)
        {
          if (gate_descriptor.type>=14) { // 386 int/trap gate
            write_new_stack_dword_32(&new_stack, temp_ESP-4,  cs_descriptor.dpl,
                BX_CPU_THIS_PTR sregs[BX_SEG_REG_GS].selector.value);
            write_new_stack_dword_32(&new_stack, temp_ESP-8,  cs_descriptor.dpl,
                BX_CPU_THIS_PTR sregs[BX_SEG_REG_FS].selector.value);
            write_new_stack_dword_32(&new_stack, temp_ESP-12, cs_descriptor.dpl,
                BX_CPU_THIS_PTR sregs[BX_SEG_REG_DS].selector.value);
            write_new_stack_dword_32(&new_stack, temp_ESP-16, cs_descriptor.dpl,
                BX_CPU_THIS_PTR sregs[BX_SEG_REG_ES].selector.value);
            temp_ESP -= 16;
          }
          else {
            write_new_stack_word_32(&new_stack, temp_ESP-2, cs_descriptor.dpl,
                BX_CPU_THIS_PTR sregs[BX_SEG_REG_GS].selector.value);
            write_new_stack_word_32(&new_stack, temp_ESP-4, cs_descriptor.dpl,
                BX_CPU_THIS_PTR sregs[BX_SEG_REG_FS].selector.value);
            write_new_stack_word_32(&new_stack, temp_ESP-6, cs_descriptor.dpl,
                BX_CPU_THIS_PTR sregs[BX_SEG_REG_DS].selector.value);
            write_new_stack_word_32(&new_stack, temp_ESP-8, cs_descriptor.dpl,
                BX_CPU_THIS_PTR sregs[BX_SEG_REG_ES].selector.value);
            temp_ESP -= 8;
          }
        }

        if (gate_descriptor.type>=14) { // 386 int/trap gate
          // push long pointer to old stack onto new stack
          write_new_stack_dword_32(&new_stack, temp_ESP-4,  cs_descriptor.dpl, old_SS);
          write_new_stack_dword_32(&new_stack, temp_ESP-8,  cs_descriptor.dpl, old_ESP);
          write_new_stack_dword_32(&new_stack, temp_ESP-12, cs_descriptor.dpl, read_eflags());
          write_new_stack_dword_32(&new_stack, temp_ESP-16, cs_descriptor.dpl, old_CS);
          write_new_stack_dword_32(&new_stack, temp_ESP-20, cs_descriptor.dpl, old_EIP);
          temp_ESP -= 20;

          if (push_error) {
            temp_ESP -= 4;
            write_new_stack_dword_32(&new_stack, temp_ESP, cs_descriptor.dpl, error_code);
          }
        }
        else {                          // 286 int/trap gate
          // push long pointer to old stack onto new stack
          write_new_stack_word_32(&new_stack, temp_ESP-2,  cs_descriptor.dpl, old_SS);
          write_new_stack_word_32(&new_stack, temp_ESP-4,  cs_descriptor.dpl, (Bit16u) old_ESP);
          write_new_stack_word_32(&new_stack, temp_ESP-6,  cs_descriptor.dpl, (Bit16u) read_eflags());
          write_new_stack_word_32(&new_stack, temp_ESP-8,  cs_descriptor.dpl, old_CS);
          write_new_stack_word_32(&new_stack, temp_ESP-10, cs_descriptor.dpl, (Bit16u) old_EIP);
          temp_ESP -= 10;

          if (push_error) {
            temp_ESP -= 2;
            write_new_stack_word_32(&new_stack, temp_ESP, cs_descriptor.dpl, error_code);
          }
        }

        ESP = temp_ESP;
      }
      else {
        Bit16u temp_SP = (Bit16u) ESP_for_cpl_x;

        if (is_v8086_mode)
        {
          if (gate_descriptor.type>=14) { // 386 int/trap gate
            write_new_stack_dword_32(&new_stack, (Bit16u)(temp_SP-4),  cs_descriptor.dpl,
                BX_CPU_THIS_PTR sregs[BX_SEG_REG_GS].selector.value);
            write_new_stack_dword_32(&new_stack, (Bit16u)(temp_SP-8),  cs_descriptor.dpl,
                BX_CPU_THIS_PTR sregs[BX_SEG_REG_FS].selector.value);
            write_new_stack_dword_32(&new_stack, (Bit16u)(temp_SP-12), cs_descriptor.dpl,
                BX_CPU_THIS_PTR sregs[BX_SEG_REG_DS].selector.value);
            write_new_stack_dword_32(&new_stack, (Bit16u)(temp_SP-16), cs_descriptor.dpl,
                BX_CPU_THIS_PTR sregs[BX_SEG_REG_ES].selector.value);
            temp_SP -= 16;
          }
          else {
            write_new_stack_word_32(&new_stack, (Bit16u)(temp_SP-2), cs_descriptor.dpl,
                BX_CPU_THIS_PTR sregs[BX_SEG_REG_GS].selector.value);
            write_new_stack_word_32(&new_stack, (Bit16u)(temp_SP-4), cs_descriptor.dpl,
                BX_CPU_THIS_PTR sregs[BX_SEG_REG_FS].selector.value);
            write_new_stack_word_32(&new_stack, (Bit16u)(temp_SP-6), cs_descriptor.dpl,
                BX_CPU_THIS_PTR sregs[BX_SEG_REG_DS].selector.value);
            write_new_stack_word_32(&new_stack, (Bit16u)(temp_SP-8), cs_descriptor.dpl,
                BX_CPU_THIS_PTR sregs[BX_SEG_REG_ES].selector.value);
            temp_SP -= 8;
          }
        }

        if (gate_descriptor.type>=14) { // 386 int/trap gate
          // push long pointer to old stack onto new stack
          write_new_stack_dword_32(&new_stack, (Bit16u)(temp_SP-4),  cs_descriptor.dpl, old_SS);
          write_new_stack_dword_32(&new_stack, (Bit16u)(temp_SP-8),  cs_descriptor.dpl, old_ESP);
          write_new_stack_dword_32(&new_stack, (Bit16u)(temp_SP-12), cs_descriptor.dpl, read_eflags());
          write_new_stack_dword_32(&new_stack, (Bit16u)(temp_SP-16), cs_descriptor.dpl, old_CS);
          write_new_stack_dword_32(&new_stack, (Bit16u)(temp_SP-20), cs_descriptor.dpl, old_EIP);
          temp_SP -= 20;

          if (push_error) {
            temp_SP -= 4;
            write_new_stack_dword_32(&new_stack, temp_SP, cs_descriptor.dpl, error_code);
          }
        }
        else {                          // 286 int/trap gate
          // push long pointer to old stack onto new stack
          write_new_stack_word_32(&new_stack, (Bit16u)(temp_SP-2),  cs_descriptor.dpl, old_SS);
          write_new_stack_word_32(&new_stack, (Bit16u)(temp_SP-4),  cs_descriptor.dpl, (Bit16u) old_ESP);
          write_new_stack_word_32(&new_stack, (Bit16u)(temp_SP-6),  cs_descriptor.dpl, (Bit16u) read_eflags());
          write_new_stack_word_32(&new_stack, (Bit16u)(temp_SP-8),  cs_descriptor.dpl, old_CS);
          write_new_stack_word_32(&new_stack, (Bit16u)(temp_SP-10), cs_descriptor.dpl, (Bit16u) old_EIP);
          temp_SP -= 10;

          if (push_error) {
            temp_SP -= 2;
            write_new_stack_word_32(&new_stack, temp_SP, cs_descriptor.dpl, error_code);
          }
        }

        SP = temp_SP;
      }

      // load new CS:eIP values from gate
      // set CPL to new code segment DPL
      // set RPL of CS to CPL
      load_cs(&cs_selector, &cs_descriptor, cs_descriptor.dpl);

      // load new SS:eSP values from TSS
      load_ss(&ss_selector, &ss_descriptor, cs_descriptor.dpl);

      if (is_v8086_mode)
      {
        BX_CPU_THIS_PTR sregs[BX_SEG_REG_GS].cache.valid = 0;
        BX_CPU_THIS_PTR sregs[BX_SEG_REG_GS].selector.value = 0;
        BX_CPU_THIS_PTR sregs[BX_SEG_REG_FS].cache.valid = 0;
        BX_CPU_THIS_PTR sregs[BX_SEG_REG_FS].selector.value = 0;
        BX_CPU_THIS_PTR sregs[BX_SEG_REG_DS].cache.valid = 0;
        BX_CPU_THIS_PTR sregs[BX_SEG_REG_DS].selector.value = 0;
        BX_CPU_THIS_PTR sregs[BX_SEG_REG_ES].cache.valid = 0;
        BX_CPU_THIS_PTR sregs[BX_SEG_REG_ES].selector.value = 0;
      }
    }
    else
    {
      BX_DEBUG(("interrupt(): INTERRUPT TO SAME PRIVILEGE"));

      if (v8086_mode() && (IS_CODE_SEGMENT_CONFORMING(cs_descriptor.type) || cs_descriptor.dpl != 0)) {
        // if code segment DPL != 0 then #GP(new code segment selector)
        BX_ERROR(("interrupt(): code segment conforming or DPL(%d) != 0 in v8086 mode", cs_descriptor.dpl));
        exception(BX_GP_EXCEPTION, cs_selector.value & 0xfffc);
      }

      // EIP must be in CS limit else #GP(0)
      if (gate_dest_offset > cs_descriptor.u.segment.limit_scaled) {
        BX_ERROR(("interrupt(): IP > CS descriptor limit"));
        exception(BX_GP_EXCEPTION, 0);
      }

      // push flags onto stack
      // push current CS selector onto stack
      // push return offset onto stack
      if (gate_descriptor.type >= 14) { // 386 gate
        push_32(read_eflags());
        push_32(BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS].selector.value);
        push_32(EIP);
        if (push_error)
          push_32(error_code);
      }
      else { // 286 gate
        push_16((Bit16u) read_eflags());
        push_16(BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS].selector.value);
        push_16(IP);
        if (push_error)
          push_16(error_code);
      }

      // load CS:IP from gate
      // load CS descriptor
      // set the RPL field of CS to CPL
      load_cs(&cs_selector, &cs_descriptor, CPL);
    }

    EIP = gate_dest_offset;

    // if interrupt gate then set IF to 0
    if (!(gate_descriptor.type & 1)) // even is int-gate
      BX_CPU_THIS_PTR clear_IF();
    BX_CPU_THIS_PTR clear_TF();
    BX_CPU_THIS_PTR clear_NT();
    BX_CPU_THIS_PTR clear_VM();
    BX_CPU_THIS_PTR clear_RF();
    return;

  default:
    BX_PANIC(("bad descriptor type in interrupt()!"));
    break;
  }
}
예제 #16
0
파일: call_far.cpp 프로젝트: iver6/BA
BX_CPU_C::call_protected(bxInstruction_c *i, Bit16u cs_raw, bx_address disp)
{
  bx_selector_t cs_selector;
  Bit32u dword1, dword2;
  bx_descriptor_t cs_descriptor;

  /* new cs selector must not be null, else #GP(0) */
  if ((cs_raw & 0xfffc) == 0) {
    BX_ERROR(("call_protected: CS selector null"));
    exception(BX_GP_EXCEPTION, 0);
  }

  parse_selector(cs_raw, &cs_selector);
  // check new CS selector index within its descriptor limits,
  // else #GP(new CS selector)
  fetch_raw_descriptor(&cs_selector, &dword1, &dword2, BX_GP_EXCEPTION);
  parse_descriptor(dword1, dword2, &cs_descriptor);

  // examine AR byte of selected descriptor for various legal values
  if (cs_descriptor.valid==0) {
    BX_ERROR(("call_protected: invalid CS descriptor"));
    exception(BX_GP_EXCEPTION, cs_raw & 0xfffc);
  }

  if (cs_descriptor.segment)   // normal segment
  {
    check_cs(&cs_descriptor, cs_raw, BX_SELECTOR_RPL(cs_raw), CPL);

#if BX_SUPPORT_X86_64
    if (long_mode() && cs_descriptor.u.segment.l) {
      Bit64u temp_rsp = RSP; 
      // moving to long mode, push return address onto 64-bit stack
      if (i->os64L()) {
        write_new_stack_qword_64(temp_rsp -  8, cs_descriptor.dpl,
             BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS].selector.value);
        write_new_stack_qword_64(temp_rsp - 16, cs_descriptor.dpl, RIP);
        temp_rsp -= 16;
      }
      else if (i->os32L()) {
        write_new_stack_dword_64(temp_rsp - 4, cs_descriptor.dpl,
             BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS].selector.value);
        write_new_stack_dword_64(temp_rsp - 8, cs_descriptor.dpl, EIP);
        temp_rsp -= 8;
      }
      else {
        write_new_stack_word_64(temp_rsp - 2, cs_descriptor.dpl,
             BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS].selector.value);
        write_new_stack_word_64(temp_rsp - 4, cs_descriptor.dpl, IP);
        temp_rsp -= 4;
      }

      // load code segment descriptor into CS cache
      // load CS with new code segment selector
      // set RPL of CS to CPL
      branch_far64(&cs_selector, &cs_descriptor, disp, CPL);

      RSP = temp_rsp;
    }
    else
#endif
    {
      Bit32u temp_RSP;

      // moving to legacy mode, push return address onto 32-bit stack
      if (BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS].cache.u.segment.d_b)
        temp_RSP = ESP;
      else
        temp_RSP = SP;

#if BX_SUPPORT_X86_64
      if (i->os64L()) {
        write_new_stack_qword_32(&BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS],
             temp_RSP -  8, cs_descriptor.dpl,
             BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS].selector.value);
        write_new_stack_qword_32(&BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS],
             temp_RSP - 16, cs_descriptor.dpl, RIP);
        temp_RSP -= 16;
      }
      else
#endif
      if (i->os32L()) {
        write_new_stack_dword_32(&BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS],
             temp_RSP - 4, cs_descriptor.dpl,
             BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS].selector.value);
        write_new_stack_dword_32(&BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS],
             temp_RSP - 8, cs_descriptor.dpl, EIP);
        temp_RSP -= 8;
      }
      else {
        write_new_stack_word_32(&BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS],
             temp_RSP - 2, cs_descriptor.dpl,
             BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS].selector.value);
        write_new_stack_word_32(&BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS],
             temp_RSP - 4, cs_descriptor.dpl, IP);
        temp_RSP -= 4;
      }

      // load code segment descriptor into CS cache
      // load CS with new code segment selector
      // set RPL of CS to CPL
      branch_far64(&cs_selector, &cs_descriptor, disp, CPL);

      if (BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS].cache.u.segment.d_b)
        ESP = (Bit32u) temp_RSP;
      else
         SP = (Bit16u) temp_RSP;
    }

    return;
  }
  else { // gate & special segment
    bx_descriptor_t  gate_descriptor = cs_descriptor;
    bx_selector_t    gate_selector = cs_selector;

    // descriptor DPL must be >= CPL else #GP(gate selector)
    if (gate_descriptor.dpl < CPL) {
      BX_ERROR(("call_protected: descriptor.dpl < CPL"));
      exception(BX_GP_EXCEPTION, cs_raw & 0xfffc);
    }

    // descriptor DPL must be >= gate selector RPL else #GP(gate selector)
    if (gate_descriptor.dpl < gate_selector.rpl) {
      BX_ERROR(("call_protected: descriptor.dpl < selector.rpl"));
      exception(BX_GP_EXCEPTION, cs_raw & 0xfffc);
    }

#if BX_SUPPORT_X86_64
    if (long_mode()) {
      // call gate type is higher priority than non-present bit check
      if (gate_descriptor.type != BX_386_CALL_GATE) {
        BX_ERROR(("call_protected: gate type %u unsupported in long mode", (unsigned) gate_descriptor.type));
        exception(BX_GP_EXCEPTION, cs_raw & 0xfffc);
      }
      // gate descriptor must be present else #NP(gate selector)
      if (! IS_PRESENT(gate_descriptor)) {
        BX_ERROR(("call_protected: call gate not present"));
        exception(BX_NP_EXCEPTION, cs_raw & 0xfffc);
      }

      call_gate64(&gate_selector);
      return;
    }
#endif

    switch (gate_descriptor.type) {
      case BX_SYS_SEGMENT_AVAIL_286_TSS:
      case BX_SYS_SEGMENT_AVAIL_386_TSS:
        if (gate_descriptor.type==BX_SYS_SEGMENT_AVAIL_286_TSS)
          BX_DEBUG(("call_protected: 16bit available TSS"));
        else
          BX_DEBUG(("call_protected: 32bit available TSS"));

        if (gate_descriptor.valid==0 || gate_selector.ti) {
          BX_ERROR(("call_protected: call bad TSS selector !"));
          exception(BX_GP_EXCEPTION, cs_raw & 0xfffc);
        }

        // TSS must be present, else #NP(TSS selector)
        if (! IS_PRESENT(gate_descriptor)) {
          BX_ERROR(("call_protected: call not present TSS !"));
          exception(BX_NP_EXCEPTION, cs_raw & 0xfffc);
        }

        // SWITCH_TASKS _without_ nesting to TSS
        task_switch(i, &gate_selector, &gate_descriptor,
          BX_TASK_FROM_CALL, dword1, dword2);

        // EIP must be in code seg limit, else #GP(0)
        if (EIP > BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS].cache.u.segment.limit_scaled) {
          BX_ERROR(("call_protected: EIP not within CS limits"));
          exception(BX_GP_EXCEPTION, 0);
        }
        return;

      case BX_TASK_GATE:
        task_gate(i, &gate_selector, &gate_descriptor, BX_TASK_FROM_CALL);
        return;

      case BX_286_CALL_GATE:
      case BX_386_CALL_GATE:
        // gate descriptor must be present else #NP(gate selector)
        if (! IS_PRESENT(gate_descriptor)) {
          BX_ERROR(("call_protected: gate not present"));
          exception(BX_NP_EXCEPTION, cs_raw & 0xfffc);
        }
        call_gate(&gate_descriptor);
        return;

      default: // can't get here
        BX_ERROR(("call_protected(): gate.type(%u) unsupported", (unsigned) gate_descriptor.type));
        exception(BX_GP_EXCEPTION, cs_raw & 0xfffc);
    }
  }
}
예제 #17
0
static int u32_parse_opt(struct filter_util *qu, char *handle, int argc, char **argv, struct nlmsghdr *n)
{
	struct {
		struct tc_u32_sel sel;
		struct tc_u32_key keys[128];
	} sel;
	struct tcmsg *t = NLMSG_DATA(n);
	struct rtattr *tail;
	int sel_ok = 0;
	int sample_ok = 0;
	__u32 htid = 0;
	__u32 order = 0;

	memset(&sel, 0, sizeof(sel));

	if (handle && get_u32_handle(&t->tcm_handle, handle)) {
		fprintf(stderr, "Illegal filter ID\n");
		return -1;
	}

	if (argc == 0)
		return 0;

	tail = (struct rtattr*)(((void*)n)+NLMSG_ALIGN(n->nlmsg_len));
	addattr_l(n, 4096, TCA_OPTIONS, NULL, 0);

	while (argc > 0) {
		if (matches(*argv, "match") == 0) {
			NEXT_ARG();
			if (parse_selector(&argc, &argv, &sel.sel)) {
				fprintf(stderr, "Illegal \"match\"\n");
				return -1;
			}
			sel_ok++;
			continue;
		} else if (matches(*argv, "offset") == 0) {
			NEXT_ARG();
			if (parse_offset(&argc, &argv, &sel.sel)) {
				fprintf(stderr, "Illegal \"offset\"\n");
				return -1;
			}
			continue;
		} else if (matches(*argv, "hashkey") == 0) {
			NEXT_ARG();
			if (parse_hashkey(&argc, &argv, &sel.sel)) {
				fprintf(stderr, "Illegal \"hashkey\"\n");
				return -1;
			}
			continue;
		} else if (matches(*argv, "classid") == 0 ||
			   strcmp(*argv, "flowid") == 0) {
			unsigned handle;
			NEXT_ARG();
			if (get_tc_classid(&handle, *argv)) {
				fprintf(stderr, "Illegal \"classid\"\n");
				return -1;
			}
			addattr_l(n, 4096, TCA_U32_CLASSID, &handle, 4);
			sel.sel.flags |= TC_U32_TERMINAL;
		} else if (matches(*argv, "divisor") == 0) {
			unsigned divisor;
			NEXT_ARG();
			if (get_unsigned(&divisor, *argv, 0) || divisor == 0 ||
			    divisor > 0x100) {
				fprintf(stderr, "Illegal \"divisor\"\n");
				return -1;
			}
			addattr_l(n, 4096, TCA_U32_DIVISOR, &divisor, 4);
		} else if (matches(*argv, "order") == 0) {
			NEXT_ARG();
			if (get_u32(&order, *argv, 0)) {
				fprintf(stderr, "Illegal \"order\"\n");
				return -1;
			}
		} else if (strcmp(*argv, "link") == 0) {
			unsigned handle;
			NEXT_ARG();
			if (get_u32_handle(&handle, *argv)) {
				fprintf(stderr, "Illegal \"link\"\n");
				return -1;
			}
			if (handle && TC_U32_NODE(handle)) {
				fprintf(stderr, "\"link\" must be a hash table.\n");
				return -1;
			}
			addattr_l(n, 4096, TCA_U32_LINK, &handle, 4);
		} else if (strcmp(*argv, "ht") == 0) {
			unsigned handle;
			NEXT_ARG();
			if (get_u32_handle(&handle, *argv)) {
				fprintf(stderr, "Illegal \"ht\"\n");
				return -1;
			}
			if (handle && TC_U32_NODE(handle)) {
				fprintf(stderr, "\"ht\" must be a hash table.\n");
				return -1;
			}
			if (sample_ok)
				htid = (htid&0xFF000)|(handle&0xFFF00000);
			else
				htid = (handle&0xFFFFF000);
		} else if (strcmp(*argv, "sample") == 0) {
			__u32 hash;
			struct {
				struct tc_u32_sel sel;
				struct tc_u32_key keys[4];
			} sel2;
			NEXT_ARG();
			if (parse_selector(&argc, &argv, &sel2.sel)) {
				fprintf(stderr, "Illegal \"sample\"\n");
				return -1;
			}
			if (sel2.sel.nkeys != 1) {
				fprintf(stderr, "\"sample\" must contain exactly ONE key.\n");
				return -1;
			}
			hash = sel2.sel.keys[0].val&sel2.sel.keys[0].mask;
			hash ^= hash>>16;
			hash ^= hash>>8;
			htid = ((hash<<12)&0xFF000)|(htid&0xFFF00000);
			sample_ok = 1;
			continue;
#ifdef TC_CONFIG_ALL
		} else if (matches(*argv, "police") == 0) {
예제 #18
0
void
load_tr(UINT16 selector)
{
    selector_t task_sel;
    int rv;
#if defined(IA32_SUPPORT_DEBUG_REGISTER)
    int i;
#endif
    UINT16 iobase;

    rv = parse_selector(&task_sel, selector);
    if (rv < 0 || task_sel.ldt || task_sel.desc.s) {
        EXCEPTION(GP_EXCEPTION, task_sel.idx);
    }

    /* check descriptor type & stack room size */
    switch (task_sel.desc.type) {
    case CPU_SYSDESC_TYPE_TSS_16:
        if (task_sel.desc.u.seg.limit < 0x2b) {
            EXCEPTION(TS_EXCEPTION, task_sel.idx);
        }
        iobase = 0;
        break;

    case CPU_SYSDESC_TYPE_TSS_32:
        if (task_sel.desc.u.seg.limit < 0x67) {
            EXCEPTION(TS_EXCEPTION, task_sel.idx);
        }
        iobase = cpu_kmemoryread_w(task_sel.desc.u.seg.segbase + 102);
        break;

    default:
        EXCEPTION(GP_EXCEPTION, task_sel.idx);
        return;
    }

    /* not present */
    rv = selector_is_not_present(&task_sel);
    if (rv < 0) {
        EXCEPTION(NP_EXCEPTION, task_sel.idx);
    }

#if defined(MORE_DEBUG)
    tr_dump(task_sel.selector, task_sel.desc.u.seg.segbase, task_sel.desc.u.seg.limit);
#endif

    CPU_SET_TASK_BUSY(task_sel.selector, &task_sel.desc);
    CPU_TR = task_sel.selector;
    CPU_TR_DESC = task_sel.desc;

    /* I/O deny bitmap */
    if (task_sel.desc.type == CPU_SYSDESC_TYPE_TSS_BUSY_32) {
        if (iobase != 0 && iobase < task_sel.desc.u.seg.limit) {
            CPU_STAT_IOLIMIT = (UINT16)(task_sel.desc.u.seg.limit - iobase);
            CPU_STAT_IOADDR = task_sel.desc.u.seg.segbase + iobase;
        } else {
            CPU_STAT_IOLIMIT = 0;
        }
    } else {
        CPU_STAT_IOLIMIT = 0;
    }

#if defined(IA32_SUPPORT_DEBUG_REGISTER)
    /* clear local break point flags */
    CPU_DR7 &= ~(CPU_DR7_L(0)|CPU_DR7_L(1)|CPU_DR7_L(2)|CPU_DR7_L(3)|CPU_DR7_LE);
    CPU_STAT_BP = 0;
    for (i = 0; i < CPU_DEBUG_REG_INDEX_NUM; i++) {
        if (CPU_DR7 & CPU_DR7_G(i)) {
            CPU_STAT_BP |= (1 << i);
        }
    }
#endif
}
예제 #19
0
void
task_switch(selector_t *task_sel, task_switch_type_t type)
{
    UINT32 regs[CPU_REG_NUM];
    UINT32 eip;
    UINT32 new_flags;
    UINT32 cr3 = 0;
    UINT16 sreg[CPU_SEGREG_NUM];
    UINT16 ldtr;
    UINT16 iobase;
    UINT16 t;

    selector_t cs_sel;
    int rv;

    UINT32 cur_base;	/* current task state */
    UINT32 task_base;	/* new task state */
    UINT32 old_flags = REAL_EFLAGREG;
    BOOL task16;
    UINT i;

    VERBOSE(("task_switch: start"));

    /* limit check */
    switch (task_sel->desc.type) {
    case CPU_SYSDESC_TYPE_TSS_32:
    case CPU_SYSDESC_TYPE_TSS_BUSY_32:
        if (task_sel->desc.u.seg.limit < 0x67) {
            EXCEPTION(TS_EXCEPTION, task_sel->idx);
        }
        task16 = FALSE;
        break;

    case CPU_SYSDESC_TYPE_TSS_16:
    case CPU_SYSDESC_TYPE_TSS_BUSY_16:
        if (task_sel->desc.u.seg.limit < 0x2b) {
            EXCEPTION(TS_EXCEPTION, task_sel->idx);
        }
        task16 = TRUE;
        break;

    default:
        ia32_panic("task_switch: descriptor type is invalid.");
        task16 = FALSE;		/* compiler happy */
        break;
    }

    cur_base = CPU_TR_DESC.u.seg.segbase;
    task_base = task_sel->desc.u.seg.segbase;
    VERBOSE(("task_switch: cur task (%04x) = 0x%08x:%08x", CPU_TR, cur_base, CPU_TR_DESC.u.seg.limit));
    VERBOSE(("task_switch: new task (%04x) = 0x%08x:%08x", task_sel->selector, task_base, task_sel->desc.u.seg.limit));
    VERBOSE(("task_switch: %dbit task switch", task16 ? 16 : 32));

#if defined(MORE_DEBUG)
    {
        UINT32 v;

        VERBOSE(("task_switch: new task"));
        for (i = 0; i < task_sel->desc.u.seg.limit; i += 4) {
            v = cpu_kmemoryread_d(task_base + i);
            VERBOSE(("task_switch: 0x%08x: %08x", task_base + i,v));
        }
    }
#endif

    if (CPU_STAT_PAGING) {
        /* task state paging check */
        paging_check(cur_base, CPU_TR_DESC.u.seg.limit, CPU_PAGE_WRITE_DATA|CPU_MODE_SUPERVISER);
        paging_check(task_base, task_sel->desc.u.seg.limit, CPU_PAGE_WRITE_DATA|CPU_MODE_SUPERVISER);
    }

    /* load task state */
    memset(sreg, 0, sizeof(sreg));
    if (!task16) {
        if (CPU_STAT_PAGING) {
            cr3 = cpu_kmemoryread_d(task_base + 28);
        }
        eip = cpu_kmemoryread_d(task_base + 32);
        new_flags = cpu_kmemoryread_d(task_base + 36);
        for (i = 0; i < CPU_REG_NUM; i++) {
            regs[i] = cpu_kmemoryread_d(task_base + 40 + i * 4);
        }
        for (i = 0; i < CPU_SEGREG_NUM; i++) {
            sreg[i] = cpu_kmemoryread_w(task_base + 72 + i * 4);
        }
        ldtr = cpu_kmemoryread_w(task_base + 96);
        t = cpu_kmemoryread_w(task_base + 100);
        if (t & 1) {
            CPU_STAT_BP_EVENT |= CPU_STAT_BP_EVENT_TASK;
        }
        iobase = cpu_kmemoryread_w(task_base + 102);
    } else {
        eip = cpu_kmemoryread_w(task_base + 14);
        new_flags = cpu_kmemoryread_w(task_base + 16);
        for (i = 0; i < CPU_REG_NUM; i++) {
            regs[i] = cpu_kmemoryread_w(task_base + 18 + i * 2);
        }
        for (i = 0; i < CPU_SEGREG286_NUM; i++) {
            sreg[i] = cpu_kmemoryread_w(task_base + 34 + i * 2);
        }
        ldtr = cpu_kmemoryread_w(task_base + 42);
        iobase = 0;
        t = 0;
    }

#if defined(DEBUG)
    VERBOSE(("task_switch: current task"));
    if (!task16) {
        VERBOSE(("task_switch: CR3     = 0x%08x", CPU_CR3));
    }
    VERBOSE(("task_switch: eip     = 0x%08x", CPU_EIP));
    VERBOSE(("task_switch: eflags  = 0x%08x", old_flags));
    for (i = 0; i < CPU_REG_NUM; i++) {
        VERBOSE(("task_switch: regs[%d] = 0x%08x", i, CPU_REGS_DWORD(i)));
    }
    for (i = 0; i < CPU_SEGREG_NUM; i++) {
        VERBOSE(("task_switch: sreg[%d] = 0x%04x", i, CPU_REGS_SREG(i)));
    }
    VERBOSE(("task_switch: ldtr    = 0x%04x", CPU_LDTR));

    VERBOSE(("task_switch: new task"));
    if (!task16) {
        VERBOSE(("task_switch: CR3     = 0x%08x", cr3));
    }
    VERBOSE(("task_switch: eip     = 0x%08x", eip));
    VERBOSE(("task_switch: eflags  = 0x%08x", new_flags));
    for (i = 0; i < CPU_REG_NUM; i++) {
        VERBOSE(("task_switch: regs[%d] = 0x%08x", i, regs[i]));
    }
    for (i = 0; i < CPU_SEGREG_NUM; i++) {
        VERBOSE(("task_switch: sreg[%d] = 0x%04x", i, sreg[i]));
    }
    VERBOSE(("task_switch: ldtr    = 0x%04x", ldtr));
    if (!task16) {
        VERBOSE(("task_switch: t       = 0x%04x", t));
        VERBOSE(("task_switch: iobase  = 0x%04x", iobase));
    }
#endif

    /* if IRET or JMP, clear busy flag in this task: need */
    /* if IRET, clear NT_FLAG in current EFLAG: need */
    switch (type) {
    case TASK_SWITCH_IRET:
        /* clear NT_FLAG */
        old_flags &= ~NT_FLAG;
    /*FALLTHROUGH*/
    case TASK_SWITCH_JMP:
        /* clear busy flags in current task */
        CPU_SET_TASK_FREE(CPU_TR, &CPU_TR_DESC);
        break;

    case TASK_SWITCH_CALL:
    case TASK_SWITCH_INTR:
        /* Nothing to do */
        break;

    default:
        ia32_panic("task_switch(): task switch type is invalid");
        break;
    }

    /* save this task state in this task state segment */
    if (!task16) {
        cpu_kmemorywrite_d(cur_base + 32, CPU_EIP);
        cpu_kmemorywrite_d(cur_base + 36, old_flags);
        for (i = 0; i < CPU_REG_NUM; i++) {
            cpu_kmemorywrite_d(cur_base + 40 + i * 4, CPU_REGS_DWORD(i));
        }
        for (i = 0; i < CPU_SEGREG_NUM; i++) {
            cpu_kmemorywrite_w(cur_base + 72 + i * 4, CPU_REGS_SREG(i));
        }
    } else {
        cpu_kmemorywrite_w(cur_base + 14, CPU_IP);
        cpu_kmemorywrite_w(cur_base + 16, (UINT16)old_flags);
        for (i = 0; i < CPU_REG_NUM; i++) {
            cpu_kmemorywrite_w(cur_base + 18 + i * 2, CPU_REGS_WORD(i));
        }
        for (i = 0; i < CPU_SEGREG286_NUM; i++) {
            cpu_kmemorywrite_w(cur_base + 34 + i * 2, CPU_REGS_SREG(i));
        }
    }

#if defined(MORE_DEBUG)
    {
        UINT32 v;

        VERBOSE(("task_switch: current task"));
        for (i = 0; i < CPU_TR_DESC.u.seg.limit; i += 4) {
            v = cpu_kmemoryread_d(cur_base + i);
            VERBOSE(("task_switch: 0x%08x: %08x", cur_base + i, v));
        }
    }
#endif

    /* set back link selector */
    switch (type) {
    case TASK_SWITCH_CALL:
    case TASK_SWITCH_INTR:
        /* set back link selector */
        cpu_kmemorywrite_w(task_base, CPU_TR);
        break;

    case TASK_SWITCH_IRET:
    case TASK_SWITCH_JMP:
        /* Nothing to do */
        break;

    default:
        ia32_panic("task_switch(): task switch type is invalid");
        break;
    }

    /* Now task switching! */

    /* if CALL, INTR, set EFLAGS image NT_FLAG */
    /* if CALL, INTR, JMP set busy flag */
    switch (type) {
    case TASK_SWITCH_CALL:
    case TASK_SWITCH_INTR:
        /* set back link selector */
        new_flags |= NT_FLAG;
    /*FALLTHROUGH*/
    case TASK_SWITCH_JMP:
        CPU_SET_TASK_BUSY(task_sel->selector, &task_sel->desc);
        break;

    case TASK_SWITCH_IRET:
        /* check busy flag is active */
        if (task_sel->desc.valid) {
            UINT32 h;
            h = cpu_kmemoryread_d(task_sel->addr + 4);
            if ((h & CPU_TSS_H_BUSY) == 0) {
                ia32_panic("task_switch: new task is not busy");
            }
        }
        break;

    default:
        ia32_panic("task_switch(): task switch type is invalid");
        break;
    }

    /* set CR0 image CPU_CR0_TS */
    CPU_CR0 |= CPU_CR0_TS;

    /* load task selector to CPU_TR */
    CPU_TR = task_sel->selector;
    CPU_TR_DESC = task_sel->desc;

    /* load task state (CR3, EFLAG, EIP, GPR, segreg, LDTR) */

    /* set new CR3 */
    if (!task16 && CPU_STAT_PAGING) {
        set_CR3(cr3);
    }

    /* set new EIP, GPR */
    CPU_PREV_EIP = CPU_EIP = eip;
    for (i = 0; i < CPU_REG_NUM; i++) {
        CPU_REGS_DWORD(i) = regs[i];
    }
    for (i = 0; i < CPU_SEGREG_NUM; i++) {
        CPU_REGS_SREG(i) = sreg[i];
        CPU_STAT_SREG_INIT(i);
    }

    /* set new EFLAGS */
    set_eflags(new_flags, I_FLAG|IOPL_FLAG|RF_FLAG|VM_FLAG|VIF_FLAG|VIP_FLAG);

    /* I/O deny bitmap */
    if (!task16) {
        if (iobase != 0 && iobase < task_sel->desc.u.seg.limit) {
            CPU_STAT_IOLIMIT = (UINT16)(task_sel->desc.u.seg.limit - iobase);
            CPU_STAT_IOADDR = task_sel->desc.u.seg.segbase + iobase;
        } else {
            CPU_STAT_IOLIMIT = 0;
        }
    } else {
        CPU_STAT_IOLIMIT = 0;
    }
    VERBOSE(("task_switch: ioaddr = %08x, limit = %08x", CPU_STAT_IOADDR, CPU_STAT_IOLIMIT));

#if defined(IA32_SUPPORT_DEBUG_REGISTER)
    /* check resume flag */
    if (CPU_EFLAG & RF_FLAG) {
        CPU_STAT_BP_EVENT |= CPU_STAT_BP_EVENT_RF;
    }

    /* clear local break point flags */
    CPU_DR7 &= ~(CPU_DR7_L(0)|CPU_DR7_L(1)|CPU_DR7_L(2)|CPU_DR7_L(3)|CPU_DR7_LE);
    CPU_STAT_BP = 0;
    for (i = 0; i < CPU_DEBUG_REG_INDEX_NUM; i++) {
        if (CPU_DR7 & CPU_DR7_G(i)) {
            CPU_STAT_BP |= (1 << i);
        }
    }
#endif

    /* load new LDTR */
    load_ldtr(ldtr, TS_EXCEPTION);

    /* set new segment register */
    if (!CPU_STAT_VM86) {
        /* clear segment descriptor cache */
        for (i = 0; i < CPU_SEGREG_NUM; i++) {
            CPU_STAT_SREG_CLEAR(i);
        }

        /* load CS */
        rv = parse_selector(&cs_sel, sreg[CPU_CS_INDEX]);
        if (rv < 0) {
            VERBOSE(("task_switch: load CS failure (sel = 0x%04x, rv = %d)", sreg[CPU_CS_INDEX], rv));
            EXCEPTION(TS_EXCEPTION, cs_sel.idx);
        }

        /* CS register must be code segment */
        if (!cs_sel.desc.s || !cs_sel.desc.u.seg.c) {
            EXCEPTION(TS_EXCEPTION, cs_sel.idx);
        }

        /* check privilege level */
        if (!cs_sel.desc.u.seg.ec) {
            /* non-confirming code segment */
            if (cs_sel.desc.dpl != cs_sel.rpl) {
                EXCEPTION(TS_EXCEPTION, cs_sel.idx);
            }
        } else {
            /* confirming code segment */
            if (cs_sel.desc.dpl < cs_sel.rpl) {
                EXCEPTION(TS_EXCEPTION, cs_sel.idx);
            }
        }

        /* code segment is not present */
        rv = selector_is_not_present(&cs_sel);
        if (rv < 0) {
            EXCEPTION(NP_EXCEPTION, cs_sel.idx);
        }

        /* Now loading CS register */
        load_cs(cs_sel.selector, &cs_sel.desc, cs_sel.desc.dpl);

        /* load ES, SS, DS, FS, GS segment register */
        for (i = 0; i < CPU_SEGREG_NUM; i++) {
            if (i != CPU_CS_INDEX) {
                load_segreg(i, sreg[i], TS_EXCEPTION);
            }
        }
    }

    /* out of range */
    if (CPU_EIP > CPU_STAT_CS_LIMIT) {
        VERBOSE(("task_switch: new_ip is out of range. new_ip = %08x, limit = %08x", CPU_EIP, CPU_STAT_CS_LIMIT));
        EXCEPTION(GP_EXCEPTION, 0);
    }

    VERBOSE(("task_switch: done."));
}
예제 #20
0
void BX_CPU_C::task_switch(bx_selector_t *tss_selector,
                 bx_descriptor_t *tss_descriptor, unsigned source,
                 Bit32u dword1, Bit32u dword2)
{
  Bit32u obase32; // base address of old TSS
  Bit32u nbase32; // base address of new TSS
  Bit32u temp32, newCR3;
  Bit16u raw_cs_selector, raw_ss_selector, raw_ds_selector, raw_es_selector,
         raw_fs_selector, raw_gs_selector, raw_ldt_selector;
  Bit16u temp16, trap_word;
  bx_selector_t cs_selector, ss_selector, ds_selector, es_selector,
                fs_selector, gs_selector, ldt_selector;
  bx_descriptor_t cs_descriptor, ss_descriptor, ldt_descriptor;
  Bit32u old_TSS_max, new_TSS_max, old_TSS_limit, new_TSS_limit;
  Bit32u newEAX, newECX, newEDX, newEBX;
  Bit32u newESP, newEBP, newESI, newEDI;
  Bit32u newEFLAGS, newEIP;

  BX_DEBUG(("TASKING: ENTER"));

  invalidate_prefetch_q();

  // Discard any traps and inhibits for new context; traps will
  // resume upon return.
  BX_CPU_THIS_PTR debug_trap = 0;
  BX_CPU_THIS_PTR inhibit_mask = 0;

  // STEP 1: The following checks are made before calling task_switch(),
  //         for JMP & CALL only. These checks are NOT made for exceptions,
  //         interrupts & IRET.
  //
  //   1) TSS DPL must be >= CPL
  //   2) TSS DPL must be >= TSS selector RPL
  //   3) TSS descriptor is not busy.

  // TSS must be present, else #NP(TSS selector)
  if (tss_descriptor->p==0) {
    BX_ERROR(("task_switch: TSS descriptor is not present !"));
    exception(BX_NP_EXCEPTION, tss_selector->value & 0xfffc, 0);
  }

  // STEP 2: The processor performs limit-checking on the target TSS
  //         to verify that the TSS limit is greater than or equal
  //         to 67h (2Bh for 16-bit TSS).

  // Gather info about old TSS
  if (BX_CPU_THIS_PTR tr.cache.type <= 3) {
    old_TSS_max = 0x29;
  }
  else {
    old_TSS_max = 0x5F;
  }
  // Gather info about new TSS
  if (tss_descriptor->type <= 3) { // {1,3}
    new_TSS_max = 0x2B;
  }
  else { // tss_descriptor->type = {9,11}
    new_TSS_max = 0x67;
  }

  obase32 = (Bit32u) BX_CPU_THIS_PTR tr.cache.u.system.base;        // old TSS.base
  old_TSS_limit = BX_CPU_THIS_PTR tr.cache.u.system.limit_scaled;
  nbase32 = (Bit32u) tss_descriptor->u.system.base;                 // new TSS.base
  new_TSS_limit = tss_descriptor->u.system.limit_scaled;

  // TSS must have valid limit, else #TS(TSS selector)
  if (tss_selector->ti || tss_descriptor->valid==0 ||
      new_TSS_limit < new_TSS_max)
  {
    BX_ERROR(("task_switch(): new TSS limit < %d", new_TSS_max));
    exception(BX_TS_EXCEPTION, tss_selector->value & 0xfffc, 0);
  }

  if (old_TSS_limit < old_TSS_max) {
    BX_ERROR(("task_switch(): old TSS limit < %d", old_TSS_max));
    exception(BX_TS_EXCEPTION, BX_CPU_THIS_PTR tr.selector.value & 0xfffc, 0);
  }

  if (obase32 == nbase32) {
    BX_INFO(("TASK SWITCH: switching to the same TSS !"));
  }

  // Check that old TSS, new TSS, and all segment descriptors
  // used in the task switch are paged in.
  if (BX_CPU_THIS_PTR cr0.get_PG())
  {
    dtranslate_linear(obase32, 0, BX_WRITE); // new TSS
    dtranslate_linear(obase32 + old_TSS_max, 0, BX_WRITE);
    dtranslate_linear(nbase32, 0, BX_READ);  // old TSS
    dtranslate_linear(nbase32 + new_TSS_max, 0, BX_READ);

    // ??? Humm, we check the new TSS region with READ above,
    // but sometimes we need to write the link field in that
    // region.  We also sometimes update other fields, perhaps
    // we need to WRITE check them here also, so that we keep
    // the written state consistent (ie, we don't encounter a
    // page fault in the middle).

    if (source == BX_TASK_FROM_CALL_OR_INT)
    {
      dtranslate_linear(nbase32,     0, BX_WRITE);
      dtranslate_linear(nbase32 + 2, 0, BX_WRITE);
    }
  }

  // Privilege and busy checks done in CALL, JUMP, INT, IRET

  // STEP 3: Save the current task state in the TSS. Up to this point,
  //         any exception that occurs aborts the task switch without
  //         changing the processor state.

  /* save current machine state in old task's TSS */

  Bit32u oldEFLAGS = read_eflags();

  /* if moving to busy task, clear NT bit */
  if (tss_descriptor->type == BX_SYS_SEGMENT_BUSY_286_TSS ||
      tss_descriptor->type == BX_SYS_SEGMENT_BUSY_386_TSS)
  {
    oldEFLAGS &= ~EFlagsNTMask;
  }

  if (BX_CPU_THIS_PTR tr.cache.type <= 3) {
    temp16 = IP; access_write_linear(Bit32u(obase32 + 14), 2, 0, &temp16);
    temp16 = oldEFLAGS; access_write_linear(Bit32u(obase32 + 16), 2, 0, &temp16);
    temp16 = AX; access_write_linear(Bit32u(obase32 + 18), 2, 0, &temp16);
    temp16 = CX; access_write_linear(Bit32u(obase32 + 20), 2, 0, &temp16);
    temp16 = DX; access_write_linear(Bit32u(obase32 + 22), 2, 0, &temp16);
    temp16 = BX; access_write_linear(Bit32u(obase32 + 24), 2, 0, &temp16);
    temp16 = SP; access_write_linear(Bit32u(obase32 + 26), 2, 0, &temp16);
    temp16 = BP; access_write_linear(Bit32u(obase32 + 28), 2, 0, &temp16);
    temp16 = SI; access_write_linear(Bit32u(obase32 + 30), 2, 0, &temp16);
    temp16 = DI; access_write_linear(Bit32u(obase32 + 32), 2, 0, &temp16);
    temp16 = BX_CPU_THIS_PTR sregs[BX_SEG_REG_ES].selector.value;
                 access_write_linear(Bit32u(obase32 + 34), 2, 0, &temp16);
    temp16 = BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS].selector.value;
                 access_write_linear(Bit32u(obase32 + 36), 2, 0, &temp16);
    temp16 = BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS].selector.value;
                 access_write_linear(Bit32u(obase32 + 38), 2, 0, &temp16);
    temp16 = BX_CPU_THIS_PTR sregs[BX_SEG_REG_DS].selector.value;
                 access_write_linear(Bit32u(obase32 + 40), 2, 0, &temp16);
  }
  else {
    temp32 = EIP; access_write_linear(Bit32u(obase32 + 0x20), 4, 0, &temp32);
    temp32 = oldEFLAGS; access_write_linear(Bit32u(obase32 + 0x24), 4, 0, &temp32);
    temp32 = EAX; access_write_linear(Bit32u(obase32 + 0x28), 4, 0, &temp32);
    temp32 = ECX; access_write_linear(Bit32u(obase32 + 0x2c), 4, 0, &temp32);
    temp32 = EDX; access_write_linear(Bit32u(obase32 + 0x30), 4, 0, &temp32);
    temp32 = EBX; access_write_linear(Bit32u(obase32 + 0x34), 4, 0, &temp32);
    temp32 = ESP; access_write_linear(Bit32u(obase32 + 0x38), 4, 0, &temp32);
    temp32 = EBP; access_write_linear(Bit32u(obase32 + 0x3c), 4, 0, &temp32);
    temp32 = ESI; access_write_linear(Bit32u(obase32 + 0x40), 4, 0, &temp32);
    temp32 = EDI; access_write_linear(Bit32u(obase32 + 0x44), 4, 0, &temp32);
    temp16 = BX_CPU_THIS_PTR sregs[BX_SEG_REG_ES].selector.value;
                  access_write_linear(Bit32u(obase32 + 0x48), 2, 0, &temp16);
    temp16 = BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS].selector.value;
                  access_write_linear(Bit32u(obase32 + 0x4c), 2, 0, &temp16);
    temp16 = BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS].selector.value;
                  access_write_linear(Bit32u(obase32 + 0x50), 2, 0, &temp16);
    temp16 = BX_CPU_THIS_PTR sregs[BX_SEG_REG_DS].selector.value;
                  access_write_linear(Bit32u(obase32 + 0x54), 2, 0, &temp16);
    temp16 = BX_CPU_THIS_PTR sregs[BX_SEG_REG_FS].selector.value;
                  access_write_linear(Bit32u(obase32 + 0x58), 2, 0, &temp16);
    temp16 = BX_CPU_THIS_PTR sregs[BX_SEG_REG_GS].selector.value;
                  access_write_linear(Bit32u(obase32 + 0x5c), 2, 0, &temp16);
  }

  // effect on link field of new task
  if (source == BX_TASK_FROM_CALL_OR_INT)
  {
    // set to selector of old task's TSS
    temp16 = BX_CPU_THIS_PTR tr.selector.value;
    access_write_linear(nbase32, 2, 0, &temp16);
  }

  // STEP 4: The new-task state is loaded from the TSS

  if (tss_descriptor->type <= 3) {
    access_read_linear(Bit32u(nbase32 + 14), 2, 0, BX_READ, &temp16);
      newEIP = temp16; // zero out upper word
    access_read_linear(Bit32u(nbase32 + 16), 2, 0, BX_READ, &temp16);
      newEFLAGS = temp16;

    // incoming TSS is 16bit:
    //   - upper word of general registers is set to 0xFFFF
    //   - upper word of eflags is zero'd
    //   - FS, GS are zero'd
    //   - upper word of eIP is zero'd
    access_read_linear(Bit32u(nbase32 + 18), 2, 0, BX_READ, &temp16);
      newEAX = 0xffff0000 | temp16;
    access_read_linear(Bit32u(nbase32 + 20), 2, 0, BX_READ, &temp16);
      newECX = 0xffff0000 | temp16;
    access_read_linear(Bit32u(nbase32 + 22), 2, 0, BX_READ, &temp16);
      newEDX = 0xffff0000 | temp16;
    access_read_linear(Bit32u(nbase32 + 24), 2, 0, BX_READ, &temp16);
      newEBX = 0xffff0000 | temp16;
    access_read_linear(Bit32u(nbase32 + 26), 2, 0, BX_READ, &temp16);
      newESP = 0xffff0000 | temp16;
    access_read_linear(Bit32u(nbase32 + 28), 2, 0, BX_READ, &temp16);
      newEBP = 0xffff0000 | temp16;
    access_read_linear(Bit32u(nbase32 + 30), 2, 0, BX_READ, &temp16);
      newESI = 0xffff0000 | temp16;
    access_read_linear(Bit32u(nbase32 + 32), 2, 0, BX_READ, &temp16);
      newEDI = 0xffff0000 | temp16;

    access_read_linear(Bit32u(nbase32 + 34), 2, 0, BX_READ, &raw_es_selector);
    access_read_linear(Bit32u(nbase32 + 36), 2, 0, BX_READ, &raw_cs_selector);
    access_read_linear(Bit32u(nbase32 + 38), 2, 0, BX_READ, &raw_ss_selector);
    access_read_linear(Bit32u(nbase32 + 40), 2, 0, BX_READ, &raw_ds_selector);
    access_read_linear(Bit32u(nbase32 + 42), 2, 0, BX_READ, &raw_ldt_selector);

    raw_fs_selector = 0; // use a NULL selector
    raw_gs_selector = 0; // use a NULL selector
    // No CR3 change for 286 task switch
    newCR3 = 0;   // keep compiler happy (not used)
    trap_word = 0; // keep compiler happy (not used)
  }
  else {
    if (BX_CPU_THIS_PTR cr0.get_PG())
      access_read_linear(Bit32u(nbase32 + 0x1c), 4, 0, BX_READ, &newCR3);
    else
      newCR3 = 0;   // keep compiler happy (not used)
    access_read_linear(Bit32u(nbase32 + 0x20), 4, 0, BX_READ, &newEIP);
    access_read_linear(Bit32u(nbase32 + 0x24), 4, 0, BX_READ, &newEFLAGS);
    access_read_linear(Bit32u(nbase32 + 0x28), 4, 0, BX_READ, &newEAX);
    access_read_linear(Bit32u(nbase32 + 0x2c), 4, 0, BX_READ, &newECX);
    access_read_linear(Bit32u(nbase32 + 0x30), 4, 0, BX_READ, &newEDX);
    access_read_linear(Bit32u(nbase32 + 0x34), 4, 0, BX_READ, &newEBX);
    access_read_linear(Bit32u(nbase32 + 0x38), 4, 0, BX_READ, &newESP);
    access_read_linear(Bit32u(nbase32 + 0x3c), 4, 0, BX_READ, &newEBP);
    access_read_linear(Bit32u(nbase32 + 0x40), 4, 0, BX_READ, &newESI);
    access_read_linear(Bit32u(nbase32 + 0x44), 4, 0, BX_READ, &newEDI);
    access_read_linear(Bit32u(nbase32 + 0x48), 2, 0, BX_READ, &raw_es_selector);
    access_read_linear(Bit32u(nbase32 + 0x4c), 2, 0, BX_READ, &raw_cs_selector);
    access_read_linear(Bit32u(nbase32 + 0x50), 2, 0, BX_READ, &raw_ss_selector);
    access_read_linear(Bit32u(nbase32 + 0x54), 2, 0, BX_READ, &raw_ds_selector);
    access_read_linear(Bit32u(nbase32 + 0x58), 2, 0, BX_READ, &raw_fs_selector);
    access_read_linear(Bit32u(nbase32 + 0x5c), 2, 0, BX_READ, &raw_gs_selector);
    access_read_linear(Bit32u(nbase32 + 0x60), 2, 0, BX_READ, &raw_ldt_selector);
    access_read_linear(Bit32u(nbase32 + 0x64), 2, 0, BX_READ, &trap_word);
  }

  // Step 5: If CALL, interrupt, or JMP, set busy flag in new task's
  //         TSS descriptor.  If IRET, leave set.

  if (source == BX_TASK_FROM_JUMP || source == BX_TASK_FROM_CALL_OR_INT)
  {
    // set the new task's busy bit
    Bit32u laddr = (Bit32u)(BX_CPU_THIS_PTR gdtr.base) + (tss_selector->index<<3) + 4;
    access_read_linear(laddr, 4, 0, BX_READ, &dword2);
    dword2 |= 0x200;
    access_write_linear(laddr, 4, 0, &dword2);
  }

  // Step 6: If JMP or IRET, clear busy bit in old task TSS descriptor,
  //         otherwise leave set.

  // effect on Busy bit of old task
  if (source == BX_TASK_FROM_JUMP || source == BX_TASK_FROM_IRET) {
    // Bit is cleared
    Bit32u laddr = (Bit32u) BX_CPU_THIS_PTR gdtr.base + (BX_CPU_THIS_PTR tr.selector.index<<3) + 4;
    access_read_linear(laddr, 4, 0, BX_READ, &temp32);
    temp32 &= ~0x200;
    access_write_linear(laddr, 4, 0, &temp32);
  }

  //
  // Commit point.  At this point, we commit to the new
  // context.  If an unrecoverable error occurs in further
  // processing, we complete the task switch without performing
  // additional access and segment availablility checks and
  // generate the appropriate exception prior to beginning
  // execution of the new task.
  //

  // Step 7: Load the task register with the segment selector and
  //        descriptor for the new task TSS.

  BX_CPU_THIS_PTR tr.selector = *tss_selector;
  BX_CPU_THIS_PTR tr.cache    = *tss_descriptor;
  BX_CPU_THIS_PTR tr.cache.type |= 2; // mark TSS in TR as busy

  // Step 8: Set TS flag in the CR0 image stored in the new task TSS.
  BX_CPU_THIS_PTR cr0.set_TS(1);

  // Task switch clears LE/L3/L2/L1/L0 in DR7
  BX_CPU_THIS_PTR dr7 &= ~0x00000155;

  // Step 9: If call or interrupt, set the NT flag in the eflags
  //         image stored in new task's TSS.  If IRET or JMP,
  //         NT is restored from new TSS eflags image. (no change)

  // effect on NT flag of new task
  if (source == BX_TASK_FROM_CALL_OR_INT) {
    newEFLAGS |= EFlagsNTMask; // NT flag is set
  }

  // Step 10: Load the new task (dynamic) state from new TSS.
  //          Any errors associated with loading and qualification of
  //          segment descriptors in this step occur in the new task's
  //          context.  State loaded here includes LDTR, CR3,
  //          EFLAGS, EIP, general purpose registers, and segment
  //          descriptor parts of the segment registers.

  if ((tss_descriptor->type >= 9) && BX_CPU_THIS_PTR cr0.get_PG()) {
    // change CR3 only if it actually modified
    if (newCR3 != BX_CPU_THIS_PTR cr3) {
      SetCR3(newCR3); // Tell paging unit about new cr3 value
      BX_DEBUG (("task_switch changing CR3 to 0x" FMT_PHY_ADDRX, newCR3));
      BX_INSTR_TLB_CNTRL(BX_CPU_ID, BX_INSTR_TASKSWITCH, newCR3);
    }
  }

  BX_CPU_THIS_PTR prev_rip = EIP = newEIP;

  EAX = newEAX;
  ECX = newECX;
  EDX = newEDX;
  EBX = newEBX;
  ESP = newESP;
  EBP = newEBP;
  ESI = newESI;
  EDI = newEDI;

  writeEFlags(newEFLAGS, EFlagsValidMask);

  // Fill in selectors for all segment registers.  If errors
  // occur later, the selectors will at least be loaded.
  parse_selector(raw_cs_selector, &cs_selector);
  BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS].selector = cs_selector;
  parse_selector(raw_ds_selector, &ds_selector);
  BX_CPU_THIS_PTR sregs[BX_SEG_REG_DS].selector = ds_selector;
  parse_selector(raw_es_selector, &es_selector);
  BX_CPU_THIS_PTR sregs[BX_SEG_REG_ES].selector = es_selector;
  parse_selector(raw_ss_selector, &ss_selector);
  BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS].selector = ss_selector;
  parse_selector(raw_fs_selector, &fs_selector);
  BX_CPU_THIS_PTR sregs[BX_SEG_REG_FS].selector = fs_selector;
  parse_selector(raw_gs_selector, &gs_selector);
  BX_CPU_THIS_PTR sregs[BX_SEG_REG_GS].selector = gs_selector;

  parse_selector(raw_ldt_selector, &ldt_selector);
  BX_CPU_THIS_PTR ldtr.selector = ldt_selector;

  // Start out with invalid descriptor caches, fill in
  // with values only as they are validated.
  BX_CPU_THIS_PTR ldtr.cache.valid = 0;
  BX_CPU_THIS_PTR ldtr.cache.u.system.limit = 0;
  BX_CPU_THIS_PTR ldtr.cache.u.system.limit_scaled = 0;
  BX_CPU_THIS_PTR sregs[BX_SEG_REG_ES].cache.valid = 0;
  BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS].cache.valid = 0;
  BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS].cache.valid = 0;
  BX_CPU_THIS_PTR sregs[BX_SEG_REG_DS].cache.valid = 0;
  BX_CPU_THIS_PTR sregs[BX_SEG_REG_FS].cache.valid = 0;
  BX_CPU_THIS_PTR sregs[BX_SEG_REG_GS].cache.valid = 0;

  // LDTR
  if (ldt_selector.ti) {
    // LDT selector must be in GDT
    BX_INFO(("task_switch(exception after commit point): bad LDT selector TI=1"));
    exception(BX_TS_EXCEPTION, raw_ldt_selector & 0xfffc, 0);
  }

  if ((raw_ldt_selector & 0xfffc) != 0) {
    bx_bool good = fetch_raw_descriptor2(&ldt_selector, &dword1, &dword2);
    if (!good) {
      BX_ERROR(("task_switch(exception after commit point): bad LDT fetch"));
      exception(BX_TS_EXCEPTION, raw_ldt_selector & 0xfffc, 0);
    }

    parse_descriptor(dword1, dword2, &ldt_descriptor);

    // LDT selector of new task is valid, else #TS(new task's LDT)
    if (ldt_descriptor.valid==0 ||
        ldt_descriptor.type!=BX_SYS_SEGMENT_LDT ||
        ldt_descriptor.segment)
    {
      BX_ERROR(("task_switch(exception after commit point): bad LDT segment"));
      exception(BX_TS_EXCEPTION, raw_ldt_selector & 0xfffc, 0);
    }

    // LDT of new task is present in memory, else #TS(new tasks's LDT)
    if (! IS_PRESENT(ldt_descriptor)) {
      BX_ERROR(("task_switch(exception after commit point): LDT not present"));
      exception(BX_TS_EXCEPTION, raw_ldt_selector & 0xfffc, 0);
    }

    // All checks pass, fill in LDTR shadow cache
    BX_CPU_THIS_PTR ldtr.cache = ldt_descriptor;
  }
  else {
    // NULL LDT selector is OK, leave cache invalid
  }

  if (v8086_mode()) {
    // load seg regs as 8086 registers
    load_seg_reg(&BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS], raw_cs_selector);
    load_seg_reg(&BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS], raw_ss_selector);
    load_seg_reg(&BX_CPU_THIS_PTR sregs[BX_SEG_REG_DS], raw_ds_selector);
    load_seg_reg(&BX_CPU_THIS_PTR sregs[BX_SEG_REG_ES], raw_es_selector);
    load_seg_reg(&BX_CPU_THIS_PTR sregs[BX_SEG_REG_FS], raw_fs_selector);
    load_seg_reg(&BX_CPU_THIS_PTR sregs[BX_SEG_REG_GS], raw_gs_selector);
  }
  else {

    // SS
    if ((raw_ss_selector & 0xfffc) != 0)
    {
      bx_bool good = fetch_raw_descriptor2(&ss_selector, &dword1, &dword2);
      if (!good) {
        BX_ERROR(("task_switch(exception after commit point): bad SS fetch"));
        exception(BX_TS_EXCEPTION, raw_ss_selector & 0xfffc, 0);
      }

      parse_descriptor(dword1, dword2, &ss_descriptor);
      // SS selector must be within its descriptor table limits else #TS(SS)
      // SS descriptor AR byte must must indicate writable data segment,
      // else #TS(SS)
      if (ss_descriptor.valid==0 || ss_descriptor.segment==0 ||
           IS_CODE_SEGMENT(ss_descriptor.type) ||
          !IS_DATA_SEGMENT_WRITEABLE(ss_descriptor.type))
      {
        BX_ERROR(("task_switch(exception after commit point): SS not valid or writeable segment"));
        exception(BX_TS_EXCEPTION, raw_ss_selector & 0xfffc, 0);
      }

      //
      // Stack segment is present in memory, else #SS(new stack segment)
      //
      if (! IS_PRESENT(ss_descriptor)) {
        BX_ERROR(("task_switch(exception after commit point): SS not present"));
        exception(BX_SS_EXCEPTION, raw_ss_selector & 0xfffc, 0);
      }

      // Stack segment DPL matches CS.RPL, else #TS(new stack segment)
      if (ss_descriptor.dpl != cs_selector.rpl) {
        BX_ERROR(("task_switch(exception after commit point): SS.rpl != CS.RPL"));
        exception(BX_TS_EXCEPTION, raw_ss_selector & 0xfffc, 0);
      }

      // Stack segment DPL matches selector RPL, else #TS(new stack segment)
      if (ss_descriptor.dpl != ss_selector.rpl) {
        BX_ERROR(("task_switch(exception after commit point): SS.dpl != SS.rpl"));
        exception(BX_TS_EXCEPTION, raw_ss_selector & 0xfffc, 0);
      }

      // All checks pass, fill in shadow cache
      BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS].cache = ss_descriptor;
    }
    else {
      // SS selector is valid, else #TS(new stack segment)
      BX_ERROR(("task_switch(exception after commit point): SS NULL"));
      exception(BX_TS_EXCEPTION, raw_ss_selector & 0xfffc, 0);
    }

    // if new selector is not null then perform following checks:
    //    index must be within its descriptor table limits else #TS(selector)
    //    AR byte must indicate data or readable code else #TS(selector)
    //    if data or non-conforming code then:
    //      DPL must be >= CPL else #TS(selector)
    //      DPL must be >= RPL else #TS(selector)
    //    AR byte must indicate PRESENT else #NP(selector)
    //    load cache with new segment descriptor and set valid bit

    // CS
    if ((raw_cs_selector & 0xfffc) != 0) {
      bx_bool good = fetch_raw_descriptor2(&cs_selector, &dword1, &dword2);
      if (!good) {
        BX_ERROR(("task_switch(exception after commit point): bad CS fetch"));
        exception(BX_TS_EXCEPTION, raw_cs_selector & 0xfffc, 0);
      }

      parse_descriptor(dword1, dword2, &cs_descriptor);

      // CS descriptor AR byte must indicate code segment else #TS(CS)
      if (cs_descriptor.valid==0 || cs_descriptor.segment==0 ||
          IS_DATA_SEGMENT(cs_descriptor.type))
      {
        BX_ERROR(("task_switch(exception after commit point): CS not valid executable seg"));
        exception(BX_TS_EXCEPTION, raw_cs_selector & 0xfffc, 0);
      }

      // if non-conforming then DPL must equal selector RPL else #TS(CS)
      if (IS_CODE_SEGMENT_NON_CONFORMING(cs_descriptor.type) &&
          cs_descriptor.dpl != cs_selector.rpl)
      {
        BX_ERROR(("task_switch(exception after commit point): non-conforming: CS.dpl!=CS.RPL"));
        exception(BX_TS_EXCEPTION, raw_cs_selector & 0xfffc, 0);
      }

      // if conforming then DPL must be <= selector RPL else #TS(CS)
      if (IS_CODE_SEGMENT_CONFORMING(cs_descriptor.type) &&
          cs_descriptor.dpl > cs_selector.rpl)
      {
        BX_ERROR(("task_switch(exception after commit point): conforming: CS.dpl>RPL"));
        exception(BX_TS_EXCEPTION, raw_cs_selector & 0xfffc, 0);
      }

      // Code segment is present in memory, else #NP(new code segment)
      if (! IS_PRESENT(cs_descriptor)) {
        BX_ERROR(("task_switch(exception after commit point): CS.p==0"));
        exception(BX_NP_EXCEPTION, raw_cs_selector & 0xfffc, 0);
      }

      // All checks pass, fill in shadow cache
      BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS].cache = cs_descriptor;
    }
    else {
      // If new cs selector is null #TS(CS)
      BX_ERROR(("task_switch(exception after commit point): CS NULL"));
      exception(BX_TS_EXCEPTION, raw_cs_selector & 0xfffc, 0);
    }

#if BX_SUPPORT_ICACHE
    BX_CPU_THIS_PTR updateFetchModeMask();
#endif

#if BX_CPU_LEVEL >= 4 && BX_SUPPORT_ALIGNMENT_CHECK
    handleAlignmentCheck(); // task switch, CPL was modified
#endif

    task_switch_load_selector(&BX_CPU_THIS_PTR sregs[BX_SEG_REG_DS],
        &ds_selector, raw_ds_selector, cs_selector.rpl);
    task_switch_load_selector(&BX_CPU_THIS_PTR sregs[BX_SEG_REG_ES],
        &es_selector, raw_es_selector, cs_selector.rpl);
    task_switch_load_selector(&BX_CPU_THIS_PTR sregs[BX_SEG_REG_FS],
        &fs_selector, raw_fs_selector, cs_selector.rpl);
    task_switch_load_selector(&BX_CPU_THIS_PTR sregs[BX_SEG_REG_GS],
        &gs_selector, raw_gs_selector, cs_selector.rpl);
  }

  if ((tss_descriptor->type>=9) && (trap_word & 0x1)) {
    BX_CPU_THIS_PTR debug_trap |= 0x00008000; // BT flag in DR6
    BX_CPU_THIS_PTR async_event = 1; // so processor knows to check
    BX_INFO(("task_switch: T bit set in new TSS"));
  }

  //
  // Step 14: Begin execution of new task.
  //
  BX_DEBUG(("TASKING: LEAVE"));
}
예제 #21
0
void
RETfar_pm(UINT nbytes)
{
    selector_t cs_sel, ss_sel, temp_sel;
    UINT32 sp;
    UINT32 new_ip, new_sp;
    UINT16 new_cs, new_ss;
    int rv;
    int i;

    VERBOSE(("RETfar_pm: old EIP = %04x:%08x, ESP = %04x:%08x, nbytes = %d", CPU_CS, CPU_PREV_EIP, CPU_SS, CPU_ESP, nbytes));

    if (CPU_STAT_SS32) {
        sp = CPU_ESP;
    } else {
        sp = CPU_SP;
    }
    if (CPU_INST_OP32) {
        STACK_POP_CHECK(CPU_REGS_SREG(CPU_SS_INDEX), &CPU_STAT_SREG(CPU_SS_INDEX), sp, nbytes + 8);
        new_ip = cpu_vmemoryread_d(CPU_SS_INDEX, sp);
        new_cs = cpu_vmemoryread_w(CPU_SS_INDEX, sp + 4);
    } else {
        STACK_POP_CHECK(CPU_REGS_SREG(CPU_SS_INDEX), &CPU_STAT_SREG(CPU_SS_INDEX), sp, nbytes + 4);
        new_ip = cpu_vmemoryread_w(CPU_SS_INDEX, sp);
        new_cs = cpu_vmemoryread_w(CPU_SS_INDEX, sp + 2);
    }

    rv = parse_selector(&cs_sel, new_cs);
    if (rv < 0) {
        VERBOSE(("RETfar_pm: parse_selector (selector = %04x, rv = %d, %s)", cs_sel.selector, rv));
        EXCEPTION(GP_EXCEPTION, cs_sel.idx);
    }

    /* check segment type */
    if (!cs_sel.desc.s) {
        VERBOSE(("RETfar_pm: return to system segment"));
        EXCEPTION(GP_EXCEPTION, cs_sel.idx);
    }
    if (!cs_sel.desc.u.seg.c) {
        VERBOSE(("RETfar_pm: return to data segment"));
        EXCEPTION(GP_EXCEPTION, cs_sel.idx);
    }

    /* check privilege level */
    if (cs_sel.rpl < CPU_STAT_CPL) {
        VERBOSE(("RETfar_pm: RPL(%d) < CPL(%d)", cs_sel.rpl, CPU_STAT_CPL));
        EXCEPTION(GP_EXCEPTION, cs_sel.idx);
    }
    if (!cs_sel.desc.u.seg.ec && (cs_sel.desc.dpl > cs_sel.rpl)) {
        VERBOSE(("RETfar_pm: NON-COMFORMING-CODE-SEGMENT and DPL(%d) > RPL(%d)", cs_sel.desc.dpl, cs_sel.rpl));
        EXCEPTION(GP_EXCEPTION, cs_sel.idx);
    }

    /* not present */
    if (selector_is_not_present(&cs_sel)) {
        VERBOSE(("RETfar_pm: returned code segment is not present"));
        EXCEPTION(NP_EXCEPTION, cs_sel.idx);
    }

    if (cs_sel.rpl == CPU_STAT_CPL) {
        VERBOSE(("RETfar_pm: RETURN-TO-SAME-PRIVILEGE-LEVEL"));

        /* check code segment limit */
        if (new_ip > cs_sel.desc.u.seg.limit) {
            VERBOSE(("RETfar_pm: new_ip is out of range. new_ip = %08x, limit = %08x", new_ip, cs_sel.desc.u.seg.limit));
            EXCEPTION(GP_EXCEPTION, 0);
        }

        VERBOSE(("RETfar_pm: new_ip = %08x, new_cs = %04x", new_ip, cs_sel.selector));

        if (CPU_INST_OP32) {
            nbytes += 8;
        } else {
            nbytes += 4;
        }
        if (CPU_STAT_SS32) {
            CPU_ESP += nbytes;
        } else {
            CPU_SP += (UINT16)nbytes;
        }

        load_cs(cs_sel.selector, &cs_sel.desc, CPU_STAT_CPL);
        SET_EIP(new_ip);
    } else {
        VERBOSE(("RETfar_pm: RETURN-OUTER-PRIVILEGE-LEVEL"));

        if (CPU_INST_OP32) {
            STACK_POP_CHECK(CPU_REGS_SREG(CPU_SS_INDEX), &CPU_STAT_SREG(CPU_SS_INDEX), sp, 8 + 8 + nbytes);
            new_sp = cpu_vmemoryread_d(CPU_SS_INDEX, sp + 8 + nbytes);
            new_ss = cpu_vmemoryread_w(CPU_SS_INDEX, sp + 8 + nbytes + 4);
        } else {
            STACK_POP_CHECK(CPU_REGS_SREG(CPU_SS_INDEX), &CPU_STAT_SREG(CPU_SS_INDEX), sp, 4 + 4 + nbytes);
            new_sp = cpu_vmemoryread_w(CPU_SS_INDEX, sp + 4 + nbytes);
            new_ss = cpu_vmemoryread_w(CPU_SS_INDEX, sp + 4 + nbytes + 2);
        }

        rv = parse_selector(&ss_sel, new_ss);
        if (rv < 0) {
            VERBOSE(("RETfar_pm: parse_selector (selector = %04x, rv = %d, %s)", ss_sel.selector, rv));
            EXCEPTION(GP_EXCEPTION, ss_sel.idx);
        }

        /* check stack segment descriptor */
        if (!ss_sel.desc.s) {
            VERBOSE(("RETfar_pm: stack segment is system segment"));
            EXCEPTION(GP_EXCEPTION, cs_sel.idx);
        }
        if (ss_sel.desc.u.seg.c) {
            VERBOSE(("RETfar_pm: stack segment is code segment"));
            EXCEPTION(GP_EXCEPTION, cs_sel.idx);
        }
        if (!ss_sel.desc.u.seg.wr) {
            VERBOSE(("RETfar_pm: stack segment is read-only data segment"));
            EXCEPTION(GP_EXCEPTION, cs_sel.idx);
        }

        /* check privilege level */
        if (ss_sel.rpl != cs_sel.rpl) {
            VERBOSE(("RETfar_pm: RPL[SS](%d) != RPL[CS](%d)", ss_sel.rpl, cs_sel.rpl));
            EXCEPTION(GP_EXCEPTION, cs_sel.idx);
        }
        if (ss_sel.desc.dpl != cs_sel.rpl) {
            VERBOSE(("RETfar_pm: DPL[SS](%d) != RPL[CS](%d)", ss_sel.desc.dpl, cs_sel.rpl));
            EXCEPTION(GP_EXCEPTION, cs_sel.idx);
        }

        /* not present */
        if (selector_is_not_present(&ss_sel)) {
            VERBOSE(("RETfar_pm: stack segment is not present"));
            EXCEPTION(SS_EXCEPTION, ss_sel.idx);
        }

        /* check code segment limit */
        if (new_ip > cs_sel.desc.u.seg.limit) {
            VERBOSE(("RETfar_pm: new_ip is out of range. new_ip = %08x, limit = %08x", new_ip, cs_sel.desc.u.seg.limit));
            EXCEPTION(GP_EXCEPTION, 0);
        }

        VERBOSE(("RETfar_pm: new_ip = %08x, new_cs = %04x", new_ip, cs_sel.selector));
        VERBOSE(("RETfar_pm: new_sp = %08x, new_ss = %04x", new_sp, ss_sel.selector));

        load_cs(cs_sel.selector, &cs_sel.desc, cs_sel.rpl);
        SET_EIP(new_ip);

        load_ss(ss_sel.selector, &ss_sel.desc, cs_sel.rpl);
        if (CPU_STAT_SS32) {
            CPU_ESP = new_sp + nbytes;
        } else {
            CPU_SP = (UINT16)(new_sp + nbytes);
        }

        /* check segment register */
        for (i = 0; i < CPU_SEGREG_NUM; i++) {
            descriptor_t *dp;
            BOOL valid;

            dp = &CPU_STAT_SREG(i);
            if ((!dp->u.seg.c || !dp->u.seg.ec)
                    && (CPU_STAT_SREG(i).dpl < CPU_STAT_CPL)) {
                /* segment register is invalid */
                CPU_REGS_SREG(i) = 0;
                CPU_STAT_SREG_CLEAR(i);
                continue;
            }

            rv = parse_selector(&temp_sel, CPU_REGS_SREG(i));
            if (rv < 0) {
                /* segment register is invalid */
                CPU_REGS_SREG(i) = 0;
                CPU_STAT_SREG_CLEAR(i);
                continue;
            }

            valid = TRUE;
            if (!temp_sel.desc.s) {
                /* system segment */
                valid = FALSE;
            }
            if (temp_sel.desc.u.seg.c && !temp_sel.desc.u.seg.wr) {
                /* execute-only code segment */
                valid = FALSE;
            }
            if (!temp_sel.desc.u.seg.c || !temp_sel.desc.u.seg.ec) {
                if (CPU_STAT_CPL > temp_sel.desc.dpl) {
                    valid = FALSE;
                }
            }

            if (!valid) {
                /* segment register is invalid */
                CPU_REGS_SREG(i) = 0;
                CPU_STAT_SREG(i).valid = 0;
            }
        }
    }

    VERBOSE(("RETfar_pm: new EIP = %04x:%08x, ESP = %04x:%08x", CPU_CS, CPU_EIP, CPU_SS, CPU_ESP));
}
예제 #22
0
파일: call_far.cpp 프로젝트: iver6/BA
void BX_CPP_AttrRegparmN(1) BX_CPU_C::call_gate(bx_descriptor_t *gate_descriptor)
{
  bx_selector_t cs_selector;
  Bit32u dword1, dword2;
  bx_descriptor_t cs_descriptor;

  // examine code segment selector in call gate descriptor
  BX_DEBUG(("call_protected: call gate"));

  Bit16u dest_selector = gate_descriptor->u.gate.dest_selector;
  Bit32u new_EIP       = gate_descriptor->u.gate.dest_offset;

  // selector must not be null else #GP(0)
  if ((dest_selector & 0xfffc) == 0) {
    BX_ERROR(("call_protected: selector in gate null"));
    exception(BX_GP_EXCEPTION, 0);
  }

  parse_selector(dest_selector, &cs_selector);
  // selector must be within its descriptor table limits,
  //   else #GP(code segment selector)
  fetch_raw_descriptor(&cs_selector, &dword1, &dword2, BX_GP_EXCEPTION);
  parse_descriptor(dword1, dword2, &cs_descriptor);

  // AR byte of selected descriptor must indicate code segment,
  //   else #GP(code segment selector)
  // DPL of selected descriptor must be <= CPL,
  // else #GP(code segment selector)
  if (cs_descriptor.valid==0 || cs_descriptor.segment==0 ||
      IS_DATA_SEGMENT(cs_descriptor.type) || cs_descriptor.dpl > CPL)
  {
    BX_ERROR(("call_protected: selected descriptor is not code"));
    exception(BX_GP_EXCEPTION, dest_selector & 0xfffc);
  }

  // code segment must be present else #NP(selector)
  if (! IS_PRESENT(cs_descriptor)) {
    BX_ERROR(("call_protected: code segment not present !"));
    exception(BX_NP_EXCEPTION, dest_selector & 0xfffc);
  }

  // CALL GATE TO MORE PRIVILEGE
  // if non-conforming code segment and DPL < CPL then
  if (IS_CODE_SEGMENT_NON_CONFORMING(cs_descriptor.type) && (cs_descriptor.dpl < CPL))
  {
    Bit16u SS_for_cpl_x;
    Bit32u ESP_for_cpl_x;
    bx_selector_t   ss_selector;
    bx_descriptor_t ss_descriptor;
    Bit16u   return_SS, return_CS;
    Bit32u   return_ESP, return_EIP;

    BX_DEBUG(("CALL GATE TO MORE PRIVILEGE LEVEL"));

    // get new SS selector for new privilege level from TSS
    get_SS_ESP_from_TSS(cs_descriptor.dpl, &SS_for_cpl_x, &ESP_for_cpl_x);

    // check selector & descriptor for new SS:
    // selector must not be null, else #TS(0)
    if ((SS_for_cpl_x & 0xfffc) == 0) {
      BX_ERROR(("call_protected: new SS null"));
      exception(BX_TS_EXCEPTION, 0);
    }

    // selector index must be within its descriptor table limits,
    //   else #TS(SS selector)
    parse_selector(SS_for_cpl_x, &ss_selector);
    fetch_raw_descriptor(&ss_selector, &dword1, &dword2, BX_TS_EXCEPTION);
    parse_descriptor(dword1, dword2, &ss_descriptor);

    // selector's RPL must equal DPL of code segment,
    //   else #TS(SS selector)
    if (ss_selector.rpl != cs_descriptor.dpl) {
      BX_ERROR(("call_protected: SS selector.rpl != CS descr.dpl"));
      exception(BX_TS_EXCEPTION, SS_for_cpl_x & 0xfffc);
    }

    // stack segment DPL must equal DPL of code segment,
    //   else #TS(SS selector)
    if (ss_descriptor.dpl != cs_descriptor.dpl) {
      BX_ERROR(("call_protected: SS descr.rpl != CS descr.dpl"));
      exception(BX_TS_EXCEPTION, SS_for_cpl_x & 0xfffc);
    }

    // descriptor must indicate writable data segment,
    //   else #TS(SS selector)
    if (ss_descriptor.valid==0 || ss_descriptor.segment==0 ||
        IS_CODE_SEGMENT(ss_descriptor.type) || !IS_DATA_SEGMENT_WRITEABLE(ss_descriptor.type))
    {
      BX_ERROR(("call_protected: ss descriptor is not writable data seg"));
      exception(BX_TS_EXCEPTION, SS_for_cpl_x & 0xfffc);
    }

    // segment must be present, else #SS(SS selector)
    if (! IS_PRESENT(ss_descriptor)) {
      BX_ERROR(("call_protected: ss descriptor not present"));
      exception(BX_SS_EXCEPTION, SS_for_cpl_x & 0xfffc);
    }

    // get word count from call gate, mask to 5 bits
    unsigned param_count = gate_descriptor->u.gate.param_count & 0x1f;

    // save return SS:eSP to be pushed on new stack
    return_SS = BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS].selector.value;
    if (BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS].cache.u.segment.d_b)
      return_ESP = ESP;
    else
      return_ESP =  SP;

    // save return CS:eIP to be pushed on new stack
    return_CS = BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS].selector.value;
    if (cs_descriptor.u.segment.d_b)
      return_EIP = EIP;
    else
      return_EIP = IP;

    // Prepare new stack segment
    bx_segment_reg_t new_stack;
    new_stack.selector = ss_selector;
    new_stack.cache = ss_descriptor;
    new_stack.selector.rpl = cs_descriptor.dpl;
    // add cpl to the selector value
    new_stack.selector.value = (0xfffc & new_stack.selector.value) |
    new_stack.selector.rpl;

    /* load new SS:SP value from TSS */
    if (ss_descriptor.u.segment.d_b) {
      Bit32u temp_ESP = ESP_for_cpl_x;

      // push pointer of old stack onto new stack
      if (gate_descriptor->type==BX_386_CALL_GATE) {
        write_new_stack_dword_32(&new_stack, temp_ESP-4, cs_descriptor.dpl, return_SS);
        write_new_stack_dword_32(&new_stack, temp_ESP-8, cs_descriptor.dpl, return_ESP);
        temp_ESP -= 8;

        for (unsigned n=param_count; n>0; n--) {
          temp_ESP -= 4;
          Bit32u param = read_virtual_dword_32(BX_SEG_REG_SS, return_ESP + (n-1)*4);
          write_new_stack_dword_32(&new_stack, temp_ESP, cs_descriptor.dpl, param);
        }
        // push return address onto new stack
        write_new_stack_dword_32(&new_stack, temp_ESP-4, cs_descriptor.dpl, return_CS);
        write_new_stack_dword_32(&new_stack, temp_ESP-8, cs_descriptor.dpl, return_EIP);
        temp_ESP -= 8;
      }
      else {
        write_new_stack_word_32(&new_stack, temp_ESP-2, cs_descriptor.dpl, return_SS);
        write_new_stack_word_32(&new_stack, temp_ESP-4, cs_descriptor.dpl, (Bit16u) return_ESP);
        temp_ESP -= 4;

        for (unsigned n=param_count; n>0; n--) {
          temp_ESP -= 2;
          Bit16u param = read_virtual_word_32(BX_SEG_REG_SS, return_ESP + (n-1)*2);
          write_new_stack_word_32(&new_stack, temp_ESP, cs_descriptor.dpl, param);
        }
        // push return address onto new stack
        write_new_stack_word_32(&new_stack, temp_ESP-2, cs_descriptor.dpl, return_CS);
        write_new_stack_word_32(&new_stack, temp_ESP-4, cs_descriptor.dpl, (Bit16u) return_EIP);
        temp_ESP -= 4;
      }

      ESP = temp_ESP;
    }
    else {
      Bit16u temp_SP = (Bit16u) ESP_for_cpl_x;

      // push pointer of old stack onto new stack
      if (gate_descriptor->type==BX_386_CALL_GATE) {
        write_new_stack_dword_32(&new_stack, (Bit16u)(temp_SP-4), cs_descriptor.dpl, return_SS);
        write_new_stack_dword_32(&new_stack, (Bit16u)(temp_SP-8), cs_descriptor.dpl, return_ESP);
        temp_SP -= 8;

        for (unsigned n=param_count; n>0; n--) {
          temp_SP -= 4;
          Bit32u param = read_virtual_dword_32(BX_SEG_REG_SS, return_ESP + (n-1)*4);
          write_new_stack_dword_32(&new_stack, temp_SP, cs_descriptor.dpl, param);
        }
        // push return address onto new stack
        write_new_stack_dword_32(&new_stack, (Bit16u)(temp_SP-4), cs_descriptor.dpl, return_CS);
        write_new_stack_dword_32(&new_stack, (Bit16u)(temp_SP-8), cs_descriptor.dpl, return_EIP);
        temp_SP -= 8;
      }
      else {
        write_new_stack_word_32(&new_stack, (Bit16u)(temp_SP-2), cs_descriptor.dpl, return_SS);
        write_new_stack_word_32(&new_stack, (Bit16u)(temp_SP-4), cs_descriptor.dpl, (Bit16u) return_ESP);
        temp_SP -= 4;

        for (unsigned n=param_count; n>0; n--) {
          temp_SP -= 2;
          Bit16u param = read_virtual_word_32(BX_SEG_REG_SS, return_ESP + (n-1)*2);
          write_new_stack_word_32(&new_stack, temp_SP, cs_descriptor.dpl, param);
        }
        // push return address onto new stack
        write_new_stack_word_32(&new_stack, (Bit16u)(temp_SP-2), cs_descriptor.dpl, return_CS);
        write_new_stack_word_32(&new_stack, (Bit16u)(temp_SP-4), cs_descriptor.dpl, (Bit16u) return_EIP);
        temp_SP -= 4;
      }

      SP = temp_SP;
    }

    // new eIP must be in code segment limit else #GP(0)
    if (new_EIP > cs_descriptor.u.segment.limit_scaled) {
      BX_ERROR(("call_protected: EIP not within CS limits"));
      exception(BX_GP_EXCEPTION, 0);
    }

    /* load SS descriptor */
    load_ss(&ss_selector, &ss_descriptor, cs_descriptor.dpl);

    /* load new CS:IP value from gate */
    /* load CS descriptor */
    /* set CPL to stack segment DPL */
    /* set RPL of CS to CPL */
    load_cs(&cs_selector, &cs_descriptor, cs_descriptor.dpl);
    EIP = new_EIP;
  }
  else   // CALL GATE TO SAME PRIVILEGE
  {
    BX_DEBUG(("CALL GATE TO SAME PRIVILEGE"));

    if (gate_descriptor->type == BX_386_CALL_GATE) {
      // call gate 32bit, push return address onto stack
      push_32(BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS].selector.value);
      push_32(EIP);
    }
    else {
      // call gate 16bit, push return address onto stack
      push_16(BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS].selector.value);
      push_16(IP);
    }

    // load CS:EIP from gate
    // load code segment descriptor into CS register
    // set RPL of CS to CPL
    branch_far32(&cs_selector, &cs_descriptor, new_EIP, CPL);
  }
}
예제 #23
0
BX_CPU_C::return_protected(bxInstruction_c *i, Bit16u pop_bytes)
{
  Bit16u raw_cs_selector, raw_ss_selector;
  bx_selector_t cs_selector, ss_selector;
  bx_descriptor_t cs_descriptor, ss_descriptor;
  Bit32u stack_param_offset;
  bx_address return_RIP, return_RSP, temp_RSP;
  Bit32u dword1, dword2;

  /* + 6+N*2: SS      | +12+N*4:     SS | +24+N*8      SS */
  /* + 4+N*2: SP      | + 8+N*4:    ESP | +16+N*8     RSP */
  /*          parm N  | +        parm N | +        parm N */
  /*          parm 3  | +        parm 3 | +        parm 3 */
  /*          parm 2  | +        parm 2 | +        parm 2 */
  /* + 4:     parm 1  | + 8:     parm 1 | +16:     parm 1 */
  /* + 2:     CS      | + 4:         CS | + 8:         CS */
  /* + 0:     IP      | + 0:        EIP | + 0:        RIP */

#if BX_SUPPORT_X86_64
  if (StackAddrSize64()) temp_RSP = RSP;
  else
#endif
  {
    if (BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS].cache.u.segment.d_b) temp_RSP = ESP;
    else temp_RSP = SP;
  }

#if BX_SUPPORT_X86_64
  if (i->os64L()) {
    raw_cs_selector = (Bit16u) read_virtual_qword_64(BX_SEG_REG_SS, temp_RSP + 8);
    return_RIP      =          read_virtual_qword_64(BX_SEG_REG_SS, temp_RSP);
    stack_param_offset = 16;
  }
  else
#endif
  if (i->os32L()) {
    raw_cs_selector = (Bit16u) read_virtual_dword(BX_SEG_REG_SS, temp_RSP + 4);
    return_RIP      =          read_virtual_dword(BX_SEG_REG_SS, temp_RSP);
    stack_param_offset = 8;
  }
  else {
    raw_cs_selector = read_virtual_word(BX_SEG_REG_SS, temp_RSP + 2);
    return_RIP      = read_virtual_word(BX_SEG_REG_SS, temp_RSP);
    stack_param_offset = 4;
  }

  // selector must be non-null else #GP(0)
  if ((raw_cs_selector & 0xfffc) == 0) {
    BX_ERROR(("return_protected: CS selector null"));
    exception(BX_GP_EXCEPTION, 0, 0);
  }

  parse_selector(raw_cs_selector, &cs_selector);

  // selector index must be within its descriptor table limits,
  // else #GP(selector)
  fetch_raw_descriptor(&cs_selector, &dword1, &dword2, BX_GP_EXCEPTION);

  // descriptor AR byte must indicate code segment, else #GP(selector)
  parse_descriptor(dword1, dword2, &cs_descriptor);

  // return selector RPL must be >= CPL, else #GP(return selector)
  if (cs_selector.rpl < CPL) {
    BX_ERROR(("return_protected: CS.rpl < CPL"));
    exception(BX_GP_EXCEPTION, raw_cs_selector & 0xfffc, 0);
  }

  // check code-segment descriptor
  check_cs(&cs_descriptor, raw_cs_selector, 0, cs_selector.rpl);

  // if return selector RPL == CPL then
  // RETURN TO SAME PRIVILEGE LEVEL
  if (cs_selector.rpl == CPL)
  {
    BX_DEBUG(("return_protected: return to SAME PRIVILEGE LEVEL"));

    branch_far64(&cs_selector, &cs_descriptor, return_RIP, CPL);

#if BX_SUPPORT_X86_64
    if (StackAddrSize64())
      RSP += stack_param_offset + pop_bytes;
    else
#endif
    {
      if (BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS].cache.u.segment.d_b)
        RSP = ESP + stack_param_offset + pop_bytes;
      else
         SP += stack_param_offset + pop_bytes;
    }
    return;
  }
  /* RETURN TO OUTER PRIVILEGE LEVEL */
  else {
    /* + 6+N*2: SS      | +12+N*4:     SS | +24+N*8      SS */
    /* + 4+N*2: SP      | + 8+N*4:    ESP | +16+N*8     RSP */
    /*          parm N  | +        parm N | +        parm N */
    /*          parm 3  | +        parm 3 | +        parm 3 */
    /*          parm 2  | +        parm 2 | +        parm 2 */
    /* + 4:     parm 1  | + 8:     parm 1 | +16:     parm 1 */
    /* + 2:     CS      | + 4:         CS | + 8:         CS */
    /* + 0:     IP      | + 0:        EIP | + 0:        RIP */

    BX_DEBUG(("return_protected: return to OUTER PRIVILEGE LEVEL"));

#if BX_SUPPORT_X86_64
    if (i->os64L()) {
      raw_ss_selector = read_virtual_word_64 (BX_SEG_REG_SS, temp_RSP + 24 + pop_bytes);
      return_RSP      = read_virtual_qword_64(BX_SEG_REG_SS, temp_RSP + 16 + pop_bytes);
    }
    else
#endif
    if (i->os32L()) {
      raw_ss_selector = read_virtual_word (BX_SEG_REG_SS, temp_RSP + 12 + pop_bytes);
      return_RSP      = read_virtual_dword(BX_SEG_REG_SS, temp_RSP +  8 + pop_bytes);
    }
    else {
      raw_ss_selector = read_virtual_word(BX_SEG_REG_SS, temp_RSP + 6 + pop_bytes);
      return_RSP      = read_virtual_word(BX_SEG_REG_SS, temp_RSP + 4 + pop_bytes);
    }

    /* selector index must be within its descriptor table limits,
     * else #GP(selector) */
    parse_selector(raw_ss_selector, &ss_selector);

    if ((raw_ss_selector & 0xfffc) == 0) {
      if (long_mode()) {
        if (! IS_LONG64_SEGMENT(cs_descriptor) || (cs_selector.rpl == 3)) {
          BX_ERROR(("return_protected: SS selector null"));
          exception(BX_GP_EXCEPTION, 0, 0);
        }
      }
      else // not in long or compatibility mode
      {
        BX_ERROR(("return_protected: SS selector null"));
        exception(BX_GP_EXCEPTION, 0, 0);
      }
    }

    fetch_raw_descriptor(&ss_selector, &dword1, &dword2, BX_GP_EXCEPTION);
    parse_descriptor(dword1, dword2, &ss_descriptor);

    /* selector RPL must = RPL of the return CS selector,
     * else #GP(selector) */
    if (ss_selector.rpl != cs_selector.rpl) {
      BX_ERROR(("return_protected: ss.rpl != cs.rpl"));
      exception(BX_GP_EXCEPTION, raw_ss_selector & 0xfffc, 0);
    }

    /* descriptor AR byte must indicate a writable data segment,
     * else #GP(selector) */
    if (ss_descriptor.valid==0 || ss_descriptor.segment==0 ||
         IS_CODE_SEGMENT(ss_descriptor.type) ||
        !IS_DATA_SEGMENT_WRITEABLE(ss_descriptor.type))
    {
      BX_ERROR(("return_protected: SS.AR byte not writable data"));
      exception(BX_GP_EXCEPTION, raw_ss_selector & 0xfffc, 0);
    }

    /* descriptor dpl must = RPL of the return CS selector,
     * else #GP(selector) */
    if (ss_descriptor.dpl != cs_selector.rpl) {
      BX_ERROR(("return_protected: SS.dpl != cs.rpl"));
      exception(BX_GP_EXCEPTION, raw_ss_selector & 0xfffc, 0);
    }

    /* segment must be present else #SS(selector) */
    if (! IS_PRESENT(ss_descriptor)) {
      BX_ERROR(("return_protected: ss.present == 0"));
      exception(BX_SS_EXCEPTION, raw_ss_selector & 0xfffc, 0);
    }

    branch_far64(&cs_selector, &cs_descriptor, return_RIP, cs_selector.rpl);

    /* load SS:SP from stack */
    /* load SS-cache with return SS descriptor */
    load_ss(&ss_selector, &ss_descriptor, cs_selector.rpl);

#if BX_SUPPORT_X86_64
    if (StackAddrSize64())
      RSP = return_RSP + pop_bytes;
    else
#endif
    if (ss_descriptor.u.segment.d_b)
      RSP = (Bit32u) return_RSP + pop_bytes;
    else
      SP  = (Bit16u) return_RSP + pop_bytes;

    /* check ES, DS, FS, GS for validity */
    validate_seg_regs();
  }
}
예제 #24
0
/*---
 * IRET_pm: OUTER-PRIVILEGE
 */
static void
IRET_pm_protected_mode_return_outer_privilege(const selector_t *cs_sel, UINT32 new_ip, UINT32 new_flags)
{
    descriptor_t *dp;
    selector_t ss_sel;
    UINT32 mask;
    UINT32 sp;
    UINT32 new_sp;
    UINT16 new_ss;
    int rv;
    int i;

    VERBOSE(("IRET_pm: RETURN-OUTER-PRIVILEGE-LEVEL"));

    if (CPU_STAT_SS32) {
        sp = CPU_ESP;
    } else {
        sp = CPU_SP;
    }
    if (CPU_INST_OP32) {
        STACK_POP_CHECK(CPU_REGS_SREG(CPU_SS_INDEX), &CPU_STAT_SREG(CPU_SS_INDEX), sp, 20);
        new_sp = cpu_vmemoryread_d(CPU_SS_INDEX, sp + 12);
        new_ss = cpu_vmemoryread_w(CPU_SS_INDEX, sp + 16);
    } else {
        STACK_POP_CHECK(CPU_REGS_SREG(CPU_SS_INDEX), &CPU_STAT_SREG(CPU_SS_INDEX), sp, 10);
        new_sp = cpu_vmemoryread_w(CPU_SS_INDEX, sp + 6);
        new_ss = cpu_vmemoryread_w(CPU_SS_INDEX, sp + 8);
    }
    VERBOSE(("IRET_pm: new_sp = 0x%08x, new_ss = 0x%04x", new_sp, new_ss));

    rv = parse_selector(&ss_sel, new_ss);
    if (rv < 0) {
        VERBOSE(("IRET_pm: parse_selector (selector = %04x, rv = %d)", ss_sel.selector, rv));
        EXCEPTION(GP_EXCEPTION, ss_sel.idx);
    }

    /* check privilege level */
    if (ss_sel.rpl != cs_sel->rpl) {
        VERBOSE(("IRET_pm: RPL[SS](%d) != RPL[CS](%d)", ss_sel.rpl, cs_sel->rpl));
        EXCEPTION(GP_EXCEPTION, ss_sel.idx);
    }
    if (ss_sel.desc.dpl != cs_sel->rpl) {
        VERBOSE(("IRET_pm: DPL[SS](%d) != RPL[CS](%d)", ss_sel.desc.dpl, cs_sel->rpl));
        EXCEPTION(GP_EXCEPTION, ss_sel.idx);
    }

    /* check stack segment descriptor */
    if (!ss_sel.desc.s) {
        VERBOSE(("IRET_pm: stack segment is system segment"));
        EXCEPTION(GP_EXCEPTION, ss_sel.idx);
    }
    if (ss_sel.desc.u.seg.c) {
        VERBOSE(("IRET_pm: stack segment is code segment"));
        EXCEPTION(GP_EXCEPTION, ss_sel.idx);
    }
    if (!ss_sel.desc.u.seg.wr) {
        VERBOSE(("IRET_pm: stack segment is read-only data segment"));
        EXCEPTION(GP_EXCEPTION, ss_sel.idx);
    }

    /* not present */
    if (selector_is_not_present(&ss_sel)) {
        VERBOSE(("IRET_pm: stack segment is not present"));
        EXCEPTION(SS_EXCEPTION, ss_sel.idx);
    }

    /* check code segment limit */
    if (new_ip > cs_sel->desc.u.seg.limit) {
        VERBOSE(("IRET_pm: new_ip is out of range. new_ip = %08x, limit = %08x", new_ip, cs_sel->desc.u.seg.limit));
        EXCEPTION(GP_EXCEPTION, 0);
    }

    mask = 0;
    if (CPU_INST_OP32)
        mask |= RF_FLAG;
    if (CPU_STAT_CPL <= CPU_STAT_IOPL)
        mask |= I_FLAG;
    if (CPU_STAT_CPL == 0) {
        mask |= IOPL_FLAG;
        if (CPU_INST_OP32) {
            mask |= VM_FLAG|VIF_FLAG|VIP_FLAG;
        }
    }

    /* set new register */
    load_cs(cs_sel->selector, &cs_sel->desc, cs_sel->rpl);
    SET_EIP(new_ip);

    set_eflags(new_flags, mask);

    load_ss(ss_sel.selector, &ss_sel.desc, cs_sel->rpl);
    if (CPU_STAT_SS32) {
        CPU_ESP = new_sp;
    } else {
        CPU_SP = (UINT16)new_sp;
    }

    /* check segment register */
    for (i = 0; i < CPU_SEGREG_NUM; i++) {
        if ((i != CPU_CS_INDEX) && (i != CPU_SS_INDEX)) {
            dp = &CPU_STAT_SREG(i);
            if ((!dp->u.seg.c || !dp->u.seg.ec)
                    && (CPU_STAT_SREG(i).dpl < CPU_STAT_CPL)) {
                /* segment register is invalid */
                CPU_REGS_SREG(i) = 0;
                CPU_STAT_SREG_CLEAR(i);
            }
        }
    }
}
예제 #25
0
파일: exception.cpp 프로젝트: iver6/BA
void BX_CPU_C::long_mode_int(Bit8u vector, unsigned soft_int, bx_bool push_error, Bit16u error_code)
{
  bx_descriptor_t gate_descriptor, cs_descriptor;
  bx_selector_t cs_selector;

  // interrupt vector must be within IDT table limits,
  // else #GP(vector*8 + 2 + EXT)
  if ((vector*16 + 15) > BX_CPU_THIS_PTR idtr.limit) {
    BX_ERROR(("interrupt(long mode): vector must be within IDT table limits, IDT.limit = 0x%x", BX_CPU_THIS_PTR idtr.limit));
    exception(BX_GP_EXCEPTION, vector*8 + 2);
  }

  Bit64u desctmp1 = system_read_qword(BX_CPU_THIS_PTR idtr.base + vector*16);
  Bit64u desctmp2 = system_read_qword(BX_CPU_THIS_PTR idtr.base + vector*16 + 8);

  if (desctmp2 & BX_CONST64(0x00001F0000000000)) {
    BX_ERROR(("interrupt(long mode): IDT entry extended attributes DWORD4 TYPE != 0"));
    exception(BX_GP_EXCEPTION, vector*8 + 2);
  }

  Bit32u dword1 = GET32L(desctmp1);
  Bit32u dword2 = GET32H(desctmp1);
  Bit32u dword3 = GET32L(desctmp2);

  parse_descriptor(dword1, dword2, &gate_descriptor);

  if ((gate_descriptor.valid==0) || gate_descriptor.segment)
  {
    BX_ERROR(("interrupt(long mode): gate descriptor is not valid sys seg"));
    exception(BX_GP_EXCEPTION, vector*8 + 2);
  }

  // descriptor AR byte must indicate interrupt gate, trap gate,
  // or task gate, else #GP(vector*8 + 2 + EXT)
  if (gate_descriptor.type != BX_386_INTERRUPT_GATE &&
      gate_descriptor.type != BX_386_TRAP_GATE)
  {
    BX_ERROR(("interrupt(long mode): unsupported gate type %u",
        (unsigned) gate_descriptor.type));
    exception(BX_GP_EXCEPTION, vector*8 + 2);
  }

  // if software interrupt, then gate descripor DPL must be >= CPL,
  // else #GP(vector * 8 + 2 + EXT)
  if (soft_int && gate_descriptor.dpl < CPL)
  {
    BX_ERROR(("interrupt(long mode): soft_int && gate.dpl < CPL"));
    exception(BX_GP_EXCEPTION, vector*8 + 2);
  }

  // Gate must be present, else #NP(vector * 8 + 2 + EXT)
  if (! IS_PRESENT(gate_descriptor)) {
    BX_ERROR(("interrupt(long mode): gate.p == 0"));
    exception(BX_NP_EXCEPTION, vector*8 + 2);
  }

  Bit16u gate_dest_selector = gate_descriptor.u.gate.dest_selector;
  Bit64u gate_dest_offset   = ((Bit64u)dword3 << 32) |
                       gate_descriptor.u.gate.dest_offset;

  unsigned ist = gate_descriptor.u.gate.param_count & 0x7;

  // examine CS selector and descriptor given in gate descriptor
  // selector must be non-null else #GP(EXT)
  if ((gate_dest_selector & 0xfffc) == 0) {
    BX_ERROR(("int_trap_gate(long mode): selector null"));
    exception(BX_GP_EXCEPTION, 0);
  }

  parse_selector(gate_dest_selector, &cs_selector);

  // selector must be within its descriptor table limits
  // else #GP(selector+EXT)
  fetch_raw_descriptor(&cs_selector, &dword1, &dword2, BX_GP_EXCEPTION);
  parse_descriptor(dword1, dword2, &cs_descriptor);

  // descriptor AR byte must indicate code seg
  // and code segment descriptor DPL<=CPL, else #GP(selector+EXT)
  if (cs_descriptor.valid==0 || cs_descriptor.segment==0 ||
      IS_DATA_SEGMENT(cs_descriptor.type) ||
      cs_descriptor.dpl > CPL)
  {
    BX_ERROR(("interrupt(long mode): not accessible or not code segment"));
    exception(BX_GP_EXCEPTION, cs_selector.value & 0xfffc);
  }

  // check that it's a 64 bit segment
  if (! IS_LONG64_SEGMENT(cs_descriptor) || cs_descriptor.u.segment.d_b)
  {
    BX_ERROR(("interrupt(long mode): must be 64 bit segment"));
    exception(BX_GP_EXCEPTION, cs_selector.value & 0xfffc);
  }

  // segment must be present, else #NP(selector + EXT)
  if (! IS_PRESENT(cs_descriptor)) {
    BX_ERROR(("interrupt(long mode): segment not present"));
    exception(BX_NP_EXCEPTION, cs_selector.value & 0xfffc);
  }
 
  Bit64u RSP_for_cpl_x;

  Bit64u old_CS  = BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS].selector.value;
  Bit64u old_RIP = RIP;
  Bit64u old_SS  = BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS].selector.value;
  Bit64u old_RSP = RSP;

  // if code segment is non-conforming and DPL < CPL then
  // INTERRUPT TO INNER PRIVILEGE:
  if (IS_CODE_SEGMENT_NON_CONFORMING(cs_descriptor.type) && cs_descriptor.dpl < CPL)
  {
    BX_DEBUG(("interrupt(long mode): INTERRUPT TO INNER PRIVILEGE"));

    // check selector and descriptor for new stack in current TSS
    if (ist > 0) {
      BX_DEBUG(("interrupt(long mode): trap to IST, vector = %d", ist));
      RSP_for_cpl_x = get_RSP_from_TSS(ist+3);
    }
    else {
      RSP_for_cpl_x = get_RSP_from_TSS(cs_descriptor.dpl);
    }

    // align stack
    RSP_for_cpl_x &= BX_CONST64(0xfffffffffffffff0);

    // push old stack long pointer onto new stack
    write_new_stack_qword_64(RSP_for_cpl_x -  8, cs_descriptor.dpl, old_SS);
    write_new_stack_qword_64(RSP_for_cpl_x - 16, cs_descriptor.dpl, old_RSP);
    write_new_stack_qword_64(RSP_for_cpl_x - 24, cs_descriptor.dpl, read_eflags());
    // push long pointer to return address onto new stack
    write_new_stack_qword_64(RSP_for_cpl_x - 32, cs_descriptor.dpl, old_CS);
    write_new_stack_qword_64(RSP_for_cpl_x - 40, cs_descriptor.dpl, old_RIP);
    RSP_for_cpl_x -= 40;

    if (push_error) {
      RSP_for_cpl_x -= 8;
      write_new_stack_qword_64(RSP_for_cpl_x, cs_descriptor.dpl, error_code);
    }

    // load CS:RIP (guaranteed to be in 64 bit mode)
    branch_far64(&cs_selector, &cs_descriptor, gate_dest_offset, cs_descriptor.dpl);

    // set up null SS descriptor
    load_null_selector(&BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS], cs_descriptor.dpl);
  }
  else if(IS_CODE_SEGMENT_CONFORMING(cs_descriptor.type) || cs_descriptor.dpl==CPL) 
  {
    // if code segment is conforming OR code segment DPL = CPL then
    // INTERRUPT TO SAME PRIVILEGE LEVEL:

    BX_DEBUG(("interrupt(long mode): INTERRUPT TO SAME PRIVILEGE"));

    // check selector and descriptor for new stack in current TSS
    if (ist > 0) {
      BX_DEBUG(("interrupt(long mode): trap to IST, vector = %d", ist));
      RSP_for_cpl_x = get_RSP_from_TSS(ist+3);
    }
    else {
      RSP_for_cpl_x = RSP;
    }

    // align stack
    RSP_for_cpl_x &= BX_CONST64(0xfffffffffffffff0);

    // push flags onto stack
    // push current CS selector onto stack
    // push return offset onto stack
    write_new_stack_qword_64(RSP_for_cpl_x - 8,  cs_descriptor.dpl, old_SS);
    write_new_stack_qword_64(RSP_for_cpl_x - 16, cs_descriptor.dpl, old_RSP);
    write_new_stack_qword_64(RSP_for_cpl_x - 24, cs_descriptor.dpl, read_eflags());
    // push long pointer to return address onto new stack
    write_new_stack_qword_64(RSP_for_cpl_x - 32, cs_descriptor.dpl, old_CS);
    write_new_stack_qword_64(RSP_for_cpl_x - 40, cs_descriptor.dpl, old_RIP);
    RSP_for_cpl_x -= 40;

    if (push_error) {
      RSP_for_cpl_x -= 8;
      write_new_stack_qword_64(RSP_for_cpl_x, cs_descriptor.dpl, error_code);
    }

    // set the RPL field of CS to CPL
    branch_far64(&cs_selector, &cs_descriptor, gate_dest_offset, CPL);
  }
  else {
    BX_ERROR(("interrupt(long mode): bad descriptor type %u (CS.DPL=%u CPL=%u)",
      (unsigned) cs_descriptor.type, (unsigned) cs_descriptor.dpl, (unsigned) CPL));
    exception(BX_GP_EXCEPTION, cs_selector.value & 0xfffc);
  }

  RSP = RSP_for_cpl_x;

  // if interrupt gate then set IF to 0
  if (!(gate_descriptor.type & 1)) // even is int-gate
    BX_CPU_THIS_PTR clear_IF();
  BX_CPU_THIS_PTR clear_TF();
//BX_CPU_THIS_PTR clear_VM(); // VM is clear in long mode
  BX_CPU_THIS_PTR clear_RF();
  BX_CPU_THIS_PTR clear_NT();
}
예제 #26
0
/*---
 * JMPfar: call gate
 */
static void
JMPfar_pm_call_gate(const selector_t *callgate_sel)
{
    selector_t cs_sel;
    int rv;

    VERBOSE(("JMPfar_pm: CALL-GATE"));

    /* check privilege level */
    if (callgate_sel->desc.dpl < CPU_STAT_CPL) {
        VERBOSE(("JMPfar_pm: DPL(%d) < CPL(%d)", callgate_sel->desc.dpl, CPU_STAT_CPL));
        EXCEPTION(GP_EXCEPTION, callgate_sel->idx);
    }
    if (callgate_sel->desc.dpl < callgate_sel->rpl) {
        VERBOSE(("JMPfar_pm: DPL(%d) < RPL(%d)",  callgate_sel->desc.dpl, callgate_sel->rpl));
        EXCEPTION(GP_EXCEPTION, callgate_sel->idx);
    }

    /* not present */
    if (selector_is_not_present(callgate_sel)) {
        VERBOSE(("JMPfar_pm: selector is not present"));
        EXCEPTION(NP_EXCEPTION, callgate_sel->idx);
    }

    /* parse code segment selector */
    rv = parse_selector(&cs_sel, callgate_sel->desc.u.gate.selector);
    if (rv < 0) {
        VERBOSE(("JMPfar_pm: parse_selector (selector = %04x, rv = %d)", callgate_sel->desc.u.gate.selector, rv));
        EXCEPTION(GP_EXCEPTION, cs_sel.idx);
    }

    /* check segment type */
    if (!cs_sel.desc.s) {
        VERBOSE(("JMPfar_pm: code segment is system segment"));
        EXCEPTION(GP_EXCEPTION, cs_sel.idx);
    }
    if (!cs_sel.desc.u.seg.c) {
        VERBOSE(("JMPfar_pm: code segment is data segment"));
        EXCEPTION(GP_EXCEPTION, cs_sel.idx);
    }

    /* check privilege level */
    if (!cs_sel.desc.u.seg.ec) {
        /* 下巻 p.119 4.8.1.1. */
        if (cs_sel.rpl > CPU_STAT_CPL) {
            VERBOSE(("JMPfar_pm: RPL(%d) > CPL(%d)", cs_sel.rpl, CPU_STAT_CPL));
            EXCEPTION(GP_EXCEPTION, cs_sel.idx);
        }
        if (cs_sel.desc.dpl != CPU_STAT_CPL) {
            VERBOSE(("JMPfar_pm: DPL(%d) != CPL(%d)", cs_sel.desc.dpl, CPU_STAT_CPL));
            EXCEPTION(GP_EXCEPTION, cs_sel.idx);
        }
    } else {
        /* 下巻 p.120 4.8.1.2. */
        if (cs_sel.desc.dpl > CPU_STAT_CPL) {
            VERBOSE(("JMPfar_pm: DPL(%d) > CPL(%d)", cs_sel.desc.dpl, CPU_STAT_CPL));
            EXCEPTION(GP_EXCEPTION, cs_sel.idx);
        }
    }

    /* not present */
    if (selector_is_not_present(&cs_sel)) {
        VERBOSE(("JMPfar_pm: selector is not present"));
        EXCEPTION(NP_EXCEPTION, cs_sel.idx);
    }

    /* out of range */
    if (callgate_sel->desc.u.gate.offset > cs_sel.desc.u.seg.limit) {
        VERBOSE(("JMPfar_pm: new_ip is out of range. new_ip = %08x, limit = %08x", callgate_sel->desc.u.gate.offset, cs_sel.desc.u.seg.limit));
        EXCEPTION(GP_EXCEPTION, 0);
    }

    load_cs(cs_sel.selector, &cs_sel.desc, CPU_STAT_CPL);
    SET_EIP(callgate_sel->desc.u.gate.offset);
}
예제 #27
0
파일: smm.cpp 프로젝트: hack477/bochs4wii
void BX_CPU_C::enter_system_management_mode(void)
{
  invalidate_prefetch_q();

  BX_INFO(("Enter to System Management Mode"));

  // debug(BX_CPU_THIS_PTR prev_rip);

  BX_CPU_THIS_PTR in_smm = 1;

  Bit32u saved_state[SMM_SAVE_STATE_MAP_SIZE], n;
  // reset reserved bits
  for(n=0;n<SMM_SAVE_STATE_MAP_SIZE;n++) saved_state[n] = 0;
  // prepare CPU state to be saved in the SMRAM
  BX_CPU_THIS_PTR smram_save_state(saved_state);

  bx_phy_address base = BX_CPU_THIS_PTR smbase + 0x10000;
  // could be optimized with reading of only non-reserved bytes
  for(n=0;n<SMM_SAVE_STATE_MAP_SIZE;n++) {
    base -= 4;
    BX_MEM(0)->writePhysicalPage(BX_CPU_THIS, base, 4, &saved_state[n]);
    BX_DBG_PHY_MEMORY_ACCESS(BX_CPU_ID, base, 4, BX_WRITE, (Bit8u*)(&saved_state[n]));
  }

  BX_CPU_THIS_PTR setEFlags(0x2); // Bit1 is always set
  BX_CPU_THIS_PTR prev_rip = RIP = 0x00008000;
  BX_CPU_THIS_PTR dr7 = 0x00000400;

  // CR0 - PE, EM, TS, and PG flags set to 0; others unmodified
  BX_CPU_THIS_PTR cr0.set_PE(0); // real mode (bit 0)
  BX_CPU_THIS_PTR cr0.set_EM(0); // emulate math coprocessor (bit 2)
  BX_CPU_THIS_PTR cr0.set_TS(0); // no task switch (bit 3)
  BX_CPU_THIS_PTR cr0.set_PG(0); // paging disabled (bit 31)

  // paging mode was changed - flush TLB
  TLB_flush(1); // 1 = Flush Global entries also

#if BX_CPU_LEVEL >= 4
  BX_CPU_THIS_PTR cr4.setRegister(0);
#endif

#if BX_SUPPORT_X86_64
  BX_CPU_THIS_PTR efer.setRegister(0);
#endif

  parse_selector(BX_CPU_THIS_PTR smbase >> 4,
               &BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS].selector);

  BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS].cache.valid    = 1;
  BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS].cache.p        = 1;
  BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS].cache.dpl      = 0;
  BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS].cache.segment  = 1;  /* data/code segment */
  BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS].cache.type     = BX_DATA_READ_WRITE_ACCESSED;

  BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS].cache.u.segment.base         = BX_CPU_THIS_PTR smbase;
  BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS].cache.u.segment.limit        = 0xffff;
  BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS].cache.u.segment.limit_scaled = 0xffffffff;
  BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS].cache.u.segment.avl = 0;
  BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS].cache.u.segment.g   = 1; /* page granular */
  BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS].cache.u.segment.d_b = 0; /* 16bit default size */
#if BX_SUPPORT_X86_64
  BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS].cache.u.segment.l   = 0; /* 16bit default size */
#endif

#if BX_SUPPORT_ICACHE
  BX_CPU_THIS_PTR updateFetchModeMask();
#endif

  handleCpuModeChange();

#if BX_CPU_LEVEL >= 4 && BX_SUPPORT_ALIGNMENT_CHECK
  handleAlignmentCheck();
#endif

  /* DS (Data Segment) and descriptor cache */
  parse_selector(0x0000,
               &BX_CPU_THIS_PTR sregs[BX_SEG_REG_DS].selector);

  BX_CPU_THIS_PTR sregs[BX_SEG_REG_DS].cache.valid    = 1;
  BX_CPU_THIS_PTR sregs[BX_SEG_REG_DS].cache.p        = 1;
  BX_CPU_THIS_PTR sregs[BX_SEG_REG_DS].cache.dpl      = 0;
  BX_CPU_THIS_PTR sregs[BX_SEG_REG_DS].cache.segment  = 1; /* data/code segment */
  BX_CPU_THIS_PTR sregs[BX_SEG_REG_DS].cache.type     = BX_DATA_READ_WRITE_ACCESSED;

  BX_CPU_THIS_PTR sregs[BX_SEG_REG_DS].cache.u.segment.base         = 0x00000000;
  BX_CPU_THIS_PTR sregs[BX_SEG_REG_DS].cache.u.segment.limit        = 0xffff;
  BX_CPU_THIS_PTR sregs[BX_SEG_REG_DS].cache.u.segment.limit_scaled = 0xffffffff;
  BX_CPU_THIS_PTR sregs[BX_SEG_REG_DS].cache.u.segment.avl = 0;
  BX_CPU_THIS_PTR sregs[BX_SEG_REG_DS].cache.u.segment.g   = 1; /* byte granular */
  BX_CPU_THIS_PTR sregs[BX_SEG_REG_DS].cache.u.segment.d_b = 0; /* 16bit default size */
#if BX_SUPPORT_X86_64
  BX_CPU_THIS_PTR sregs[BX_SEG_REG_DS].cache.u.segment.l   = 0; /* 16bit default size */
#endif

  // use DS segment as template for the others
  BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS] = BX_CPU_THIS_PTR sregs[BX_SEG_REG_DS];
  BX_CPU_THIS_PTR sregs[BX_SEG_REG_ES] = BX_CPU_THIS_PTR sregs[BX_SEG_REG_DS];
  BX_CPU_THIS_PTR sregs[BX_SEG_REG_FS] = BX_CPU_THIS_PTR sregs[BX_SEG_REG_DS];
  BX_CPU_THIS_PTR sregs[BX_SEG_REG_GS] = BX_CPU_THIS_PTR sregs[BX_SEG_REG_DS];
}
예제 #28
0
BX_CPU_C::call_protected(bxInstruction_c *i, Bit16u cs_raw, bx_address disp)
{
  bx_selector_t cs_selector;
  Bit32u dword1, dword2;
  bx_descriptor_t cs_descriptor;

  /* new cs selector must not be null, else #GP(0) */
  if ((cs_raw & 0xfffc) == 0) {
    BX_ERROR(("call_protected: CS selector null"));
    exception(BX_GP_EXCEPTION, 0, 0);
  }

  parse_selector(cs_raw, &cs_selector);
  // check new CS selector index within its descriptor limits,
  // else #GP(new CS selector)
  fetch_raw_descriptor(&cs_selector, &dword1, &dword2, BX_GP_EXCEPTION);
  parse_descriptor(dword1, dword2, &cs_descriptor);

  // examine AR byte of selected descriptor for various legal values
  if (cs_descriptor.valid==0) {
    BX_ERROR(("call_protected: invalid CS descriptor"));
    exception(BX_GP_EXCEPTION, cs_raw & 0xfffc, 0);
  }

  if (cs_descriptor.segment)   // normal segment
  {
    check_cs(&cs_descriptor, cs_raw, BX_SELECTOR_RPL(cs_raw), CPL);

#if BX_SUPPORT_X86_64
    if (i->os64L()) {
      // push return address onto stack (CS padded to 64bits)
      push_64((Bit64u) BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS].selector.value);
      push_64(RIP);
    }
    else
#endif
    if (i->os32L()) {
      // push return address onto stack (CS padded to 32bits)
      push_32((Bit32u) BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS].selector.value);
      push_32(EIP);
    }
    else {
      // push return address onto stack
      push_16(BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS].selector.value);
      push_16(IP);
    }

    // load code segment descriptor into CS cache
    // load CS with new code segment selector
    // set RPL of CS to CPL
    branch_far64(&cs_selector, &cs_descriptor, disp, CPL);

    return;
  }
  else { // gate & special segment
    bx_descriptor_t  gate_descriptor = cs_descriptor;
    bx_selector_t    gate_selector = cs_selector;
    Bit32u new_EIP;
    Bit16u dest_selector;
    Bit16u          raw_tss_selector;
    bx_selector_t   tss_selector;
    bx_descriptor_t tss_descriptor;
    Bit32u temp_eIP;

    // descriptor DPL must be >= CPL else #GP(gate selector)
    if (gate_descriptor.dpl < CPL) {
      BX_ERROR(("call_protected: descriptor.dpl < CPL"));
      exception(BX_GP_EXCEPTION, cs_raw & 0xfffc, 0);
    }

    // descriptor DPL must be >= gate selector RPL else #GP(gate selector)
    if (gate_descriptor.dpl < gate_selector.rpl) {
      BX_ERROR(("call_protected: descriptor.dpl < selector.rpl"));
      exception(BX_GP_EXCEPTION, cs_raw & 0xfffc, 0);
    }

#if BX_SUPPORT_X86_64
    if (long_mode()) {
      // call gate type is higher priority than non-present bit check
      if (gate_descriptor.type != BX_386_CALL_GATE) {
        BX_ERROR(("call_protected: gate type %u unsupported in long mode", (unsigned) gate_descriptor.type));
        exception(BX_GP_EXCEPTION, cs_raw & 0xfffc, 0);
      }
    }
    else
#endif
    {
      switch (gate_descriptor.type) {
        case BX_SYS_SEGMENT_AVAIL_286_TSS:
        case BX_SYS_SEGMENT_AVAIL_386_TSS:
        case BX_TASK_GATE:
        case BX_286_CALL_GATE:
        case BX_386_CALL_GATE:
          break;
        default:
          BX_ERROR(("call_protected(): gate.type(%u) unsupported", (unsigned) gate_descriptor.type));
          exception(BX_GP_EXCEPTION, cs_raw & 0xfffc, 0);
      }
    }

    // gate descriptor must be present else #NP(gate selector)
    if (! IS_PRESENT(gate_descriptor)) {
      BX_ERROR(("call_protected: gate not present"));
      exception(BX_NP_EXCEPTION, cs_raw & 0xfffc, 0);
    }

#if BX_SUPPORT_X86_64
    if (long_mode()) {
      call_gate64(&gate_selector);
      return;
    }
#endif

    switch (gate_descriptor.type) {
      case BX_SYS_SEGMENT_AVAIL_286_TSS:
      case BX_SYS_SEGMENT_AVAIL_386_TSS:

        if (gate_descriptor.type==BX_SYS_SEGMENT_AVAIL_286_TSS)
          BX_DEBUG(("call_protected: 16bit available TSS"));
        else
          BX_DEBUG(("call_protected: 32bit available TSS"));

        // SWITCH_TASKS _without_ nesting to TSS
        task_switch(&gate_selector, &gate_descriptor,
          BX_TASK_FROM_CALL_OR_INT, dword1, dword2);

        // EIP must be in code seg limit, else #GP(0)
        if (EIP > BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS].cache.u.segment.limit_scaled) {
          BX_ERROR(("call_protected: EIP not within CS limits"));
          exception(BX_GP_EXCEPTION, 0, 0);
        }
        return;

      case BX_TASK_GATE:
        // examine selector to TSS, given in Task Gate descriptor
        // must specify global in the local/global bit else #TS(TSS selector)
        raw_tss_selector = gate_descriptor.u.taskgate.tss_selector;
        parse_selector(raw_tss_selector, &tss_selector);

        if (tss_selector.ti) {
          BX_ERROR(("call_protected: tss_selector.ti=1"));
          exception(BX_GP_EXCEPTION, raw_tss_selector & 0xfffc, 0);
        }

        // index must be within GDT limits else #TS(TSS selector)
        fetch_raw_descriptor(&tss_selector, &dword1, &dword2, BX_GP_EXCEPTION);

        parse_descriptor(dword1, dword2, &tss_descriptor);

        // descriptor AR byte must specify available TSS
        //   else #GP(TSS selector)
        if (tss_descriptor.valid==0 || tss_descriptor.segment) {
          BX_ERROR(("call_protected: TSS selector points to bad TSS"));
          exception(BX_GP_EXCEPTION, raw_tss_selector & 0xfffc, 0);
        }
        if (tss_descriptor.type!=BX_SYS_SEGMENT_AVAIL_286_TSS &&
            tss_descriptor.type!=BX_SYS_SEGMENT_AVAIL_386_TSS)
        {
          BX_ERROR(("call_protected: TSS selector points to bad TSS"));
          exception(BX_GP_EXCEPTION, raw_tss_selector & 0xfffc, 0);
        }

        // task state segment must be present, else #NP(tss selector)
        if (! IS_PRESENT(tss_descriptor)) {
          BX_ERROR(("call_protected: task descriptor.p == 0"));
          exception(BX_NP_EXCEPTION, raw_tss_selector & 0xfffc, 0);
        }

        // SWITCH_TASKS without nesting to TSS
        task_switch(&tss_selector, &tss_descriptor,
                    BX_TASK_FROM_CALL_OR_INT, dword1, dword2);

        // EIP must be within code segment limit, else #TS(0)
        if (BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS].cache.u.segment.d_b)
          temp_eIP = EIP;
        else
          temp_eIP =  IP;

        if (temp_eIP > BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS].cache.u.segment.limit_scaled)
        {
          BX_ERROR(("call_protected: EIP > CS.limit"));
          exception(BX_GP_EXCEPTION, 0, 0);
        }
        return;

      case BX_286_CALL_GATE:
      case BX_386_CALL_GATE:
        // examine code segment selector in call gate descriptor
        BX_DEBUG(("call_protected: call gate"));
        dest_selector = gate_descriptor.u.gate.dest_selector;
        new_EIP       = gate_descriptor.u.gate.dest_offset;

        // selector must not be null else #GP(0)
        if ((dest_selector & 0xfffc) == 0) {
          BX_ERROR(("call_protected: selector in gate null"));
          exception(BX_GP_EXCEPTION, 0, 0);
        }

        parse_selector(dest_selector, &cs_selector);
        // selector must be within its descriptor table limits,
        //   else #GP(code segment selector)
        fetch_raw_descriptor(&cs_selector, &dword1, &dword2, BX_GP_EXCEPTION);
        parse_descriptor(dword1, dword2, &cs_descriptor);

        // AR byte of selected descriptor must indicate code segment,
        //   else #GP(code segment selector)
        // DPL of selected descriptor must be <= CPL,
        // else #GP(code segment selector)
        if (cs_descriptor.valid==0 || cs_descriptor.segment==0 ||
            IS_DATA_SEGMENT(cs_descriptor.type) ||
            cs_descriptor.dpl > CPL)
        {
          BX_ERROR(("call_protected: selected descriptor is not code"));
          exception(BX_GP_EXCEPTION, dest_selector & 0xfffc, 0);
        }

        // code segment must be present else #NP(selector)
        if (! IS_PRESENT(cs_descriptor)) {
          BX_ERROR(("call_protected: code segment not present !"));
          exception(BX_NP_EXCEPTION, dest_selector & 0xfffc, 0);
        }

        // CALL GATE TO MORE PRIVILEGE
        // if non-conforming code segment and DPL < CPL then
        if (IS_CODE_SEGMENT_NON_CONFORMING(cs_descriptor.type) && (cs_descriptor.dpl < CPL))
        {
          Bit16u SS_for_cpl_x;
          Bit32u ESP_for_cpl_x;
          bx_selector_t   ss_selector;
          bx_descriptor_t ss_descriptor;
          Bit16u   return_SS, return_CS;
          Bit32u   return_ESP, return_EIP;
          Bit16u   parameter_word[32];
          Bit32u   parameter_dword[32];

          BX_DEBUG(("CALL GATE TO MORE PRIVILEGE LEVEL"));

          // get new SS selector for new privilege level from TSS
          get_SS_ESP_from_TSS(cs_descriptor.dpl, &SS_for_cpl_x, &ESP_for_cpl_x);

          // check selector & descriptor for new SS:
          // selector must not be null, else #TS(0)
          if ((SS_for_cpl_x & 0xfffc) == 0) {
            BX_ERROR(("call_protected: new SS null"));
            exception(BX_TS_EXCEPTION, 0, 0);
          }

          // selector index must be within its descriptor table limits,
          //   else #TS(SS selector)
          parse_selector(SS_for_cpl_x, &ss_selector);
          fetch_raw_descriptor(&ss_selector, &dword1, &dword2, BX_TS_EXCEPTION);
          parse_descriptor(dword1, dword2, &ss_descriptor);

          // selector's RPL must equal DPL of code segment,
          //   else #TS(SS selector)
          if (ss_selector.rpl != cs_descriptor.dpl) {
            BX_ERROR(("call_protected: SS selector.rpl != CS descr.dpl"));
            exception(BX_TS_EXCEPTION, SS_for_cpl_x & 0xfffc, 0);
          }

          // stack segment DPL must equal DPL of code segment,
          //   else #TS(SS selector)
          if (ss_descriptor.dpl != cs_descriptor.dpl) {
            BX_ERROR(("call_protected: SS descr.rpl != CS descr.dpl"));
            exception(BX_TS_EXCEPTION, SS_for_cpl_x & 0xfffc, 0);
          }

          // descriptor must indicate writable data segment,
          //   else #TS(SS selector)
          if (ss_descriptor.valid==0 || ss_descriptor.segment==0 ||
               IS_CODE_SEGMENT(ss_descriptor.type) ||
              !IS_DATA_SEGMENT_WRITEABLE(ss_descriptor.type))
          {
            BX_ERROR(("call_protected: ss descriptor is not writable data seg"));
            exception(BX_TS_EXCEPTION, SS_for_cpl_x & 0xfffc, 0);
          }

          // segment must be present, else #SS(SS selector)
          if (! IS_PRESENT(ss_descriptor)) {
            BX_ERROR(("call_protected: ss descriptor not present"));
            exception(BX_SS_EXCEPTION, SS_for_cpl_x & 0xfffc, 0);
          }

          // get word count from call gate, mask to 5 bits
          unsigned param_count = gate_descriptor.u.gate.param_count & 0x1f;

          // save return SS:eSP to be pushed on new stack
          return_SS = BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS].selector.value;
          if (BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS].cache.u.segment.d_b)
            return_ESP = ESP;
          else
            return_ESP =  SP;

          // save return CS:eIP to be pushed on new stack
          return_CS = BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS].selector.value;
          if (cs_descriptor.u.segment.d_b)
            return_EIP = EIP;
          else
            return_EIP = IP;

          if (gate_descriptor.type==BX_286_CALL_GATE) {
            for (unsigned i=0; i<param_count; i++) {
              parameter_word[i] = read_virtual_word(BX_SEG_REG_SS, return_ESP + i*2);
            }
          }
          else {
            for (unsigned i=0; i<param_count; i++) {
              parameter_dword[i] = read_virtual_dword(BX_SEG_REG_SS, return_ESP + i*4);
            }
          }

          // Prepare new stack segment
          bx_segment_reg_t new_stack;
          new_stack.selector = ss_selector;
          new_stack.cache = ss_descriptor;
          new_stack.selector.rpl = cs_descriptor.dpl;
          // add cpl to the selector value
          new_stack.selector.value = (0xfffc & new_stack.selector.value) |
            new_stack.selector.rpl;

          /* load new SS:SP value from TSS */
          if (ss_descriptor.u.segment.d_b) {
            Bit32u temp_ESP = ESP_for_cpl_x;

            // push pointer of old stack onto new stack
            if (gate_descriptor.type==BX_386_CALL_GATE) {
              write_new_stack_dword_32(&new_stack, temp_ESP-4, cs_descriptor.dpl, return_SS);
              write_new_stack_dword_32(&new_stack, temp_ESP-8, cs_descriptor.dpl, return_ESP);
              temp_ESP -= 8;

              for (unsigned i=param_count; i>0; i--) {
                temp_ESP -= 4;
                write_new_stack_dword_32(&new_stack, temp_ESP, cs_descriptor.dpl, parameter_dword[i-1]);
              }
              // push return address onto new stack
              write_new_stack_dword_32(&new_stack, temp_ESP-4, cs_descriptor.dpl, return_CS);
              write_new_stack_dword_32(&new_stack, temp_ESP-8, cs_descriptor.dpl, return_EIP);
              temp_ESP -= 8;
            }
            else {
              write_new_stack_word_32(&new_stack, temp_ESP-2, cs_descriptor.dpl, return_SS);
              write_new_stack_word_32(&new_stack, temp_ESP-4, cs_descriptor.dpl, (Bit16u) return_ESP);
              temp_ESP -= 4;

              for (unsigned i=param_count; i>0; i--) {
                temp_ESP -= 2;
                write_new_stack_word_32(&new_stack, temp_ESP, cs_descriptor.dpl, parameter_word[i-1]);
              }
              // push return address onto new stack
              write_new_stack_word_32(&new_stack, temp_ESP-2, cs_descriptor.dpl, return_CS);
              write_new_stack_word_32(&new_stack, temp_ESP-4, cs_descriptor.dpl, (Bit16u) return_EIP);
              temp_ESP -= 4;
            }

            ESP = temp_ESP;
          }
          else {
            Bit16u temp_SP = (Bit16u) ESP_for_cpl_x;

            // push pointer of old stack onto new stack
            if (gate_descriptor.type==BX_386_CALL_GATE) {
              write_new_stack_dword_32(&new_stack, (Bit16u)(temp_SP-4), cs_descriptor.dpl, return_SS);
              write_new_stack_dword_32(&new_stack, (Bit16u)(temp_SP-8), cs_descriptor.dpl, return_ESP);
              temp_SP -= 8;

              for (unsigned i=param_count; i>0; i--) {
                temp_SP -= 4;
                write_new_stack_dword_32(&new_stack, temp_SP, cs_descriptor.dpl, parameter_dword[i-1]);
              }
              // push return address onto new stack
              write_new_stack_dword_32(&new_stack, (Bit16u)(temp_SP-4), cs_descriptor.dpl, return_CS);
              write_new_stack_dword_32(&new_stack, (Bit16u)(temp_SP-8), cs_descriptor.dpl, return_EIP);
              temp_SP -= 8;
            }
            else {
              write_new_stack_word_32(&new_stack, (Bit16u)(temp_SP-2), cs_descriptor.dpl, return_SS);
              write_new_stack_word_32(&new_stack, (Bit16u)(temp_SP-4), cs_descriptor.dpl, (Bit16u) return_ESP);
              temp_SP -= 4;

              for (unsigned i=param_count; i>0; i--) {
                temp_SP -= 2;
                write_new_stack_word_32(&new_stack, temp_SP, cs_descriptor.dpl, parameter_word[i-1]);
              }
              // push return address onto new stack
              write_new_stack_word_32(&new_stack, (Bit16u)(temp_SP-2), cs_descriptor.dpl, return_CS);
              write_new_stack_word_32(&new_stack, (Bit16u)(temp_SP-4), cs_descriptor.dpl, (Bit16u) return_EIP);
              temp_SP -= 4;
            }

            SP = temp_SP;
          }

          // new eIP must be in code segment limit else #GP(0)
          if (new_EIP > cs_descriptor.u.segment.limit_scaled) {
            BX_ERROR(("call_protected: EIP not within CS limits"));
            exception(BX_GP_EXCEPTION, 0, 0);
          }

          /* load SS descriptor */
          load_ss(&ss_selector, &ss_descriptor, cs_descriptor.dpl);

          /* load new CS:IP value from gate */
          /* load CS descriptor */
          /* set CPL to stack segment DPL */
          /* set RPL of CS to CPL */
          load_cs(&cs_selector, &cs_descriptor, cs_descriptor.dpl);
          EIP = new_EIP;
        }
        else   // CALL GATE TO SAME PRIVILEGE
        {
          BX_DEBUG(("CALL GATE TO SAME PRIVILEGE"));

          if (gate_descriptor.type == BX_386_CALL_GATE) {
            // call gate 32bit, push return address onto stack
            push_32(BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS].selector.value);
            push_32(EIP);
          }
          else {
            // call gate 16bit, push return address onto stack
            push_16(BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS].selector.value);
            push_16(IP);
          }

          // load CS:EIP from gate
          // load code segment descriptor into CS register
          // set RPL of CS to CPL
          branch_far32(&cs_selector, &cs_descriptor, new_EIP, CPL);
        }
        return;

      default: // can't get here
        BX_PANIC(("call_protected: gate type %u unsupported", (unsigned) cs_descriptor.type));
        exception(BX_GP_EXCEPTION, cs_raw & 0xfffc, 0);
    }
  }
}