static void pcap_adc_trigger(struct pcap_chip *pcap) { u32 tmp; u8 head; mutex_lock(&pcap->adc_mutex); head = pcap->adc_head; if (!pcap->adc_queue[head]) { /* queue is empty, save power */ pcap_disable_adc(pcap); mutex_unlock(&pcap->adc_mutex); return; } /* start conversion on requested bank, save TS_M bits */ ezx_pcap_read(pcap, PCAP_REG_ADC, &tmp); tmp &= (PCAP_ADC_TS_M_MASK | PCAP_ADC_TS_REF_LOWPWR); tmp |= pcap->adc_queue[head]->flags | PCAP_ADC_ADEN; if (pcap->adc_queue[head]->bank == PCAP_ADC_BANK_1) tmp |= PCAP_ADC_AD_SEL1; ezx_pcap_write(pcap, PCAP_REG_ADC, tmp); mutex_unlock(&pcap->adc_mutex); ezx_pcap_write(pcap, PCAP_REG_ADR, PCAP_ADR_ASC); }
static void pcap_adc_trigger(struct pcap_chip *pcap) { u32 tmp; u8 head; mutex_lock(&pcap->adc_mutex); head = pcap->adc_head; if (!pcap->adc_queue[head]) { pcap_disable_adc(pcap); mutex_unlock(&pcap->adc_mutex); return; } ezx_pcap_read(pcap, PCAP_REG_ADC, &tmp); tmp &= (PCAP_ADC_TS_M_MASK | PCAP_ADC_TS_REF_LOWPWR); tmp |= pcap->adc_queue[head]->flags | PCAP_ADC_ADEN; if (pcap->adc_queue[head]->bank == PCAP_ADC_BANK_1) tmp |= PCAP_ADC_AD_SEL1; ezx_pcap_write(pcap, PCAP_REG_ADC, tmp); mutex_unlock(&pcap->adc_mutex); ezx_pcap_write(pcap, PCAP_REG_ADR, PCAP_ADR_ASC); }