void sysAic7880PciInit(void)
{
int busNo; /* PCI bus number */
int devNo; /* PCI device number */
int funcNo; /* PCI function number */
int index = 0; /* desired instance of device */
UINT32 membaseCsr; /* base address 0 */
UINT32 iobaseCsr; /* base address 1 */
char irq; /* IRQ level */
AIC7880_INFO *aicRes;
aicRes = &aic7880InfoTable;
if ((pciFindDevice (AIC7880_PCI_VENDOR_ID, AIC7880_PCI_DEVICE_ID,
index, &busNo, &devNo, &funcNo)) != OK)
{
logMsg("AIC 7880 SCSI controller not found\n", 0, 0, 0, 0, 0, 0);
return;
}
/* if PCI_CFG_FORCE is specified then set configuration parameters */
if (PCI_CFG_TYPE == PCI_CFG_FORCE)
{
pciConfigOutLong(busNo, devNo, funcNo, PCI_CFG_BASE_ADDRESS_0,
AIC7880_IOBASE);
pciConfigOutLong(busNo, devNo, funcNo, PCI_CFG_BASE_ADDRESS_1,
AIC7880_MEMBASE);
pciConfigOutByte(busNo, devNo, funcNo, PCI_CFG_DEV_INT_LINE,
AIC7880_INT_LVL);
}
/* read the configuration parameters */
pciConfigInLong(busNo, devNo, funcNo, PCI_CFG_BASE_ADDRESS_0,
&iobaseCsr);
pciConfigInLong(busNo, devNo, funcNo, PCI_CFG_BASE_ADDRESS_1,
&membaseCsr);
pciConfigInByte(busNo, devNo, funcNo, PCI_CFG_DEV_INT_LINE,
&irq);
membaseCsr &= PCI_MEMBASE_MASK;
iobaseCsr &= PCI_IOBASE_MASK;
/* update the mmu table */
if (sysMmuMapAdd((void *)membaseCsr, (UINT)AIC7880_MEMSIZE,
(UINT)AIC7880_INIT_STATE_MASK,
(UINT)AIC7880_INIT_STATE) == ERROR)
{
logMsg("Unable map requested memory\n", 0, 0, 0, 0, 0, 0);
return;
}
/* update the device specific info */
aicRes->pciBus = busNo;
aicRes->pciDevice = devNo;
aicRes->pciFunc = funcNo;
aicRes->irq = irq;
/* enable mapped memory and IO addresses */
pciConfigOutWord (aicRes->pciBus, aicRes->pciDevice, aicRes->pciFunc,
PCI_CFG_COMMAND, PCI_CMD_IO_ENABLE |
PCI_CMD_MEM_ENABLE | PCI_CMD_MASTER_ENABLE);
}
int probe1()
{
unsigned int pciBusNo, pciDevNo, pciFuncNo;
unsigned char byte;
/* int i,j;*/
UINT32 s_pBA0, s_pBA1;
/* To ensure that taskDelay(1) is 1ms delay */
sysClkRateSet(1000);
if (pciConfigLibInit (PCI_MECHANISM_1, 0xCF8, 0xCFC, 0) != OK) {
printf("PCI lib config error\n");
return 1;
}
/****************************
* Find SoundCard
* Set BaseAddr0, BaseAddr1
****************************/
if(!(pciFindDevice(PCI_VENDOR_ID_CIRRUS,PCI_DEVICE_ID_CRYSTAL_CS4281,
0, &pciBusNo, &pciDevNo, &pciFuncNo)==OK)) {
printf("\n CS4281 sound card NOT FOUND!!! \n");
return 1;
}
printf("\n FOUND CS4281 sound card, configuring BA0,BA1... \n");
pciConfigOutLong( pciBusNo, pciDevNo, pciFuncNo,
PCI_CFG_BASE_ADDRESS_0, CS4281_pBA0);
/*
pciConfigOutLong( pciBusNo, pciDevNo, pciFuncNo,
PCI_CFG_BASE_ADDRESS_1, CS4281_pBA1);
*/
pciConfigInLong( pciBusNo, pciDevNo, pciFuncNo,
PCI_CFG_BASE_ADDRESS_0, &s_pBA0);
pciConfigInLong( pciBusNo, pciDevNo, pciFuncNo,
PCI_CFG_BASE_ADDRESS_1, &s_pBA1 );
printf ("\npBusNo pDeviceNo pFuncNo pBA0 pBA1\n\n");
printf ("%.8x %.8x %.8x %.8x %.8x \n",
pciBusNo, pciDevNo, pciFuncNo, s_pBA0,s_pBA1);
/********************************
* Config PCI Device Capability
* DMA Master
* MEM mapped
********************************/
/* Set the INTA vector */
pciConfigInByte(pciBusNo, pciDevNo, pciFuncNo,
PCI_CFG_DEV_INT_LINE, &cs4281_irq);
printf("\nFound CS4281 configured for IRQ %d\n", cs4281_irq);
pciConfigInByte(pciBusNo, pciDevNo, pciFuncNo,
PCI_CFG_DEV_INT_PIN, &byte);
printf("\tINT_PIN=%.8x\n", byte);
/* Enable the device's capabilities as specified
* Bus Master Enable/ Mem Space Enable */
pciConfigOutWord(pciBusNo, pciDevNo, pciFuncNo, PCI_CFG_COMMAND,
(unsigned short)0x0006);
/***************************
* BringUp Hardware
***************************/
/*Include Init Function Here*/
cs4281_hw_init();
/****************************
* Allocate ADC_BUFFER
* Allocate DAC_BUFFER
*
* Hook cs4281_interrupt
*
* Program CoDec
****************************/
if((DAC_BUFFER=valloc(DAC_BUFFER_SIZE))==NULL) {
printf("\n DAC_BUFFER valloc failed!\n");
return 1;
}
memset( DAC_BUFFER, 0, DAC_BUFFER_SIZE );
printf("\ndac=%x",DAC_BUFFER);
/*for( i=0 ; i < DAC_BUFFER_SIZE ; i++ )
((char *)DAC_BUFFER)[i]=0x7f;*/
writel((UINT32)DAC_BUFFER+8,CS4281_pBA0 + BA0_DBA0);
writel(DAC_BUFFER_SIZE-16, CS4281_pBA0 + BA0_DBC0);
printf("\nbao=%x",readl(CS4281_pBA0 + BA0_DBA0));
printf("\nbco=%x",readl(CS4281_pBA0 + BA0_DBC0));
printf("\ncco=%x",readl(CS4281_pBA0 + BA0_DCC0));
if((ADC_BUFFER=valloc(ADC_BUFFER_SIZE))==NULL) {
printf("\n ADC_BUFFER valloc failed!\n");
return 1;
}
printf("\nadc=%x",ADC_BUFFER);
/*for( i=0 ; i < ADC_BUFFER_SIZE ; i++ )
((char *)ADC_BUFFER)[i]=0x7f;*/
writel((UINT32)ADC_BUFFER+8,CS4281_pBA0 + BA0_DBA1);
writel(ADC_BUFFER_SIZE-16, CS4281_pBA0 + BA0_DBC1);
/* connect interrupt */
printf("\n Hook cs4281_interrupt to vector %d\n",
(INUM_TO_IVEC (cs4281_irq+INT_NUM_IRQ0)));
pciIntConnect((INUM_TO_IVEC (cs4281_irq+INT_NUM_IRQ0)),
(VOIDFUNCPTR)cs4281_interrupt, 0);
sysIntEnablePIC(cs4281_irq);
SEM_DMA_Playback = semBCreate(SEM_Q_FIFO,SEM_EMPTY);
SEM_MY_Playback = semBCreate(SEM_Q_FIFO,SEM_EMPTY);
SEM_DMA_Record = semBCreate(SEM_Q_FIFO,SEM_EMPTY);
SEM_Sample = semBCreate(SEM_Q_FIFO,SEM_EMPTY);
CNT_DMA_Playback = CNT_DMA_Record = 0;
/* program coDec */
printf("\n Program CoDec (sample rate, DMA...)\n");
prog_codec();
/*********************************************
* start dac/adc, interrupt is comming...
*********************************************/
start_dac();
return 0;
}
STATUS sysRtl81x9PciInit (
UINT32 pciBus, /* store a PCI bus number */
UINT32 pciDevice, /* store a PCI device number */
UINT32 pciFunc, /* store a PCI function number */
UINT32 vendorId, /* store a PCI vendor ID */
UINT32 deviceId, /* store a PCI device ID */
UINT8 revisionId /* store a PCI revision ID */
)
{
UINT32 membaseCsr;
UINT32 iobaseCsr;
char irq;
RTL81X9_PCI_RESOURCES * pRsrc;
/* for all the support network devices find if some of them exist */
sysDebugTrace(0x70);
if(rtl81x9EndUnits >= RTL81X9_MAX_DEV){
return ERROR;
}
/* load up the PCI device table */
pRsrc = rtl81x9PciResrcs + rtl81x9EndUnits;
pRsrc->pciBus = pciBus;
pRsrc->pciDevice = pciDevice;
pRsrc->pciFunc = pciFunc;
rtl81x9EndUnits++; /* number of units found */
sysDebugTrace(0x72);
/* Now initialize the unit */
/* Fill in the resource entry */
sysDebugTrace(0x74);
/*
* get memory base address and IO base address
* Note: we read it in again, even if we just wrote it out because
* the device can change what we wrote
*/
pciConfigInLong (pRsrc->pciBus,
pRsrc->pciDevice,
pRsrc->pciFunc,
PCI_CFG_BASE_ADDRESS_0, &iobaseCsr);
pciConfigInLong (pRsrc->pciBus,
pRsrc->pciDevice,
pRsrc->pciFunc,
PCI_CFG_BASE_ADDRESS_1, &membaseCsr);
pciConfigInByte (pRsrc->pciBus,
pRsrc->pciDevice,
pRsrc->pciFunc,
PCI_CFG_DEV_INT_LINE, &irq);
sysDebugTrace(0x75);
/*
* mask off registers. IO base needs to be masked off because bit0
* will always be set to 1
*/
membaseCsr &= PCI_MEMBASE_MASK;
iobaseCsr &= PCI_IOBASE_MASK;
#if defined(INCLUDE_MMU_BASIC) || defined(INCLUDE_MMU_FULL)
sysDebugTrace(0x76);
if (sysMmuMapAdd ((void *)(membaseCsr & PCI_DEV_MMU_MSK),
VM_PAGE_SIZE,
VM_STATE_MASK_FOR_ALL,
VM_STATE_FOR_PCI
) == ERROR)
{
/* for now, exit, but later break and stop where we're at
when we're detecting multiple units */
return (ERROR);
}
#endif /* INCLUDE_MMU_BASIC */
sysDebugTrace(0x78);
/* over write the resource table with values read */
pRsrc->membaseCsr = membaseCsr;
pRsrc->iobaseCsr = iobaseCsr;
pRsrc->irq = irq;
pRsrc->irqvec = irq + EXT_INTERRUPT_BASE;
/* enable mapped memory and IO addresses */
pciConfigOutWord (pRsrc->pciBus,
pRsrc->pciDevice,
pRsrc->pciFunc,
PCI_CFG_COMMAND, PCI_CMD_IO_ENABLE |
PCI_CMD_MEM_ENABLE | PCI_CMD_MASTER_ENABLE);
/* disable sleep mode */
sysDebugTrace(0x79);
pciConfigOutWord (
pRsrc->pciBus,
pRsrc->pciDevice,
pRsrc->pciFunc,
PCI_CFG_MODE,
SLEEP_MODE_DIS);
rtl81x9Resources[rtl81x9EndUnits-1][0]=membaseCsr;
rtl81x9Resources[rtl81x9EndUnits-1][1]=irq;
rtl81x9Resources[rtl81x9EndUnits-1][2]=irq+EXT_INTERRUPT_BASE;
sysDebugTrace(0x7a);
return OK;
}