int pci_host_common_probe(struct platform_device *pdev, struct pci_ecam_ops *ops) { const char *type; struct device *dev = &pdev->dev; struct device_node *np = dev->of_node; struct pci_bus *bus, *child; struct pci_config_window *cfg; struct list_head resources; type = of_get_property(np, "device_type", NULL); if (!type || strcmp(type, "pci")) { dev_err(dev, "invalid \"device_type\" %s\n", type); return -EINVAL; } of_pci_check_probe_only(); /* Parse and map our Configuration Space windows */ INIT_LIST_HEAD(&resources); cfg = gen_pci_init(dev, &resources, ops); if (IS_ERR(cfg)) return PTR_ERR(cfg); /* Do not reassign resources if probe only */ if (!pci_has_flag(PCI_PROBE_ONLY)) pci_add_flags(PCI_REASSIGN_ALL_RSRC | PCI_REASSIGN_ALL_BUS); bus = pci_scan_root_bus(dev, cfg->busr.start, &ops->pci_ops, cfg, &resources); if (!bus) { dev_err(dev, "Scanning rootbus failed"); return -ENODEV; } pci_fixup_irqs(pci_common_swizzle, of_irq_parse_and_map_pci); /* * We insert PCI resources into the iomem_resource and * ioport_resource trees in either pci_bus_claim_resources() * or pci_bus_assign_resources(). */ if (pci_has_flag(PCI_PROBE_ONLY)) { pci_bus_claim_resources(bus); } else { pci_bus_size_bridges(bus); pci_bus_assign_resources(bus); list_for_each_entry(child, &bus->children, node) pcie_bus_configure_settings(child); } pci_bus_add_devices(bus); return 0; }
/** * pcibios_enable_device - Enable I/O and memory. * @dev: PCI device to be enabled * @mask: bitmask of BARs to enable */ int pcibios_enable_device(struct pci_dev *dev, int mask) { if (pci_has_flag(PCI_PROBE_ONLY)) return 0; return pci_enable_resources(dev, mask); }