static int dwc2_lowlevel_hw_init(struct dwc2_hsotg *hsotg) { int i, ret; /* Set default UTMI width */ hsotg->phyif = GUSBCFG_PHYIF16; /* * Attempt to find a generic PHY, then look for an old style * USB PHY and then fall back to pdata */ hsotg->phy = devm_phy_get(hsotg->dev, "usb2-phy"); if (IS_ERR(hsotg->phy)) { hsotg->phy = NULL; hsotg->uphy = devm_usb_get_phy(hsotg->dev, USB_PHY_TYPE_USB2); if (IS_ERR(hsotg->uphy)) hsotg->uphy = NULL; else hsotg->plat = dev_get_platdata(hsotg->dev); } if (hsotg->phy) { /* * If using the generic PHY framework, check if the PHY bus * width is 8-bit and set the phyif appropriately. */ if (phy_get_bus_width(hsotg->phy) == 8) hsotg->phyif = GUSBCFG_PHYIF8; } if (!hsotg->phy && !hsotg->uphy && !hsotg->plat) { dev_err(hsotg->dev, "no platform data or transceiver defined\n"); return -EPROBE_DEFER; } /* Clock */ hsotg->clk = devm_clk_get(hsotg->dev, "otg"); if (IS_ERR(hsotg->clk)) { hsotg->clk = NULL; dev_dbg(hsotg->dev, "cannot get otg clock\n"); } /* Regulators */ for (i = 0; i < ARRAY_SIZE(hsotg->supplies); i++) hsotg->supplies[i].supply = dwc2_hsotg_supply_names[i]; ret = devm_regulator_bulk_get(hsotg->dev, ARRAY_SIZE(hsotg->supplies), hsotg->supplies); if (ret) { dev_err(hsotg->dev, "failed to request supplies: %d\n", ret); return ret; } return 0; }
static int dwc2_lowlevel_hw_init(struct dwc2_hsotg *hsotg) { int i, ret; hsotg->reset = devm_reset_control_get_optional(hsotg->dev, "dwc2"); if (IS_ERR(hsotg->reset)) { ret = PTR_ERR(hsotg->reset); dev_err(hsotg->dev, "error getting reset control %d\n", ret); return ret; } reset_control_deassert(hsotg->reset); /* Set default UTMI width */ hsotg->phyif = GUSBCFG_PHYIF16; /* * Attempt to find a generic PHY, then look for an old style * USB PHY and then fall back to pdata */ hsotg->phy = devm_phy_get(hsotg->dev, "usb2-phy"); if (IS_ERR(hsotg->phy)) { ret = PTR_ERR(hsotg->phy); switch (ret) { case -ENODEV: case -ENOSYS: hsotg->phy = NULL; break; case -EPROBE_DEFER: return ret; default: dev_err(hsotg->dev, "error getting phy %d\n", ret); return ret; } } if (!hsotg->phy) { hsotg->uphy = devm_usb_get_phy(hsotg->dev, USB_PHY_TYPE_USB2); if (IS_ERR(hsotg->uphy)) { ret = PTR_ERR(hsotg->uphy); switch (ret) { case -ENODEV: case -ENXIO: hsotg->uphy = NULL; break; case -EPROBE_DEFER: return ret; default: dev_err(hsotg->dev, "error getting usb phy %d\n", ret); return ret; } } } hsotg->plat = dev_get_platdata(hsotg->dev); if (hsotg->phy) { /* * If using the generic PHY framework, check if the PHY bus * width is 8-bit and set the phyif appropriately. */ if (phy_get_bus_width(hsotg->phy) == 8) hsotg->phyif = GUSBCFG_PHYIF8; } /* Clock */ hsotg->clk = devm_clk_get(hsotg->dev, "otg"); if (IS_ERR(hsotg->clk)) { hsotg->clk = NULL; dev_dbg(hsotg->dev, "cannot get otg clock\n"); } /* Regulators */ for (i = 0; i < ARRAY_SIZE(hsotg->supplies); i++) hsotg->supplies[i].supply = dwc2_hsotg_supply_names[i]; ret = devm_regulator_bulk_get(hsotg->dev, ARRAY_SIZE(hsotg->supplies), hsotg->supplies); if (ret) { dev_err(hsotg->dev, "failed to request supplies: %d\n", ret); return ret; } return 0; }