static void reconfigure_console(uint32_t ul_mck, uint32_t ul_baudrate)
{
sam_usart_opt_t uart_serial_options;
uart_serial_options.baudrate = ul_baudrate,
uart_serial_options.char_length = CONF_UART_CHAR_LENGTH,
uart_serial_options.parity_type = US_MR_PAR_NO;
uart_serial_options.stop_bits = CONF_UART_STOP_BITS,
uart_serial_options.channel_mode= US_MR_CHMODE_NORMAL,
uart_serial_options.irda_filter = 0,
/* Configure PMC */
flexcom_enable(CONF_FLEXCOM);
flexcom_set_opmode(CONF_FLEXCOM, FLEXCOM_USART);
/* Configure PIO */
pio_configure_pin_group(CONF_UART_PIO, CONF_PINS_UART,
CONF_PINS_UART_FLAGS);
/* Configure UART */
usart_init_rs232(CONF_UART, &uart_serial_options, ul_mck);
/* Enable the receiver and transmitter. */
usart_enable_tx(CONF_UART);
usart_enable_rx(CONF_UART);
}
/**
* \brief Configure UART console.
*/
static void configure_console(void)
{
const usart_serial_options_t uart_serial_options = {
.baudrate = CONF_UART_BAUDRATE,
.paritytype = CONF_UART_PARITY
};
/* Configure UART console. */
sysclk_enable_peripheral_clock(CONSOLE_UART_ID);
pio_configure_pin_group(CONF_UART_PIO, CONF_PINS_UART,
CONF_PINS_UART_FLAGS);
stdio_serial_init(CONF_UART, &uart_serial_options);
}
/**
* Reconfigure UART console for changed MCK and baudrate.
*/
static void reconfigure_console(uint32_t ul_mck, uint32_t ul_baudrate)
{
const sam_uart_opt_t uart_console_settings =
{ ul_mck, ul_baudrate, UART_MR_PAR_NO };
/* Configure PMC */
pmc_enable_periph_clk(CONSOLE_UART_ID);
/* Configure PIO */
pio_configure_pin_group(CONF_UART_PIO, CONF_PINS_UART,
CONF_PINS_UART_FLAGS);
/* Configure UART */
uart_init(CONF_UART, &uart_console_settings);
}
/**
* Configure UART console.
*/
static void configure_console(void)
{
const usart_serial_options_t uart_serial_options = {
.baudrate = CONF_UART_BAUDRATE,
#ifdef CONF_UART_CHAR_LENGTH
.charlength = CONF_UART_CHAR_LENGTH,
#endif
.paritytype = CONF_UART_PARITY,
#ifdef CONF_UART_STOP_BITS
.stopbits = CONF_UART_STOP_BITS,
#endif
};
/* Configure console UART. */
sysclk_enable_peripheral_clock(CONSOLE_UART_ID);
pio_configure_pin_group(CONF_UART_PIO, CONF_PINS_UART,
CONF_PINS_UART_FLAGS);
stdio_serial_init(CONF_UART, &uart_serial_options);
}
/**
* \brief pio_capture Application entry point.
*
* \return Unused (ANSI-C compatibility).
*
*/
int main(void)
{
uint8_t uc_i;
uint32_t ul_length;
uint32_t ul_mode;
uint8_t uc_key;
static uint8_t uc_rx_even_only;
static uint8_t uc_tx_without_en;
/* Initialize the SAM system. */
sysclk_init();
board_init();
/* Configure UART for debug message output. */
configure_console();
/* Configure PIOA clock. */
pmc_enable_periph_clk(ID_PIOA);
pmc_enable_periph_clk(ID_PIOC);
/* Configure PIO Capture handler */
pio_capture_handler_set(capture_handler);
/* Output example information. */
puts(STRING_HEADER);
printf("Frequency: %d MHz.\r\n",
(uint8_t) (sysclk_get_cpu_hz() / 1000000));
printf("Press r to Receive data on PIO Parallel Capture.\r\n");
printf("Press s to Send data on PIO Parallel Capture.\r\n");
uc_key = 0;
while ((uc_key != 'r') && (uc_key != 's')) {
uart_read(CONSOLE_UART, &uc_key);
}
if (uc_key == 'r') {
printf("** RECEIVE mode **\r\n");
/* Initialize PIO capture mode value. */
ul_mode = 0;
/* Set up the parallel capture mode data size as 8 bits. */
ul_mode |= 0 << PIO_PCMR_DSIZE_Pos;
printf("Press y to sample the data when both data enable pins are enabled.\r\n");
printf("Press n to sample the data, don't care the status of the data enable pins.\r\n");
uc_key = 0;
while ((uc_key != 'y') && (uc_key != 'n')) {
uart_read(CONSOLE_UART, &uc_key);
}
if (uc_key == 'y') {
/* Sample the data when both data enable pins are enabled. */
ul_mode &= ~PIO_PCMR_ALWYS;
printf("Receive data when both data enable pins are enabled.\r\n");
} else {
/* Sample the data, don't care the status of the data enable pins. */
ul_mode |= PIO_PCMR_ALWYS;
printf("Receive data, don't care the status of the data enable pins.\r\n");
}
printf("Press y to sample all the data\r\n");
printf("Press n to sample the data only one out of two.\r\n");
uc_key = 0;
while ((uc_key != 'y') && (uc_key != 'n')) {
uart_read(CONSOLE_UART, &uc_key);
}
if (uc_key == 'y') {
/* Sample all the data. */
ul_mode &= ~PIO_PCMR_HALFS;
printf("All data are sampled.\r\n");
} else {
/* Sample the data only one out of two. */
ul_mode |= PIO_PCMR_HALFS;
/* Only if half-Sampling is set, data with an even index are sampled. */
ul_mode &= ~PIO_PCMR_FRSTS;
printf("Only one out of two data is sampled, with an even index.\r\n");
}
/* Initialize PIO Parallel Capture function. */
pio_capture_set_mode(PIOA, ul_mode);
pio_capture_enable(PIOA);
/* Disable all PIOA I/O line interrupt. */
pio_disable_interrupt(PIOA, 0xFFFFFFFF);
/* Configure and enable interrupt of PIO. */
NVIC_DisableIRQ(PIOA_IRQn);
NVIC_ClearPendingIRQ(PIOA_IRQn);
NVIC_SetPriority(PIOA_IRQn, PIO_IRQ_PRI);
NVIC_EnableIRQ(PIOA_IRQn);
while (1) {
g_uc_cbk_received = 0;
/* Clear Receive buffer. */
for (uc_i = 0; uc_i < SIZE_BUFF_RECEPT; uc_i++) {
pio_rx_buffer[uc_i] = 0;
}
/* Set up PDC receive buffer, waiting for 64 bytes. */
packet_t.ul_addr = (uint32_t) pio_rx_buffer;
packet_t.ul_size = SIZE_BUFF_RECEPT;
p_pdc = pio_capture_get_pdc_base(PIOA);
pdc_rx_init(p_pdc, &packet_t, NULL);
/* Enable PDC transfer. */
pdc_enable_transfer(p_pdc, PERIPH_PTCR_RXTEN);
/* Configure the PIO capture interrupt mask. */
pio_capture_enable_interrupt(PIOA,
(PIO_PCIER_ENDRX | PIO_PCIER_RXBUFF));
printf("Waiting...\r\n");
while (g_uc_cbk_received == 0) {
}
}
} else if (uc_key == 's') {
printf("** SEND mode **\r\n");
printf("This is for debug purpose only !\r\n");
printf("Frequency of PIO controller clock must be strictly superior");
printf("to 2 times the frequency of the clock of the device which");
printf(" generates the parallel data.\r\n");
printf("\r\nPlease connect the second board, ");
printf("and put it in receive mode.\r\n");
/* Configure PIO pins which simulate as a sensor. */
pio_configure_pin_group(PIOA, PIO_CAPTURE_CONTROL_PIN_MSK,
PIO_CAPTURE_OUTPUT_PIN_FLAGS);
pio_configure_pin_group(PIOC, PIO_CAPTURE_DATA_PINS_MASK,
PIO_CAPTURE_OUTPUT_PIN_FLAGS);
pio_set_pin_low(PIO_CAPTURE_EN1_IDX);
pio_set_pin_low(PIO_CAPTURE_EN2_IDX);
pio_set_pin_low(PIO_CAPTURE_CCLK_IDX);
/* Enable sync. output data. */
pio_enable_output_write(PIOC, PIO_CAPTURE_DATA_PINS_MASK);
/* Initialize the capture data line. */
pio_sync_output_write(PIOC, 0);
printf("Press y to send data with data enable pins.\r\n");
printf("Press n to send data without data enable pins.\r\n");
uc_key = 0;
while ((uc_key != 'y') && (uc_key != 'n')) {
uart_read(CONSOLE_UART, &uc_key);
}
if (uc_key == 'y') {
uc_tx_without_en = 0;
printf("Send data with both data enable pins enabled.\r\n");
} else {
uc_tx_without_en = 1;
printf("Send data without enabling the data enable pins.\r\n");
}
printf("Press y to indicate that receiver samples all data.\r\n");
printf("Press n to indicate that receiver samples data with an even index.\r\n");
uc_key = 0;
while ((uc_key != 'y') && (uc_key != 'n')) {
uart_read(CONSOLE_UART, &uc_key);
}
if (uc_key == 'y') {
uc_rx_even_only = 0;
printf("Receiver samples all data.\r\n");
} else {
uc_rx_even_only = 1;
printf("Receiver samples data with an even index.\r\n");
}
ul_length = SIZE_BUFF_RECEPT * (1 + uc_rx_even_only);
while (1) {
if (uc_tx_without_en) {
printf("\r\nSend data without enabling the data enable pins.\r\n");
} else {
printf("\r\nSend data with both data enable pins enabled.\r\n");
}
if (!uc_tx_without_en) {
/* Set enable pins. */
pio_set_pin_high(PIO_CAPTURE_EN1_IDX);
pio_set_pin_high(PIO_CAPTURE_EN2_IDX);
}
for (uc_i = 0; uc_i < ul_length;) {
/* Send data. */
pio_sync_output_write(PIOC,
(uc_i << PIO_CAPTURE_DATA_POS));
/* Set clock. */
pio_set_pin_high(PIO_CAPTURE_CCLK_IDX);
delay_us(20);
/* Clear clock. */
pio_set_pin_low(PIO_CAPTURE_CCLK_IDX);
delay_us(20);
uc_i++;
}
if (!uc_tx_without_en) {
/* Clear enable pins. */
pio_set_pin_low(PIO_CAPTURE_EN1_IDX);
pio_set_pin_low(PIO_CAPTURE_EN2_IDX);
}
printf("Press a key.\r\n");
while (uart_read(CONSOLE_UART, &uc_key)) {
}
}
}
return 0;
}
/*
* Configure the SPI hardware, including SPI clock speed, mode, delays, chip select pins
* It uses values listed in
*/
void AJ_WSL_SPI_InitializeSPIController(void)
{
uint32_t config;
/* Initialize and enable DMA controller. */
pmc_enable_periph_clk(ID_DMAC);
dmac_init(DMAC);
dmac_set_priority_mode(DMAC, DMAC_PRIORITY_ROUND_ROBIN);
dmac_enable(DMAC);
/* Configure DMA TX channel. */
config = 0;
config |= DMAC_CFG_DST_PER(AJ_SPI_TX_INDEX) |
DMAC_CFG_DST_H2SEL |
DMAC_CFG_SOD | DMAC_CFG_FIFOCFG_ALAP_CFG;
dmac_channel_set_configuration(DMAC, AJ_DMA_TX_CHANNEL, config);
/* Configure DMA RX channel. */
config = 0;
config |= DMAC_CFG_SRC_PER(AJ_SPI_RX_INDEX) |
DMAC_CFG_SRC_H2SEL |
DMAC_CFG_SOD | DMAC_CFG_FIFOCFG_ALAP_CFG;
dmac_channel_set_configuration(DMAC, AJ_DMA_RX_CHANNEL, config);
/* Enable receive channel interrupt for DMAC. */
uint8_t* interruptEnableAddress = AJ_SPI_ISER1_IEN_ADDR;
*interruptEnableAddress = AJ_SPI_DMAC_IEN_BIT;
dmac_enable_interrupt(DMAC, (1 << AJ_DMA_RX_CHANNEL));
dmac_enable_interrupt(DMAC, (1 << AJ_DMA_TX_CHANNEL));
//AJ_WSL_DMA_Setup();
dmac_channel_disable(DMAC, AJ_DMA_TX_CHANNEL);
dmac_channel_disable(DMAC, AJ_DMA_RX_CHANNEL);
/*
* Configure the hardware to enable SPI and some output pins
*/
{
pmc_enable_periph_clk(ID_PIOA);
pmc_enable_periph_clk(ID_PIOB);
pmc_enable_periph_clk(ID_PIOC);
pmc_enable_periph_clk(ID_PIOD);
// make all of these pins controlled by the right I/O controller
pio_configure_pin_group(PIOA, 0xFFFFFFFF, PIO_TYPE_PIO_PERIPH_A);
pio_configure_pin_group(PIOB, 0xFFFFFFFF, PIO_TYPE_PIO_PERIPH_B);
pio_configure_pin_group(PIOC, 0xFFFFFFFF, PIO_TYPE_PIO_PERIPH_C);
pio_configure_pin_group(PIOD, 0xFFFFFFFF, PIO_TYPE_PIO_PERIPH_D);
/*
* Reset the device by toggling the CHIP_POWER
*/
ioport_set_pin_dir(AJ_WSL_SPI_CHIP_POWER_PIN, IOPORT_DIR_OUTPUT);
ioport_set_pin_level(AJ_WSL_SPI_CHIP_POWER_PIN, IOPORT_PIN_LEVEL_LOW);
AJ_Sleep(10);
ioport_set_pin_level(AJ_WSL_SPI_CHIP_POWER_PIN, IOPORT_PIN_LEVEL_HIGH);
/*
* Reset the device by toggling the CHIP_PWD# signal
*/
ioport_set_pin_dir(AJ_WSL_SPI_CHIP_PWD_PIN, IOPORT_DIR_OUTPUT);
ioport_set_pin_level(AJ_WSL_SPI_CHIP_PWD_PIN, IOPORT_PIN_LEVEL_LOW);
AJ_Sleep(10);
ioport_set_pin_level(AJ_WSL_SPI_CHIP_PWD_PIN, IOPORT_PIN_LEVEL_HIGH);
/* configure the pin that detects SPI data ready from the target chip */
ioport_set_pin_dir(AJ_WSL_SPI_CHIP_SPI_INT_PIN, IOPORT_DIR_INPUT);
ioport_set_pin_sense_mode(AJ_WSL_SPI_CHIP_SPI_INT_PIN, IOPORT_SENSE_LEVEL_LOW);
pio_handler_set(PIOC, ID_PIOC, AJ_WSL_SPI_CHIP_SPI_INT_BIT, (PIO_PULLUP | PIO_IT_FALL_EDGE), &AJ_WSL_SPI_CHIP_SPI_ISR);
pio_handler_set_priority(PIOD, (IRQn_Type) ID_PIOC, 0xB);
pio_enable_interrupt(PIOC, AJ_WSL_SPI_CHIP_SPI_INT_BIT);
}
spi_enable_clock(AJ_WSL_SPI_DEVICE);
spi_reset(AJ_WSL_SPI_DEVICE);
spi_set_lastxfer(AJ_WSL_SPI_DEVICE);
spi_set_master_mode(AJ_WSL_SPI_DEVICE);
spi_disable_mode_fault_detect(AJ_WSL_SPI_DEVICE);
spi_set_peripheral_chip_select_value(AJ_WSL_SPI_DEVICE, AJ_WSL_SPI_DEVICE_NPCS);
spi_set_clock_polarity(AJ_WSL_SPI_DEVICE, AJ_WSL_SPI_DEVICE_NPCS, AJ_WSL_SPI_CLOCK_POLARITY);
spi_set_clock_phase(AJ_WSL_SPI_DEVICE, AJ_WSL_SPI_DEVICE_NPCS, AJ_WSL_SPI_CLOCK_PHASE);
spi_set_bits_per_transfer(AJ_WSL_SPI_DEVICE, AJ_WSL_SPI_DEVICE_NPCS, SPI_CSR_BITS_8_BIT);
spi_set_baudrate_div(AJ_WSL_SPI_DEVICE, AJ_WSL_SPI_DEVICE_NPCS, (sysclk_get_cpu_hz() / AJ_WSL_SPI_CLOCK_RATE));
spi_set_transfer_delay(AJ_WSL_SPI_DEVICE, AJ_WSL_SPI_DEVICE_NPCS, AJ_WSL_SPI_DELAY_BEFORE_CLOCK, AJ_WSL_SPI_DELAY_BETWEEN_TRANSFERS);
spi_set_fixed_peripheral_select(AJ_WSL_SPI_DEVICE);
spi_configure_cs_behavior(AJ_WSL_SPI_DEVICE, AJ_WSL_SPI_DEVICE_NPCS, SPI_CS_RISE_FORCED);
spi_enable_interrupt(AJ_WSL_SPI_DEVICE, SPI_IER_TDRE | SPI_IER_RDRF);
spi_enable(AJ_WSL_SPI_DEVICE);
}
