static int pm3393_set_mtu(struct cmac *cmac, int mtu) { int enabled = cmac->instance->enabled; mtu += ETH_HLEN + ETH_FCS_LEN; /* Disable Rx/Tx MAC before configuring it. */ if (enabled) pm3393_disable(cmac, MAC_DIRECTION_RX | MAC_DIRECTION_TX); pmwrite(cmac, SUNI1x10GEXP_REG_RXXG_MAX_FRAME_LENGTH, mtu); pmwrite(cmac, SUNI1x10GEXP_REG_TXXG_MAX_FRAME_SIZE, mtu); if (enabled) pm3393_enable(cmac, enabled); return 0; }
static int pm3393_set_rx_mode(struct cmac *cmac, struct t1_rx_mode *rm) { int enabled = cmac->instance->enabled & MAC_DIRECTION_RX; u32 rx_mode; /* Disable MAC RX before reconfiguring it */ if (enabled) pm3393_disable(cmac, MAC_DIRECTION_RX); pmread(cmac, SUNI1x10GEXP_REG_RXXG_ADDRESS_FILTER_CONTROL_2, &rx_mode); rx_mode &= ~(SUNI1x10GEXP_BITMSK_RXXG_PMODE | SUNI1x10GEXP_BITMSK_RXXG_MHASH_EN); pmwrite(cmac, SUNI1x10GEXP_REG_RXXG_ADDRESS_FILTER_CONTROL_2, (u16)rx_mode); if (t1_rx_mode_promisc(rm)) { /* Promiscuous mode. */ rx_mode |= SUNI1x10GEXP_BITMSK_RXXG_PMODE; } if (t1_rx_mode_allmulti(rm)) { /* Accept all multicast. */ pmwrite(cmac, SUNI1x10GEXP_REG_RXXG_MULTICAST_HASH_LOW, 0xffff); pmwrite(cmac, SUNI1x10GEXP_REG_RXXG_MULTICAST_HASH_MIDLOW, 0xffff); pmwrite(cmac, SUNI1x10GEXP_REG_RXXG_MULTICAST_HASH_MIDHIGH, 0xffff); pmwrite(cmac, SUNI1x10GEXP_REG_RXXG_MULTICAST_HASH_HIGH, 0xffff); rx_mode |= SUNI1x10GEXP_BITMSK_RXXG_MHASH_EN; } else if (t1_rx_mode_mc_cnt(rm)) { /* Accept one or more multicast(s). */ struct netdev_hw_addr *ha; int bit; u16 mc_filter[4] = { 0, }; netdev_for_each_mc_addr(ha, t1_get_netdev(rm)) { /* bit[23:28] */ bit = (ether_crc(ETH_ALEN, ha->addr) >> 23) & 0x3f; mc_filter[bit >> 4] |= 1 << (bit & 0xf); } pmwrite(cmac, SUNI1x10GEXP_REG_RXXG_MULTICAST_HASH_LOW, mc_filter[0]); pmwrite(cmac, SUNI1x10GEXP_REG_RXXG_MULTICAST_HASH_MIDLOW, mc_filter[1]); pmwrite(cmac, SUNI1x10GEXP_REG_RXXG_MULTICAST_HASH_MIDHIGH, mc_filter[2]); pmwrite(cmac, SUNI1x10GEXP_REG_RXXG_MULTICAST_HASH_HIGH, mc_filter[3]); rx_mode |= SUNI1x10GEXP_BITMSK_RXXG_MHASH_EN; }
static int pm3393_set_mtu(struct cmac *cmac, int mtu) { int enabled = cmac->instance->enabled; mtu += 14 + 4; if (mtu > MAX_FRAME_SIZE) return -EINVAL; if (enabled) pm3393_disable(cmac, MAC_DIRECTION_RX | MAC_DIRECTION_TX); pmwrite(cmac, SUNI1x10GEXP_REG_RXXG_MAX_FRAME_LENGTH, mtu); pmwrite(cmac, SUNI1x10GEXP_REG_TXXG_MAX_FRAME_SIZE, mtu); if (enabled) pm3393_enable(cmac, enabled); return 0; }
static int pm3393_set_mtu(struct cmac *cmac, int mtu) { int enabled = cmac->instance->enabled; /* MAX_FRAME_SIZE includes header + FCS, mtu doesn't */ mtu += 14 + 4; if (mtu > MAX_FRAME_SIZE) return -EINVAL; /* Disable Rx/Tx MAC before configuring it. */ if (enabled) pm3393_disable(cmac, MAC_DIRECTION_RX | MAC_DIRECTION_TX); pmwrite(cmac, SUNI1x10GEXP_REG_RXXG_MAX_FRAME_LENGTH, mtu); pmwrite(cmac, SUNI1x10GEXP_REG_TXXG_MAX_FRAME_SIZE, mtu); if (enabled) pm3393_enable(cmac, enabled); return 0; }