static int axp_gpio_get_value(struct udevice *dev, unsigned pin)
{
u8 reg, val, mask;
int ret;
switch (pin) {
#ifndef CONFIG_AXP152_POWER /* NA on axp152 */
case SUNXI_GPIO_AXP0_VBUS_DETECT:
ret = pmic_bus_read(AXP_POWER_STATUS, &val);
mask = AXP_POWER_STATUS_VBUS_PRESENT;
break;
#endif
#ifdef CONFIG_AXP221_POWER /* Only available on axp221/axp223 */
case SUNXI_GPIO_AXP0_VBUS_ENABLE:
ret = pmic_bus_read(AXP221_VBUS_IPSOUT, &val);
mask = AXP221_VBUS_IPSOUT_DRIVEBUS;
break;
#endif
default:
reg = axp_get_gpio_ctrl_reg(pin);
if (reg == 0)
return -EINVAL;
ret = pmic_bus_read(AXP_GPIO_STATE, &val);
mask = 1 << (pin + AXP_GPIO_STATE_OFFSET);
}
if (ret)
return ret;
return (val & mask) ? 1 : 0;
}
int axp_set_dcdc2(unsigned int mvolt)
{
int rc;
u8 cfg, current;
if (mvolt == 0)
return pmic_bus_clrbits(AXP209_OUTPUT_CTRL,
AXP209_OUTPUT_CTRL_DCDC2);
rc = pmic_bus_setbits(AXP209_OUTPUT_CTRL, AXP209_OUTPUT_CTRL_DCDC2);
if (rc)
return rc;
cfg = axp209_mvolt_to_cfg(mvolt, 700, 2275, 25);
/* Do we really need to be this gentle? It has built-in voltage slope */
while ((rc = pmic_bus_read(AXP209_DCDC2_VOLTAGE, ¤t)) == 0 &&
current != cfg) {
if (current < cfg)
current++;
else
current--;
rc = pmic_bus_write(AXP209_DCDC2_VOLTAGE, current);
if (rc)
break;
}
return rc;
}
int axp_set_aldo4(unsigned int mvolt)
{
int rc;
static const unsigned int vindex[] = {
1250, 1300, 1400, 1500, 1600, 1700, 1800, 1900, 2000, 2500,
2700, 2800, 3000, 3100, 3200, 3300
};
u8 cfg, reg;
if (mvolt == 0)
return pmic_bus_clrbits(AXP209_OUTPUT_CTRL,
AXP209_OUTPUT_CTRL_LDO4);
/* Translate mvolt to register cfg value, requested <= selected */
for (cfg = 15; vindex[cfg] > mvolt && cfg > 0; cfg--);
rc = pmic_bus_read(AXP209_LDO24_VOLTAGE, ®);
if (rc)
return rc;
/* LDO4 configuration is in lower 4 bits */
reg = (reg & 0xf0) | (cfg << 0);
rc = pmic_bus_write(AXP209_LDO24_VOLTAGE, reg);
if (rc)
return rc;
return pmic_bus_setbits(AXP209_OUTPUT_CTRL, AXP209_OUTPUT_CTRL_LDO4);
}
int axp_get_sid(unsigned int *sid)
{
u8 *dest = (u8 *)sid;
int i, ret;
ret = pmic_bus_init();
if (ret)
return ret;
ret = pmic_bus_write(AXP221_PAGE, 1);
if (ret)
return ret;
for (i = 0; i < 16; i++) {
ret = pmic_bus_read(AXP221_SID + i, &dest[i]);
if (ret)
return ret;
}
pmic_bus_write(AXP221_PAGE, 0);
for (i = 0; i < 4; i++)
sid[i] = be32_to_cpu(sid[i]);
return 0;
}
int axp_init(void)
{
u8 axp_chip_id;
int ret;
ret = pmic_bus_init();
if (ret)
return ret;
ret = pmic_bus_read(AXP221_CHIP_ID, &axp_chip_id);
if (ret)
return ret;
if (!(axp_chip_id == 0x6 || axp_chip_id == 0x7 || axp_chip_id == 0x17))
return -ENODEV;
/*
* Turn off LDOIO regulators / tri-state GPIO pins, when rebooting
* from android these are sometimes on.
*/
ret = pmic_bus_write(AXP_GPIO0_CTRL, AXP_GPIO_CTRL_INPUT);
if (ret)
return ret;
ret = pmic_bus_write(AXP_GPIO1_CTRL, AXP_GPIO_CTRL_INPUT);
if (ret)
return ret;
return 0;
}
int pmic_bus_setbits(u8 reg, u8 bits)
{
int ret;
u8 val;
ret = pmic_bus_read(reg, &val);
if (ret)
return ret;
val |= bits;
return pmic_bus_write(reg, val);
}
static int axp221_clrbits(u8 reg, u8 bits)
{
int ret;
u8 val;
ret = pmic_bus_read(reg, &val);
if (ret)
return ret;
val &= ~bits;
return pmic_bus_write(reg, val);
}
int axp_init(void)
{
u8 axp_chip_id;
int ret;
ret = pmic_bus_init();
if (ret)
return ret;
ret = pmic_bus_read(AXP221_CHIP_ID, &axp_chip_id);
if (ret)
return ret;
if (!(axp_chip_id == 0x6 || axp_chip_id == 0x7 || axp_chip_id == 0x17))
return -ENODEV;
return 0;
}
int axp_init(void)
{
u8 ver;
int i, rc;
rc = pmic_bus_init();
if (rc)
return rc;
rc = pmic_bus_read(AXP209_CHIP_VERSION, &ver);
if (rc)
return rc;
/* Low 4 bits is chip version */
ver &= 0x0f;
if (ver != 0x1)
return -EINVAL;
/* Mask all interrupts */
for (i = AXP209_IRQ_ENABLE1; i <= AXP209_IRQ_ENABLE5; i++) {
rc = pmic_bus_write(i, 0);
if (rc)
return rc;
}
/*
* Turn off LDOIO regulators / tri-state GPIO pins, when rebooting
* from android these are sometimes on.
*/
rc = pmic_bus_write(AXP_GPIO0_CTRL, AXP_GPIO_CTRL_INPUT);
if (rc)
return rc;
rc = pmic_bus_write(AXP_GPIO1_CTRL, AXP_GPIO_CTRL_INPUT);
if (rc)
return rc;
rc = pmic_bus_write(AXP_GPIO2_CTRL, AXP_GPIO_CTRL_INPUT);
if (rc)
return rc;
return 0;
}
int axp_init(void)
{
u8 axp_chip_id;
int ret;
ret = pmic_bus_init();
if (ret)
return ret;
ret = pmic_bus_read(AXP818_CHIP_ID, &axp_chip_id);
if (ret)
return ret;
if (!(axp_chip_id == 0x51))
return -ENODEV;
else
return ret;
return 0;
}
int axp_set_aldo2(unsigned int mvolt)
{
int rc;
u8 cfg, reg;
if (mvolt == 0)
return pmic_bus_clrbits(AXP209_OUTPUT_CTRL,
AXP209_OUTPUT_CTRL_LDO2);
cfg = axp209_mvolt_to_cfg(mvolt, 1800, 3300, 100);
rc = pmic_bus_read(AXP209_LDO24_VOLTAGE, ®);
if (rc)
return rc;
/* LDO2 configuration is in upper 4 bits */
reg = (reg & 0x0f) | (cfg << 4);
rc = pmic_bus_write(AXP209_LDO24_VOLTAGE, reg);
if (rc)
return rc;
return pmic_bus_setbits(AXP209_OUTPUT_CTRL, AXP209_OUTPUT_CTRL_LDO2);
}
int axp221_init(void)
{
/* This cannot be 0 because it is used in SPL before BSS is ready */
static int needs_init = 1;
u8 axp_chip_id;
int ret;
if (!needs_init)
return 0;
ret = pmic_bus_init();
if (ret)
return ret;
ret = pmic_bus_read(AXP221_CHIP_ID, &axp_chip_id);
if (ret)
return ret;
if (!(axp_chip_id == 0x6 || axp_chip_id == 0x7 || axp_chip_id == 0x17))
return -ENODEV;
needs_init = 0;
return 0;
}
