/*
* main.c
*/
void main(void)
{
struct pru_rpmsg_transport transport;
uint16_t src, dst, len;
volatile uint8_t *status;
/* Allow OCP master port access by the PRU so the PRU can read external memories */
CT_CFG.SYSCFG_bit.STANDBY_INIT = 0;
/* Clear the status of the PRU-ICSS system event that the ARM will use to 'kick' us */
CT_INTC.SICR_bit.STS_CLR_IDX = FROM_ARM_HOST;
/* Make sure the Linux drivers are ready for RPMsg communication */
status = &resourceTable.rpmsg_vdev.status;
while (!(*status & VIRTIO_CONFIG_S_DRIVER_OK));
/* Initialize the RPMsg transport structure */
pru_rpmsg_init(&transport, &resourceTable.rpmsg_vring0, &resourceTable.rpmsg_vring1, TO_ARM_HOST, FROM_ARM_HOST);
/* Create the RPMsg channel between the PRU and ARM user space using the transport structure. */
while (pru_rpmsg_channel(RPMSG_NS_CREATE, &transport, CHAN_NAME, CHAN_DESC, CHAN_PORT) != PRU_RPMSG_SUCCESS);
while (1) {
/* Check bit 30 of register R31 to see if the ARM has kicked us */
if (__R31 & HOST_INT) {
/* Clear the event status */
CT_INTC.SICR_bit.STS_CLR_IDX = FROM_ARM_HOST;
/* Receive all available messages, multiple messages can be sent per kick */
while (pru_rpmsg_receive(&transport, &src, &dst, payload, &len) == PRU_RPMSG_SUCCESS) {
/* Echo the message back to the same address from which we just received */
pru_rpmsg_send(&transport, dst, src, payload, len);
}
}
}
}
int main(void)
{
struct pru_rpmsg_transport transport;
volatile uint8_t *status;
/* allow OCP master port access by the PRU so the PRU
* can read external memories */
CT_CFG.SYSCFG_bit.STANDBY_INIT = 0;
/* clear the status of the PRU-ICSS system event that the ARM will use to 'kick' us */
CT_INTC.SICR_bit.STS_CLR_IDX = FROM_ARM_HOST;
/* Make sure the Linux drivers are ready for RPMsg communication */
status = &resourceTable.rpmsg_vdev.status;
while (!(*status & VIRTIO_CONFIG_S_DRIVER_OK))
;
/* Initialize the RPMsg transport structure */
pru_rpmsg_init(&transport,
&resourceTable.rpmsg_vring0,
&resourceTable.rpmsg_vring1,
TO_ARM_HOST,
FROM_ARM_HOST);
/* Create the RPMsg channel between the PRU and ARM user space using the transport structure. */
while (pru_rpmsg_channel(RPMSG_NS_CREATE, &transport, CHAN_NAME, CHAN_DESC, CHAN_PORT) != PRU_RPMSG_SUCCESS)
;
hc_sr04_init();
while (1) {
/* Check bit 31 of register R31 to see
* if the mailbox interrupt has occurred */
if (read_r31() & HOST_INT) {
handle_mailbox_interrupt(&transport);
}
}
return 0;
}
/*
* main.c
*/
void main(void)
{
/* Control messaging types */
struct pru_rpmsg_transport transport;
uint16_t src, dst, len;
volatile uint8_t *status;
char rstatus;
/* Allow OCP master port access by the PRU so the PRU can read external memories */
CT_CFG.SYSCFG_bit.STANDBY_INIT = 0;
/* Clear the status of the PRU-ICSS system event that the ARM will use to 'kick' us */
CT_INTC.SICR_bit.STS_CLR_IDX = FROM_ARM_HOST;
/* Make sure the Linux drivers are ready for RPMsg communication */
status = &resourceTable.rpmsg_vdev.status;
while (!(*status & VIRTIO_CONFIG_S_DRIVER_OK));
/* Initialize the RPMsg transport structure */
pru_rpmsg_init(&transport, &resourceTable.rpmsg_vring0, &resourceTable.rpmsg_vring1, TO_ARM_HOST, FROM_ARM_HOST);
/* Create the RPMsg channel between the PRU and ARM user space using the transport structure. */
while (pru_rpmsg_channel(RPMSG_NS_CREATE, &transport, CHAN_NAME, CHAN_DESC, CHAN_PORT) != PRU_RPMSG_SUCCESS);
/* Initilaize the shift register output subsystem */
itercounter=0;
reg.ser0 = 0;
reg.ser1 = 4;
reg.ser2 = 5;
reg.serclk = 1;
reg.latch = 2;
reg.clear = 3;
reg.nbits = 8;
memset(ser0_buf,0x00,MAX_BITS);
memset(ser1_buf,0x00,MAX_BITS);
memset(ser2_buf,0x00,MAX_BITS);
shiftreg_clear(®);
while (1) {
/* shift register output */
shiftreg_iterate(®, ser0_buf, ser1_buf, ser2_buf, itercounter);
itercounter++;
if(itercounter > 127){
itercounter=1;
}
/* Control message handling */
/* Check bit 30 of register R31 to see if the ARM has kicked us */
if (__R31 & HOST_INT) {
/* Clear the event status */
CT_INTC.SICR_bit.STS_CLR_IDX = FROM_ARM_HOST;
/* Receive all available messages, multiple messages can be sent per kick */
while (pru_rpmsg_receive(&transport, &src, &dst, payload, &len) == PRU_RPMSG_SUCCESS) {
/* handle incoming control messages */
rstatus = 0;
if(len != 3){
continue;
}
/* Switch based on opcode and return the opcode if successful, 0x00 if not */
switch(payload[0]){
case SET_PWM0:
if(payload[1] < MAX_BITS){
ser0_buf[payload[1]] = payload[2];
rstatus = SET_PWM0;
}
break;
case SET_PWM1:
if(payload[1] < MAX_BITS){
ser1_buf[payload[1]] = payload[2];
rstatus = SET_PWM1;
}
break;
case SET_PWM2:
if(payload[1] < MAX_BITS){
ser2_buf[payload[1]] = payload[2];
rstatus = SET_PWM2;
}
break;
case SET_NBITS:
if(*((uint16_t *)(payload+1)) <= MAX_BITS){
reg.nbits = *((uint16_t *)(payload+1));
rstatus = SET_NBITS;
}
break;
case SET_PWM_ALL:
memset(ser0_buf,payload[2],MAX_BITS);
memset(ser1_buf,payload[2],MAX_BITS);
memset(ser2_buf,payload[2],MAX_BITS);
break;
}
/* Currently unnecessary
* pru_rpmsg_send(&transport, dst, src, &rstatus, 1); */
}
}
}
}
