/******************************************************************************* * PSCI top level handler for servicing SMCs. ******************************************************************************/ uint64_t psci_smc_handler(uint32_t smc_fid, uint64_t x1, uint64_t x2, uint64_t x3, uint64_t x4, void *cookie, void *handle, uint64_t flags) { uint64_t rc; switch (smc_fid) { case PSCI_VERSION: rc = psci_version(); break; case PSCI_CPU_OFF: rc = __psci_cpu_off(); break; case PSCI_CPU_SUSPEND_AARCH64: case PSCI_CPU_SUSPEND_AARCH32: rc = __psci_cpu_suspend(x1, x2, x3); break; case PSCI_CPU_ON_AARCH64: case PSCI_CPU_ON_AARCH32: rc = psci_cpu_on(x1, x2, x3); break; case PSCI_AFFINITY_INFO_AARCH32: case PSCI_AFFINITY_INFO_AARCH64: rc = psci_affinity_info(x1, x2); break; case PSCI_MIG_AARCH32: case PSCI_MIG_AARCH64: rc = psci_migrate(x1); break; case PSCI_MIG_INFO_TYPE: rc = psci_migrate_info_type(); break; case PSCI_MIG_INFO_UP_CPU_AARCH32: case PSCI_MIG_INFO_UP_CPU_AARCH64: rc = psci_migrate_info_up_cpu(); break; default: rc = SMC_UNK; WARN("Unimplemented PSCI Call: 0x%x \n", smc_fid); } SMC_RET1(handle, rc); }
/* * Boot secondary processors */ errval_t platform_boot_core(hwid_t target, genpaddr_t gen_entry, genpaddr_t context) { printf("Invoking PSCI on: cpu=0x%lx, entry=0x%lx, context=0x%lx\n", target, gen_entry, context); struct armv8_core_data *cd = (struct armv8_core_data *)local_phys_to_mem(context); cd->page_table_root = armv8_TTBR1_EL1_rd(NULL); cd->cpu_driver_globals_pointer = (uintptr_t)global; __asm volatile("dsb sy\n" "dmb sy\n" "isb \n"); return psci_cpu_on(target, gen_entry, context); }
static boolean_t virt_start_ap(u_int id, phandle_t node, u_int addr_cells, pcell_t *reg) { int err; if (running_cpus >= mp_ncpus) return (false); running_cpus++; err = psci_cpu_on(*reg, pmap_kextract((vm_offset_t)mpentry), id); if (err != PSCI_RETVAL_SUCCESS) return (false); return (true); }