/**
* qla2x00_mbx_completion() - Process mailbox command completions.
* @ha: SCSI driver HA context
* @mb0: Mailbox0 register
*/
static void
qla2x00_mbx_completion(scsi_qla_host_t *ha, uint16_t mb0)
{
uint16_t cnt;
uint16_t *wptr;
device_reg_t *reg = ha->iobase;
/* Load return mailbox registers. */
ha->flags.mbox_int = TRUE;
ha->mailbox_out[0] = mb0;
wptr = (uint16_t *)MAILBOX_REG(ha, reg, 1);
for (cnt = 1; cnt < ha->mbx_count; cnt++) {
if (IS_QLA2200(ha) && cnt == 8)
wptr = (uint16_t *)MAILBOX_REG(ha, reg, 8);
if (cnt == 4 || cnt == 5)
ha->mailbox_out[cnt] = qla2x00_debounce_register(wptr);
else
ha->mailbox_out[cnt] = RD_REG_WORD(wptr);
wptr++;
}
if (ha->mcp) {
DEBUG3(printk("%s(%ld): Got mailbox completion. cmd=%x.\n",
__func__, ha->host_no, ha->mcp->mb[0]));
} else {
DEBUG2_3(printk("%s(%ld): MBX pointer ERROR!\n",
__func__, ha->host_no));
}
}
/**
* qla2x00_req_pkt() - Retrieve a request packet from the request ring.
* @ha: HA context
*
* Note: The caller must hold the hardware lock before calling this routine.
*
* Returns NULL if function failed, else, a pointer to the request packet.
*/
request_t *
qla2x00_req_pkt(scsi_qla_host_t *ha)
{
device_reg_t *reg = ha->iobase;
request_t *pkt = NULL;
uint16_t cnt;
uint32_t *dword_ptr;
uint32_t timer;
uint16_t req_cnt = 1;
/* Wait 1 second for slot. */
for (timer = HZ; timer; timer--) {
if ((req_cnt + 2) >= ha->req_q_cnt) {
/* Calculate number of free request entries. */
cnt = qla2x00_debounce_register(ISP_REQ_Q_OUT(ha, reg));
if (ha->req_ring_index < cnt)
ha->req_q_cnt = cnt - ha->req_ring_index;
else
ha->req_q_cnt = ha->request_q_length -
(ha->req_ring_index - cnt);
}
/* If room for request in request ring. */
if ((req_cnt + 2) < ha->req_q_cnt) {
ha->req_q_cnt--;
pkt = ha->request_ring_ptr;
/* Zero out packet. */
dword_ptr = (uint32_t *)pkt;
for (cnt = 0; cnt < REQUEST_ENTRY_SIZE / 4; cnt++)
*dword_ptr++ = 0;
/* Set system defined field. */
pkt->sys_define = (uint8_t)ha->req_ring_index;
/* Set entry count. */
pkt->entry_count = 1;
break;
}
/* Release ring specific lock */
spin_unlock(&ha->hardware_lock);
udelay(2); /* 2 us */
/* Check for pending interrupts. */
/* During init we issue marker directly */
if (!ha->marker_needed)
qla2x00_poll(ha);
spin_lock_irq(&ha->hardware_lock);
}
if (!pkt) {
DEBUG2_3(printk("%s(): **** FAILED ****\n", __func__));
}
return (pkt);
}
/**
* qla2x00_read_flash_byte() - Reads a byte from flash
* @ha: HA context
* @addr: Address in flash to read
*
* A word is read from the chip, but, only the lower byte is valid.
*
* Returns the byte read from flash @addr.
*/
uint8_t
qla2x00_read_flash_byte(scsi_qla_host_t *ha, uint32_t addr)
{
uint16_t data;
uint16_t bank_select;
device_reg_t *reg = ha->iobase;
/* Setup bit 16 of flash address. */
bank_select = RD_REG_WORD(®->ctrl_status);
if ((addr & BIT_16) && ((bank_select & CSR_FLASH_64K_BANK) == 0)) {
bank_select |= CSR_FLASH_64K_BANK;
WRT_REG_WORD(®->ctrl_status, bank_select);
RD_REG_WORD(®->ctrl_status); /* PCI Posting. */
} else if (((addr & BIT_16) == 0) &&
(bank_select & CSR_FLASH_64K_BANK)) {
bank_select &= ~(CSR_FLASH_64K_BANK);
WRT_REG_WORD(®->ctrl_status, bank_select);
RD_REG_WORD(®->ctrl_status); /* PCI Posting. */
}
/* The ISP2312 v2 chip cannot access the FLASH registers via MMIO. */
if (IS_QLA2312(ha) && ha->product_id[3] == 0x2 && ha->pio_address) {
uint16_t data2;
reg = (device_reg_t *)ha->pio_address;
outw((uint16_t)addr, (unsigned long)(®->flash_address));
do {
data = inw((unsigned long)(®->flash_data));
barrier();
cpu_relax();
data2 = inw((unsigned long)(®->flash_data));
} while (data != data2);
} else {
WRT_REG_WORD(®->flash_address, (uint16_t)addr);
data = qla2x00_debounce_register(®->flash_data);
}
return ((uint8_t)data);
}
/**
* qla2x00_ms_req_pkt() - Retrieve a Management Server request packet from
* the request ring.
* @ha: HA context
* @sp: pointer to handle post function call
*
* Note: The caller must hold the hardware lock before calling this routine.
*
* Returns NULL if function failed, else, a pointer to the request packet.
*/
request_t *
qla2x00_ms_req_pkt(scsi_qla_host_t *ha, srb_t *sp)
{
device_reg_t *reg = ha->iobase;
request_t *pkt = NULL;
uint16_t cnt, i, index;
uint32_t *dword_ptr;
uint32_t timer;
uint8_t found = 0;
uint16_t req_cnt = 1;
/* Wait 1 second for slot. */
for (timer = HZ; timer; timer--) {
if ((req_cnt + 2) >= ha->req_q_cnt) {
/* Calculate number of free request entries. */
cnt = qla2x00_debounce_register(ISP_REQ_Q_OUT(ha, reg));
if (ha->req_ring_index < cnt) {
ha->req_q_cnt = cnt - ha->req_ring_index;
} else {
ha->req_q_cnt = ha->request_q_length -
(ha->req_ring_index - cnt);
}
}
/* Check for room in outstanding command list. */
cnt = ha->current_outstanding_cmd;
for (index = 1; index < MAX_OUTSTANDING_COMMANDS; index++) {
cnt++;
if (cnt == MAX_OUTSTANDING_COMMANDS)
cnt = 1;
if (ha->outstanding_cmds[cnt] == 0) {
found = 1;
ha->current_outstanding_cmd = cnt;
break;
}
}
/* If room for request in request ring. */
if (found && (req_cnt + 2) < ha->req_q_cnt) {
pkt = ha->request_ring_ptr;
/* Zero out packet. */
dword_ptr = (uint32_t *)pkt;
for (i = 0; i < REQUEST_ENTRY_SIZE / 4; i++ )
*dword_ptr++ = 0;
DEBUG5(printk("%s(): putting sp=%p in "
"outstanding_cmds[%x]\n",
__func__,
sp, cnt));
ha->outstanding_cmds[cnt] = sp;
/* save the handle */
sp->cmd->host_scribble = (unsigned char *) (u_long) cnt;
CMD_SP(sp->cmd) = (void *)sp;
ha->req_q_cnt--;
pkt->handle = (uint32_t)cnt;
/* Set system defined field. */
pkt->sys_define = (uint8_t)ha->req_ring_index;
pkt->entry_status = 0;
break;
}
/* Release ring specific lock */
spin_unlock(&ha->hardware_lock);
udelay(20);
/* Check for pending interrupts. */
qla2x00_poll(ha);
spin_lock_irq(&ha->hardware_lock);
}
if (!pkt) {
DEBUG2_3(printk("%s(): **** FAILED ****\n", __func__));
}
return (pkt);
}