static int endeavor_s5k6a1gx03_power_off(void)
{
pr_info("[CAM] s5k6a1g power off ++\n");
/* CAM SEL */
gpio_direction_output(CAM_SEL, 0);
ENR_msleep(1);
/* vcm */
regulator_disable(cam_vcm_2v85_en);
ENR_msleep(1);
rawchip_spi_clock_control(0);
/* analog */
regulator_disable(cam_a2v85_en);
ENR_msleep(5);
/* RSTN */
gpio_direction_output(FRONT_CAM_RST, 0);
/* digital */
regulator_disable(cam2_d1v2_en);
ENR_msleep(1);
/* IO */
regulator_disable(cam_vddio_1v8_en);
ENR_msleep(10);
tegra_gpio_enable(CAM_I2C_SCL);
tegra_gpio_enable(CAM_I2C_SDA);
tegra_gpio_enable(CAM_MCLK);
return 0;
}
static int endeavor_s5k3h2y_power_off(void)
{
if (!endeavor_s5k3h2y_power_state) {
pr_info("[CAM] %s already power off, return 0", __func__);
return 0;
}
endeavor_s5k3h2y_power_state = 0;
/* VCM PD*/
gpio_direction_output(CAM1_VCM_PD, 0);
ENR_msleep(1);
/* XSHUTDOWN */
gpio_direction_output(CAM1_PWDN, 0);
ENR_msleep(1);
/* RAW RSTN*/
gpio_direction_output(RAW_RSTN, 0);
ENR_msleep(3);
/* VCM */
regulator_disable(cam_vcm_2v85_en);
ENR_msleep(1);
/*RAW_1V2_EN */
if (htc_get_pcbid_info() < PROJECT_PHASE_XE) {
gpio_direction_output(RAW_1V2_EN, 0);
ENR_msleep(5);
}
/* digital */
regulator_disable(cam_d1v2_en);
ENR_msleep(1);
/* RAW_1V8_EN */
gpio_direction_output(RAW_1V8_EN, 0);
rawchip_spi_clock_control(0);
ENR_msleep(1);
/* analog */
regulator_disable(cam_a2v85_en);
ENR_msleep(5);
/* IO */
regulator_disable(cam_vddio_1v8_en);
ENR_msleep(10);
/* set gpio output low : O(L) */
tegra_gpio_enable(MCAM_SPI_CLK);
tegra_gpio_enable(MCAM_SPI_CS0);
tegra_gpio_enable(MCAM_SPI_DI);
tegra_gpio_enable(MCAM_SPI_DO);
tegra_gpio_enable(CAM_I2C_SCL);
tegra_gpio_enable(CAM_I2C_SDA);
tegra_gpio_enable(CAM_MCLK);
return 0;
}
static int endeavor_s5k6a1gx03_power_on(void)
{
int ret;
gpio_direction_output(FRONT_CAM_RST, 0);
gpio_direction_output(CAM_SEL, 0);
tegra_gpio_disable(CAM_I2C_SCL);
tegra_gpio_disable(CAM_I2C_SDA);
tegra_gpio_disable(CAM_MCLK);
/* analog */
ret = regulator_enable(cam_a2v85_en);
if (ret < 0) {
pr_err("[CAM] couldn't enable regulator cam_a2v85_en\n");
regulator_put(cam_a2v85_en);
cam_a2v85_en = NULL;
return ret;
}
ENR_usleep(200);
/* vcm */
ret = regulator_enable(cam_vcm_2v85_en);
if (ret < 0) {
pr_err("[CAM] couldn't enable regulator cam_vcm_2v85_en\n");
regulator_put(cam_vcm_2v85_en);
cam_vcm_2v85_en = NULL;
return ret;
}
ENR_usleep(200);
/* IO */
ret = regulator_enable(cam_vddio_1v8_en);
if (ret < 0) {
pr_err("[CAM] couldn't enable regulator cam_vddio_1v8_en\n");
regulator_put(cam_vddio_1v8_en);
cam_vddio_1v8_en = NULL;
return ret;
}
ENR_usleep(200);
/* RSTN */
gpio_direction_output(FRONT_CAM_RST, 1);
/* digital */
ret = regulator_enable(cam2_d1v2_en);
if (ret < 0) {
pr_err("[CAM] couldn't enable regulator cam_d1v2_en\n");
regulator_put(cam_d1v2_en);
cam_d1v2_en = NULL;
return ret;
}
/* CAM SEL */
gpio_direction_output(CAM_SEL, 1);
ENR_msleep(1);
/* SPI send command to configure RAWCHIP here! */
rawchip_spi_clock_control(1);
yushan_spi_write(0x0008, 0x7f);
return 0;
}
static int endeavoru_s5k3h2y_power_on(void)
{
int ret;
pr_info("[CAM] s5k3h2y power on ++\n");
if (endeavoru_s5k3h2y_power_state)
return 0;
tegra_gpio_disable(MCAM_SPI_CLK);
tegra_gpio_disable(MCAM_SPI_CS0);
tegra_gpio_disable(MCAM_SPI_DI);
tegra_gpio_disable(MCAM_SPI_DO);
//tegra_gpio_disable(RAW_INTR0);
//tegra_gpio_disable(RAW_INTR1);
tegra_gpio_disable(CAM_I2C_SCL);
tegra_gpio_disable(CAM_I2C_SDA);
tegra_gpio_disable(CAM_MCLK);
gpio_direction_output(CAM1_PWDN, 0);
gpio_direction_output(CAM1_VCM_PD, 0);
#if RAWCHIP
rawchip_spi_clock_control(1);
gpio_direction_output(RAW_RSTN, 0);
#endif
//ENR_msleep(1); //TODO
#ifdef CAMERA_REGULATOR
//pr_info("[CAM] use regurator to get power\n");
#if RAWCHIP
/*RAW_1V8_EN */
gpio_direction_output(RAW_1V8_EN, 1);
ENR_usleep(200);
#endif
/* VCM */
ret = regulator_enable(cam_vcm_2v85_en);
if (ret < 0)
{
pr_err("[CAM] couldn't enable regulator v_cam1_vcm_2v85\n");
regulator_put(cam_vcm_2v85_en);
cam_vcm_2v85_en = NULL;
return ret;
}
/* main/front cam analog*/
ret = regulator_enable(cam_a2v85_en);
if (ret < 0)
{
pr_err("[CAM] couldn't enable regulator cam_a2v85_en\n");
regulator_put(cam_a2v85_en);
cam_a2v85_en = NULL;
return ret;
}
ENR_usleep(200);
/*main cam core 1v2 & rawchip external 1v2 */
ret = regulator_enable(cam_d1v2_en);
if (ret < 0)
{
pr_err("[CAM] couldn't enable regulator cam_d1v2_en\n");
regulator_put(cam_d1v2_en);
cam_d1v2_en = NULL;
return ret;
}
ENR_usleep(200);
#if RAWCHIP
/*RAW_1V2_EN */
if (htc_get_pcbid_info() < PROJECT_PHASE_XE)
{
gpio_direction_output(RAW_1V2_EN, 1);
ENR_usleep(200);
}
#endif
/* IO */
ret = regulator_enable(cam_vddio_1v8_en);
if (ret < 0)
{
pr_err("[CAM] couldn't enable regulator cam_vddio_1v8_en\n");
regulator_put(cam_vddio_1v8_en);
cam_vddio_1v8_en = NULL;
return ret;
}
ENR_usleep(100);
/*CAM SEL */
gpio_direction_output(CAM_SEL, 0);
ENR_usleep(100);
#if RAWCHIP
/*RAW_RSTN */
gpio_direction_output(RAW_RSTN, 1);
ENR_msleep(3);
/*SPI send command to configure RAWCHIP here!*/
yushan_spi_write(0x0008, 0x7f);
ENR_msleep(1);
#endif
/* XSHUTDOWM */
gpio_direction_output(CAM1_PWDN, 1);
ENR_usleep(100);
/* VCM PD*/
gpio_direction_output(CAM1_VCM_PD, 1);
ENR_usleep(100);
#else/* use gpio pull up to get power*/
#if RAWCHIP
/*RAW_1V8_EN */
gpio_direction_output(RAW_1V8_EN, 1);
ENR_usleep(200);
#endif
/* VCM */
gpio_direction_output(CAM_VCM2V85, 1);
ENR_usleep(200);
/* analog */
gpio_direction_output(CAM_A2V85_EN, 1);
ENR_usleep(200);
/*core*/
gpio_direction_output(CAM_D1V2_EN, 1);
ENR_usleep(200);
#if RAWCHIP
/*RAW_1V2_EN */
if (htc_get_pcbid_info() < PROJECT_PHASE_XE)
{
ret = gpio_direction_output(RAW_1V2_EN, 1);
ENR_usleep(200);
}
#endif
/* IO */
gpio_direction_output(CAMIO_1V8_EN, 1);
ENR_usleep(100);
/*CAM SEL */
gpio_direction_output(CAM_SEL, 0);
ENR_usleep(100);
#if RAWCHIP
/*RAW_RSTN */
ret = gpio_direction_output(RAW_RSTN, 1);
ENR_msleep(3);
/*SPI send command to configure RAWCHIP here!*/
yushan_spi_write(0x0008, 0x7f);
ENR_msleep(1);
#endif
/* XSHUTDOWM */
gpio_direction_output(CAM1_PWDN, 1);
ENR_usleep(100);
/* VCM PD*/
gpio_direction_output(CAM1_VCM_PD, 1);
ENR_usleep(100);
#endif
endeavoru_s5k3h2y_power_state = 1;
//pr_info("[CAM] s5k3h2y power on --\n");
return 0;
}
static int endeavoru_s5k3h2y_power_off(void)
{
pr_info("[CAM] s5k3h2y power off ++\n");
if (!endeavoru_s5k3h2y_power_state)
return 0;
endeavoru_s5k3h2y_power_state = 0;
#ifdef CAMERA_REGULATOR
/* VCM PD*/
gpio_direction_output(CAM1_VCM_PD, 0);
ENR_msleep(1);
/* XSHUTDOWN */
gpio_direction_output(CAM1_PWDN, 0);
ENR_msleep(1);
#if RAWCHIP
/* RAW RSTN*/
gpio_direction_output(RAW_RSTN, 0);
ENR_msleep(3);
#endif
/* VCM */
regulator_disable(cam_vcm_2v85_en);
ENR_msleep(1);
#if RAWCHIP
/*RAW_1V2_EN */
if (htc_get_pcbid_info() < PROJECT_PHASE_XE)
{
gpio_direction_output(RAW_1V2_EN, 0);
ENR_msleep(5);
}
#endif
/* digital */
regulator_disable(cam_d1v2_en);
ENR_msleep(1);
#if RAWCHIP
/*RAW_1V8_EN */
gpio_direction_output(RAW_1V8_EN, 0);
ENR_msleep(1);
#endif
/* analog */
regulator_disable(cam_a2v85_en);
ENR_msleep(5);
/* IO */
regulator_disable(cam_vddio_1v8_en);
ENR_msleep(10);
#else/* use gpio pull down to disable power */
/* VCM PD*/
gpio_direction_output(CAM1_VCM_PD, 0);
ENR_msleep(1);
/* TODO: Set 0x0100[0] = 0 (Enter SW Standby mode)*/
/* XSHUTDOWN */
gpio_direction_output(CAM1_PWDN, 0);
ENR_msleep(1);
#if RAWCHIP
/* RAW RSTN*/
gpio_direction_output(RAW_RSTN, 0);
ENR_msleep(3);
#endif
/* VCM */
gpio_direction_output(CAM_VCM2V85, 0);
ENR_msleep(1);
#if RAWCHIP
/*RAW_1V2_EN */
if (htc_get_pcbid_info() < PROJECT_PHASE_XE)
{
gpio_direction_output(RAW_1V2_EN, 0);
ENR_msleep(5);
}
#endif
/* digital */
gpio_direction_output(CAM_D1V2_EN, 0);
ENR_msleep(1);
#if RAWCHIP
/*RAW_1V8_EN */
gpio_direction_output(RAW_1V8_EN, 0);
ENR_msleep(1);
rawchip_spi_clock_control(0);
#endif
/* analog */
gpio_direction_output(CAM_A2V85_EN, 0);
ENR_msleep(5);
/* IO */
gpio_direction_output(CAMIO_1V8_EN, 0);
ENR_msleep(10);
#endif
/* set gpio output low : O(L) */
tegra_gpio_enable(MCAM_SPI_CLK);
tegra_gpio_enable(MCAM_SPI_CS0);
tegra_gpio_enable(MCAM_SPI_DI);
tegra_gpio_enable(MCAM_SPI_DO);
//tegra_gpio_enable(RAW_INTR0);
//tegra_gpio_enable(RAW_INTR1);
tegra_gpio_enable(CAM_I2C_SCL);
tegra_gpio_enable(CAM_I2C_SDA);
tegra_gpio_enable(CAM_MCLK);
return 0;
}
static int endeavor_s5k3h2y_power_on(void)
{
int ret;
if (endeavor_s5k3h2y_power_state) {
pr_info("[CAM] %s already power on, return 0", __func__);
return 0;
}
tegra_gpio_disable(MCAM_SPI_CLK);
tegra_gpio_disable(MCAM_SPI_CS0);
tegra_gpio_disable(MCAM_SPI_DI);
tegra_gpio_disable(MCAM_SPI_DO);
tegra_gpio_disable(CAM_I2C_SCL);
tegra_gpio_disable(CAM_I2C_SDA);
tegra_gpio_disable(CAM_MCLK);
gpio_direction_output(CAM1_PWDN, 0);
gpio_direction_output(CAM1_VCM_PD, 0);
gpio_direction_output(RAW_RSTN, 0);
/* RAW_1V8_EN */
gpio_direction_output(RAW_1V8_EN, 1);
ENR_usleep(200);
/* VCM */
ret = regulator_enable(cam_vcm_2v85_en);
if (ret < 0) {
pr_err("[CAM] couldn't enable regulator v_cam1_vcm_2v85\n");
regulator_put(cam_vcm_2v85_en);
cam_vcm_2v85_en = NULL;
return ret;
}
/* main/front cam analog */
ret = regulator_enable(cam_a2v85_en);
if (ret < 0) {
pr_err("[CAM] couldn't enable regulator cam_a2v85_en\n");
regulator_put(cam_a2v85_en);
cam_a2v85_en = NULL;
return ret;
}
ENR_usleep(200);
/* main cam core 1v2 & rawchip external 1v2 */
ret = regulator_enable(cam_d1v2_en);
if (ret < 0) {
pr_err("[CAM] couldn't enable regulator cam_d1v2_en\n");
regulator_put(cam_d1v2_en);
cam_d1v2_en = NULL;
return ret;
}
ENR_usleep(200);
/* RAW_1V2_EN */
if (htc_get_pcbid_info() < PROJECT_PHASE_XE) {
gpio_direction_output(RAW_1V2_EN, 1);
ENR_usleep(200);
}
/* IO */
ret = regulator_enable(cam_vddio_1v8_en);
if (ret < 0) {
pr_err("[CAM] couldn't enable regulator cam_vddio_1v8_en\n");
regulator_put(cam_vddio_1v8_en);
cam_vddio_1v8_en = NULL;
return ret;
}
ENR_usleep(100);
/* CAM SEL */
gpio_direction_output(CAM_SEL, 0);
ENR_usleep(100);
/* RAW_RSTN */
gpio_direction_output(RAW_RSTN, 1);
ENR_msleep(3);
/* SPI send command to configure RAWCHIP here! */
rawchip_spi_clock_control(1);
yushan_spi_write(0x0008, 0x7f);
ENR_msleep(1);
/* XSHUTDOWM */
gpio_direction_output(CAM1_PWDN, 1);
ENR_usleep(100);
/* VCM PD */
gpio_direction_output(CAM1_VCM_PD, 1);
ENR_usleep(100);
endeavor_s5k3h2y_power_state = 1;
return 0;
}
static int enrc2b_s5k6a1gx03_power_off(void)
{
int pcbid = htc_get_pcbid_info();
pr_info("[CAM] %s ++", __func__);
#if defined(CONFIG_RAWCHIP_ENABLE)
if ((pcbid >= PROJECT_PHASE_XB) || (pcbid == PROJECT_PHASE_EVM) || is_global_sku)
{
/* set gpio output low : O(L) */
tegra_gpio_enable(MCAM_SPI_CLK);
ENR_msleep(1);
tegra_gpio_enable(MCAM_SPI_DO);
tegra_gpio_enable(MCAM_SPI_DI);
tegra_gpio_enable(MCAM_SPI_CS0);
tegra_pinmux_set_pullupdown(TEGRA_PINGROUP_KB_ROW0, TEGRA_PUPD_PULL_DOWN);
tegra_pinmux_set_pullupdown(TEGRA_PINGROUP_CLK3_REQ, TEGRA_PUPD_PULL_DOWN);
ENR_msleep(1);
/* RAW RSTN*/
gpio_direction_output(RAW_RSTN, 0);
ENR_msleep(3);
}
#endif
tegra_gpio_enable(CAM_MCLK);
ENR_msleep(1);
/* CAM SEL */
gpio_direction_output(CAM_SEL, 0);
ENR_msleep(1);
/* vcm */
regulator_disable(cam_vcm2v85_en);
ENR_msleep(1);
/* digital */
gpio_direction_output(CAM2_D1V2_EN, 0);
ENR_msleep(1);
/* RSTN */
gpio_direction_output(FRONT_CAM_RST, 0);
ENR_msleep(1);
#if defined(CONFIG_RAWCHIP_ENABLE)
if ((pcbid >= PROJECT_PHASE_XB) || (pcbid == PROJECT_PHASE_EVM) || is_global_sku)
{
/* core */
gpio_direction_output(CAM_D1V2_EN, 0);
ENR_msleep(1);
/* RAW_1V8_EN */
gpio_direction_output(RAW_1V8_EN, 0);
ENR_msleep(1);
rawchip_spi_clock_control(0);
}
#endif
/* analog */
regulator_disable(cam_a2v85_en);
ENR_msleep(5);
/* IO */
tegra_gpio_enable(CAM_I2C_SCL);
tegra_gpio_enable(CAM_I2C_SDA);
gpio_direction_output(CAMIO_1V8_EN, 0);
ENR_msleep(10);
pr_info("[CAM] %s --", __func__);
return 0;
}
static int enrc2b_s5k6a1gx03_power_on(void)
{
int ret;
int pcbid = htc_get_pcbid_info();
pr_info("[CAM] %s ++", __func__);
enrc2b_set_regulator();
gpio_direction_output(CAM_MCLK, 0);
#if defined(CONFIG_RAWCHIP_ENABLE)
if ((pcbid >= PROJECT_PHASE_XB) || (pcbid == PROJECT_PHASE_EVM) || is_global_sku)
{
tegra_gpio_disable(MCAM_SPI_CLK);
tegra_gpio_disable(MCAM_SPI_DO);
tegra_gpio_disable(MCAM_SPI_DI);
tegra_gpio_disable(MCAM_SPI_CS0);
tegra_pinmux_set_pullupdown(TEGRA_PINGROUP_KB_ROW0, TEGRA_PUPD_NORMAL);
tegra_pinmux_set_pullupdown(TEGRA_PINGROUP_CLK3_REQ, TEGRA_PUPD_NORMAL);
}
#endif
tegra_gpio_disable(CAM_I2C_SCL);
tegra_gpio_disable(CAM_I2C_SDA);
gpio_direction_output(CAM1_PWDN, 0);
gpio_direction_output(FRONT_CAM_RST, 0);
gpio_direction_output(CAM1_VCM_PD, 0);
#if defined(CONFIG_RAWCHIP_ENABLE)
if ((pcbid >= PROJECT_PHASE_XB) || (pcbid == PROJECT_PHASE_EVM) || is_global_sku)
{
gpio_direction_output(RAW_RSTN, 0);
}
#endif
gpio_direction_output(CAM_SEL, 0);
#if defined(CONFIG_RAWCHIP_ENABLE)
if ((pcbid >= PROJECT_PHASE_XB) || (pcbid == PROJECT_PHASE_EVM) || is_global_sku)
{
/* RAW_1V8_EN */
gpio_direction_output(RAW_1V8_EN, 1);
ENR_usleep(200);
}
#endif
/* vcm */
ret = regulator_enable(cam_vcm2v85_en);
if (ret < 0)
{
pr_err("[CAM] couldn't enable regulator cam_vcm2v85_en\n");
regulator_put(cam_vcm2v85_en);
cam_vcm2v85_en = NULL;
return ret;
}
ENR_usleep(200);
/* analog */
ret = regulator_enable(cam_a2v85_en);
if (ret < 0)
{
pr_err("[CAM] couldn't enable regulator cam_a2v85_en\n");
regulator_put(cam_a2v85_en);
cam_a2v85_en = NULL;
return ret;
}
ENR_usleep(200);
#if defined(CONFIG_RAWCHIP_ENABLE)
if ((pcbid >= PROJECT_PHASE_XB) || (pcbid == PROJECT_PHASE_EVM) || is_global_sku)
{
/* main camera core */
gpio_direction_output(CAM_D1V2_EN, 1);
ENR_usleep(200);
}
#endif
/* IO */
gpio_direction_output(CAMIO_1V8_EN, 1);
ENR_usleep(200);
/* RSTN */
gpio_direction_output(FRONT_CAM_RST, 1);
/* digital */
gpio_direction_output(CAM2_D1V2_EN, 1);
ENR_usleep(200);
/* CAM SEL */
gpio_direction_output(CAM_SEL, 1);
ENR_msleep(1);
tegra_gpio_disable(CAM_MCLK);
ENR_msleep(1);
#if defined(CONFIG_RAWCHIP_ENABLE)
if ((pcbid >= PROJECT_PHASE_XB) || (pcbid == PROJECT_PHASE_EVM) || is_global_sku)
{
/* RAW_RSTN */
ret = gpio_direction_output(RAW_RSTN, 1);
ENR_msleep(1);
/* SPI send command to configure RAWCHIP here! */
rawchip_spi_clock_control(1);
yushan_spi_write(0x0008, 0x7f);
ENR_msleep(1);
}
#endif
pr_info("[CAM] %s --", __func__);
return 0;
}
static int enrc2b_main_power_off(void)
{
pr_info("[CAM] %s ++: %s", __func__, camera_module_name[cam_src]);
if (!enrc2b_power_state) {
pr_info("[CAM] %s already power off, return 0", __func__);
return 0;
}
enrc2b_power_state = 0;
/* VCM PD*/
gpio_direction_output(CAM1_VCM_PD, 0);
ENR_msleep(1);
/* XSHUTDOWN */
gpio_direction_output(CAM1_PWDN, 0);
ENR_msleep(1);
tegra_gpio_enable(MCAM_SPI_CLK);
ENR_msleep(1);
tegra_gpio_enable(MCAM_SPI_CS0);
tegra_gpio_enable(MCAM_SPI_DI);
tegra_gpio_enable(MCAM_SPI_DO);
tegra_pinmux_set_pullupdown(TEGRA_PINGROUP_KB_ROW0, TEGRA_PUPD_PULL_DOWN);
tegra_pinmux_set_pullupdown(TEGRA_PINGROUP_CLK3_REQ, TEGRA_PUPD_PULL_DOWN);
ENR_msleep(1);
#if defined(CONFIG_RAWCHIP_ENABLE)
/* RAW RSTN*/
gpio_direction_output(RAW_RSTN, 0);
ENR_msleep(3);
#endif
tegra_gpio_enable(CAM_MCLK);
ENR_msleep(1);
/* VCM */
regulator_disable(cam_vcm2v85_en);
ENR_msleep(1);
/* digital */
gpio_direction_output(CAM_D1V2_EN, 0);
ENR_msleep(1);
#if defined(CONFIG_RAWCHIP_ENABLE)
/* RAW_1V8_EN */
gpio_direction_output(RAW_1V8_EN, 0);
ENR_msleep(1);
rawchip_spi_clock_control(0);
#endif
/* analog */
regulator_disable(cam_a2v85_en);
ENR_msleep(5);
/* IO */
tegra_gpio_enable(CAM_I2C_SCL);
tegra_gpio_enable(CAM_I2C_SDA);
gpio_direction_output(CAMIO_1V8_EN, 0);
ENR_msleep(10);
pr_info("[CAM] %s --", __func__);
return 0;
}
static int enrc2b_main_power_on(void)
{
int ret;
pr_info("[CAM] %s ++: %s", __func__, camera_module_name[cam_src]);
if (enrc2b_power_state) {
pr_info("[CAM] %s already power on, return 0", __func__);
return 0;
}
enrc2b_set_regulator();
gpio_direction_output(CAM_MCLK, 0);
tegra_gpio_disable(CAM_I2C_SCL);
tegra_gpio_disable(CAM_I2C_SDA);
tegra_gpio_disable(MCAM_SPI_CLK);
tegra_gpio_disable(MCAM_SPI_DO);
tegra_gpio_disable(MCAM_SPI_DI);
tegra_gpio_disable(MCAM_SPI_CS0);
tegra_pinmux_set_pullupdown(TEGRA_PINGROUP_KB_ROW0, TEGRA_PUPD_NORMAL);
tegra_pinmux_set_pullupdown(TEGRA_PINGROUP_CLK3_REQ, TEGRA_PUPD_NORMAL);
gpio_direction_output(CAM1_PWDN, 0);
gpio_direction_output(FRONT_CAM_RST, 0);
gpio_direction_output(CAM1_VCM_PD, 0);
#if defined(CONFIG_RAWCHIP_ENABLE)
/* RAW_RSTN */
ret = gpio_direction_output(RAW_RSTN, 0);
#endif
/* CAM SEL */
gpio_direction_output(CAM_SEL, 0);
#if defined(CONFIG_RAWCHIP_ENABLE)
/* RAW_1V8_EN */
gpio_direction_output(RAW_1V8_EN, 1);
ENR_usleep(200);
#endif
/* VCM */
ret = regulator_enable(cam_vcm2v85_en);
if (ret < 0)
{
pr_err("[CAM] couldn't enable regulator v_cam1_vcm_2v85\n");
regulator_put(cam_vcm2v85_en);
cam_vcm2v85_en = NULL;
return ret;
}
/* main/front cam analog*/
ret = regulator_enable(cam_a2v85_en);
if (ret < 0)
{
pr_err("[CAM] couldn't enable regulator cam_a2v85_en\n");
regulator_put(cam_a2v85_en);
cam_a2v85_en = NULL;
return ret;
}
ENR_usleep(200);
/* core */
gpio_direction_output(CAM_D1V2_EN, 1);
ENR_usleep(200);
/* IO */
gpio_direction_output(CAMIO_1V8_EN, 1);
ENR_usleep(200);
tegra_gpio_disable(CAM_MCLK);
ENR_msleep(3);
#if defined(CONFIG_RAWCHIP_ENABLE)
/* RAW_RSTN */
ret = gpio_direction_output(RAW_RSTN, 1);
ENR_msleep(1);
pr_info("[CAM] %s, rawchip power on, send SPI command", __func__);
rawchip_spi_clock_control(1);
/* SPI send command to configure RAWCHIP here! */
yushan_spi_write(0x0008, 0x7f);
pr_info("[CAM] %s, rawchip power on done", __func__);
ENR_msleep(1);
#endif
/* XSHUTDOWM */
gpio_direction_output(CAM1_PWDN, 1);
ENR_msleep(1);
gpio_direction_output(CAM1_VCM_PD, 1);
enrc2b_power_state = 1;
pr_info("[CAM] %s --", __func__);
return 0;
}
