static void register_reset_registers(void) {
static_assert(sizeof(union apsr_t) == 4, "Punned structure size");
{
union apsr_t a;
a.storage = 0x80000000;
if (!a.bits.N || a.bits.Z || a.bits.C || a.bits.V || a.bits.Q)
CORE_ERR_runtime("Punned structure packing\n");
a.storage = 0x40000000;
if (a.bits.N || !a.bits.Z || a.bits.C || a.bits.V || a.bits.Q)
CORE_ERR_runtime("Punned structure packing\n");
a.storage = 0x20000000;
if (a.bits.N || a.bits.Z || !a.bits.C || a.bits.V || a.bits.Q)
CORE_ERR_runtime("Punned structure packing\n");
a.storage = 0x10000000;
if (a.bits.N || a.bits.Z || a.bits.C || !a.bits.V || a.bits.Q)
CORE_ERR_runtime("Punned structure packing\n");
a.storage = 0x08000000;
if (a.bits.N || a.bits.Z || a.bits.C || a.bits.V || !a.bits.Q)
CORE_ERR_runtime("Punned structure packing\n");
}
static_assert(sizeof(union ipsr_t) == 4, "Punned structure size");
{
union ipsr_t i;
i.storage = 0xa5;
if (i.bits.exception != 0xa5)
CORE_ERR_runtime("Punned structure packing\n");
}
static_assert(sizeof(union epsr_t) == 4, "Punned structure size");
static_assert(sizeof(union control_t) == 4, "Punned structure size");
static_assert(sizeof(union ufsr_t) == 4, "Punned structure size");
register_reset(reset_registers);
}
static void register_reset_registers(void) {
assert(sizeof(union apsr_t) == 4);
assert(sizeof(union ipsr_t) == 4);
assert(sizeof(union epsr_t) == 4);
register_reset(reset_registers);
}
static void gic_proxy_reset(DeviceState *dev)
{
GICProxy *s = XILINX_GIC_PROXY(dev);
unsigned int i;
for (i = 0; i < ARRAY_SIZE(s->regs_info); ++i) {
register_reset(&s->regs_info[i]);
}
}
static void xpio_dci_component_reset(DeviceState *dev)
{
XPIO_DCI_COMPONENT *s = XILINX_XPIO_DCI_COMPONENT(dev);
unsigned int i;
for (i = 0; i < ARRAY_SIZE(s->regs_info); ++i) {
register_reset(&s->regs_info[i]);
}
}
/* begin emitting asm */
void v_begin(v_code *i) {
if(elock)
v_fatal("do not support concurrent v_lambda calls.\n");
elock = 1;
v_ip = i;
v_calls = 0;
register_reset() ;
lreset();
}
static void pmc_tamper_reset(DeviceState *dev)
{
PmcTamper *s = XILINX_PMC_TAMPER(dev);
unsigned int i;
for (i = 0; i < ARRAY_SIZE(s->regs_info); ++i) {
register_reset(&s->regs_info[i]);
}
}
static void iom_pit_reset(DeviceState *dev)
{
XilinxPIT *s = XILINX_IO_MODULE_PIT(dev);
unsigned int i;
for (i = 0; i < ARRAY_SIZE(s->regs_info); ++i) {
register_reset(&s->regs_info[i]);
}
s->ps_level = false;
}
static void pmc_anlg_reset(DeviceState *dev)
{
PmcAnalog *s = PMC_ANALOG(dev);
unsigned int i;
for (i = 0; i < ARRAY_SIZE(s->regs_info); ++i) {
register_reset(&s->regs_info[i]);
}
pmc_anlg_imr_update_irq(s);
}
static void xlnx_zynqmp_ipi_reset(DeviceState *dev)
{
XlnxZynqMPIPI *s = XLNX_ZYNQMP_IPI(dev);
int i;
for (i = 0; i < ARRAY_SIZE(s->regs_info); ++i) {
register_reset(&s->regs_info[i]);
}
xlnx_zynqmp_ipi_update_irq(s);
}
void register_sam4l_pm_periph(void) {
register_reset(sam4l_pm_reset);
union memmap_fn mem_fn;
mem_fn.R_fn32 = pm_read;
register_memmap("SAM4L PM", false, 4, mem_fn, PM_BASE, PM_BASE+PM_SIZE);
mem_fn.W_fn32 = pm_write;
register_memmap("SAM4L PM", true, 4, mem_fn, PM_BASE, PM_BASE+PM_SIZE);
register_periph_printer(print_pm);
}
static void rpu_reset(DeviceState *dev)
{
RPU *s = XILINX_RPU(dev);
unsigned int i;
for (i = 0; i < ARRAY_SIZE(s->regs_info); ++i) {
register_reset(&s->regs_info[i]);
}
rpu_1_update_irq(s);
rpu_0_update_irq(s);
for (i = 0; i < 2; i++) {
s->cpu_in_wfi[i] = false;
}
update_wfi_out(s);
}
void register_reset_m3_prc(void) {
register_reset(m3_prc_reset);
}
void v_init(void) {
v_calls = 0;
register_reset() ;
lreset();
}
