static struct regmap_mmio_context *regmap_mmio_gen_context(struct device *dev, const char *clk_id, void __iomem *regs, const struct regmap_config *config) { struct regmap_mmio_context *ctx; int min_stride; int ret; ret = regmap_mmio_regbits_check(config->reg_bits); if (ret) return ERR_PTR(ret); if (config->pad_bits) return ERR_PTR(-EINVAL); switch (config->val_bits) { case 8: /* The core treats 0 as 1 */ min_stride = 0; break; case 16: min_stride = 2; break; case 32: min_stride = 4; break; #ifdef CONFIG_64BIT case 64: min_stride = 8; break; #endif break; default: return ERR_PTR(-EINVAL); } if (config->reg_stride < min_stride) return ERR_PTR(-EINVAL); switch (config->reg_format_endian) { case REGMAP_ENDIAN_DEFAULT: case REGMAP_ENDIAN_NATIVE: break; default: return ERR_PTR(-EINVAL); } ctx = kzalloc(sizeof(*ctx), GFP_KERNEL); if (!ctx) return ERR_PTR(-ENOMEM); ctx->regs = regs; ctx->val_bytes = config->val_bits / 8; ctx->reg_bytes = config->reg_bits / 8; ctx->pad_bytes = config->pad_bits / 8; ctx->clk = ERR_PTR(-ENODEV); if (clk_id == NULL) return ctx; ctx->clk = clk_get(dev, clk_id); if (IS_ERR(ctx->clk)) { ret = PTR_ERR(ctx->clk); goto err_free; } ret = clk_prepare(ctx->clk); if (ret < 0) { clk_put(ctx->clk); goto err_free; } return ctx; err_free: kfree(ctx); return ERR_PTR(ret); }
static struct regmap_mmio_context *regmap_mmio_gen_context(struct device *dev, const char *clk_id, void __iomem *regs, const struct regmap_config *config) { struct regmap_mmio_context *ctx; int min_stride; int ret; ret = regmap_mmio_regbits_check(config->reg_bits); if (ret) return ERR_PTR(ret); if (config->pad_bits) return ERR_PTR(-EINVAL); min_stride = regmap_mmio_get_min_stride(config->val_bits); if (min_stride < 0) return ERR_PTR(min_stride); if (config->reg_stride < min_stride) return ERR_PTR(-EINVAL); ctx = kzalloc(sizeof(*ctx), GFP_KERNEL); if (!ctx) return ERR_PTR(-ENOMEM); ctx->regs = regs; ctx->val_bytes = config->val_bits / 8; ctx->clk = ERR_PTR(-ENODEV); switch (regmap_get_val_endian(dev, ®map_mmio, config)) { case REGMAP_ENDIAN_DEFAULT: case REGMAP_ENDIAN_LITTLE: #ifdef __LITTLE_ENDIAN case REGMAP_ENDIAN_NATIVE: #endif switch (config->val_bits) { case 8: ctx->reg_read = regmap_mmio_read8; ctx->reg_write = regmap_mmio_write8; break; case 16: ctx->reg_read = regmap_mmio_read16le; ctx->reg_write = regmap_mmio_write16le; break; case 32: ctx->reg_read = regmap_mmio_read32le; ctx->reg_write = regmap_mmio_write32le; break; #ifdef CONFIG_64BIT case 64: ctx->reg_read = regmap_mmio_read64le; ctx->reg_write = regmap_mmio_write64le; break; #endif default: ret = -EINVAL; goto err_free; } break; case REGMAP_ENDIAN_BIG: #ifdef __BIG_ENDIAN case REGMAP_ENDIAN_NATIVE: #endif switch (config->val_bits) { case 8: ctx->reg_read = regmap_mmio_read8; ctx->reg_write = regmap_mmio_write8; break; case 16: ctx->reg_read = regmap_mmio_read16be; ctx->reg_write = regmap_mmio_write16be; break; case 32: ctx->reg_read = regmap_mmio_read32be; ctx->reg_write = regmap_mmio_write32be; break; default: ret = -EINVAL; goto err_free; } break; default: ret = -EINVAL; goto err_free; } if (clk_id == NULL) return ctx; ctx->clk = clk_get(dev, clk_id); if (IS_ERR(ctx->clk)) { ret = PTR_ERR(ctx->clk); goto err_free; } ret = clk_prepare(ctx->clk); if (ret < 0) { clk_put(ctx->clk); goto err_free; } return ctx; err_free: kfree(ctx); return ERR_PTR(ret); }