static int xhci_plat_probe(struct platform_device *pdev)
{
const struct hc_driver *driver;
struct xhci_hcd *xhci;
struct resource *res;
struct usb_hcd *hcd;
int ret;
int irq;
if (usb_disabled())
return -ENODEV;
driver = &xhci_plat_xhci_driver;
irq = platform_get_irq(pdev, 0);
if (irq < 0)
return -ENODEV;
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
if (!res)
return -ENODEV;
hcd = usb_create_hcd(driver, &pdev->dev, dev_name(&pdev->dev));
if (!hcd)
return -ENOMEM;
hcd->rsrc_start = res->start;
hcd->rsrc_len = resource_size(res);
if (!request_mem_region(hcd->rsrc_start, hcd->rsrc_len,
driver->description)) {
dev_dbg(&pdev->dev, "controller already in use\n");
ret = -EBUSY;
goto put_hcd;
}
hcd->regs = ioremap_nocache(hcd->rsrc_start, hcd->rsrc_len);
if (!hcd->regs) {
dev_dbg(&pdev->dev, "error mapping memory\n");
ret = -EFAULT;
goto release_mem_region;
}
ret = usb_add_hcd(hcd, irq, IRQF_SHARED);
if (ret)
goto unmap_registers;
/* USB 2.0 roothub is stored in the platform_device now. */
hcd = platform_get_drvdata(pdev);
xhci = hcd_to_xhci(hcd);
xhci->shared_hcd = usb_create_shared_hcd(driver, &pdev->dev,
dev_name(&pdev->dev), hcd);
if (!xhci->shared_hcd) {
ret = -ENOMEM;
goto dealloc_usb2_hcd;
}
/*
* Set the xHCI pointer before xhci_plat_setup() (aka hcd_driver.reset)
* is called by usb_add_hcd().
*/
*((struct xhci_hcd **) xhci->shared_hcd->hcd_priv) = xhci;
ret = usb_add_hcd(xhci->shared_hcd, irq, IRQF_SHARED);
if (ret)
goto put_usb3_hcd;
return 0;
put_usb3_hcd:
usb_put_hcd(xhci->shared_hcd);
dealloc_usb2_hcd:
usb_remove_hcd(hcd);
unmap_registers:
iounmap(hcd->regs);
release_mem_region:
release_mem_region(hcd->rsrc_start, hcd->rsrc_len);
put_hcd:
usb_put_hcd(hcd);
return ret;
}
static void __init com90xx_probe(void)
{
int count, status, ioaddr, numprint, airq, openparen = 0;
unsigned long airqmask;
int ports[(0x3f0 - 0x200) / 16 + 1] =
{0};
unsigned long *shmems;
void __iomem **iomem;
int numports, numshmems, *port;
u_long *p;
int index;
if (!io && !irq && !shmem && !*device && com90xx_skip_probe)
return;
shmems = kzalloc(((0x100000-0xa0000) / 0x800) * sizeof(unsigned long),
GFP_KERNEL);
if (!shmems)
return;
iomem = kzalloc(((0x100000-0xa0000) / 0x800) * sizeof(void __iomem *),
GFP_KERNEL);
if (!iomem) {
kfree(shmems);
return;
}
BUGLVL(D_NORMAL) printk(VERSION);
/* set up the arrays where we'll store the possible probe addresses */
numports = numshmems = 0;
if (io)
ports[numports++] = io;
else
for (count = 0x200; count <= 0x3f0; count += 16)
ports[numports++] = count;
if (shmem)
shmems[numshmems++] = shmem;
else
for (count = 0xA0000; count <= 0xFF800; count += 2048)
shmems[numshmems++] = count;
/* Stage 1: abandon any reserved ports, or ones with status==0xFF
* (empty), and reset any others by reading the reset port.
*/
numprint = -1;
for (port = &ports[0]; port - ports < numports; port++) {
numprint++;
numprint %= 8;
if (!numprint) {
BUGMSG2(D_INIT, "\n");
BUGMSG2(D_INIT, "S1: ");
}
BUGMSG2(D_INIT, "%Xh ", *port);
ioaddr = *port;
if (!request_region(*port, ARCNET_TOTAL_SIZE, "arcnet (90xx)")) {
BUGMSG2(D_INIT_REASONS, "(request_region)\n");
BUGMSG2(D_INIT_REASONS, "S1: ");
BUGLVL(D_INIT_REASONS) numprint = 0;
*port-- = ports[--numports];
continue;
}
if (ASTATUS() == 0xFF) {
BUGMSG2(D_INIT_REASONS, "(empty)\n");
BUGMSG2(D_INIT_REASONS, "S1: ");
BUGLVL(D_INIT_REASONS) numprint = 0;
release_region(*port, ARCNET_TOTAL_SIZE);
*port-- = ports[--numports];
continue;
}
inb(_RESET); /* begin resetting card */
BUGMSG2(D_INIT_REASONS, "\n");
BUGMSG2(D_INIT_REASONS, "S1: ");
BUGLVL(D_INIT_REASONS) numprint = 0;
}
BUGMSG2(D_INIT, "\n");
if (!numports) {
BUGMSG2(D_NORMAL, "S1: No ARCnet cards found.\n");
kfree(shmems);
kfree(iomem);
return;
}
/* Stage 2: we have now reset any possible ARCnet cards, so we can't
* do anything until they finish. If D_INIT, print the list of
* cards that are left.
*/
numprint = -1;
for (port = &ports[0]; port < ports + numports; port++) {
numprint++;
numprint %= 8;
if (!numprint) {
BUGMSG2(D_INIT, "\n");
BUGMSG2(D_INIT, "S2: ");
}
BUGMSG2(D_INIT, "%Xh ", *port);
}
BUGMSG2(D_INIT, "\n");
mdelay(RESETtime);
/* Stage 3: abandon any shmem addresses that don't have the signature
* 0xD1 byte in the right place, or are read-only.
*/
numprint = -1;
for (index = 0, p = &shmems[0]; index < numshmems; p++, index++) {
void __iomem *base;
numprint++;
numprint %= 8;
if (!numprint) {
BUGMSG2(D_INIT, "\n");
BUGMSG2(D_INIT, "S3: ");
}
BUGMSG2(D_INIT, "%lXh ", *p);
if (!request_mem_region(*p, MIRROR_SIZE, "arcnet (90xx)")) {
BUGMSG2(D_INIT_REASONS, "(request_mem_region)\n");
BUGMSG2(D_INIT_REASONS, "Stage 3: ");
BUGLVL(D_INIT_REASONS) numprint = 0;
goto out;
}
base = ioremap(*p, MIRROR_SIZE);
if (!base) {
BUGMSG2(D_INIT_REASONS, "(ioremap)\n");
BUGMSG2(D_INIT_REASONS, "Stage 3: ");
BUGLVL(D_INIT_REASONS) numprint = 0;
goto out1;
}
if (readb(base) != TESTvalue) {
BUGMSG2(D_INIT_REASONS, "(%02Xh != %02Xh)\n",
readb(base), TESTvalue);
BUGMSG2(D_INIT_REASONS, "S3: ");
BUGLVL(D_INIT_REASONS) numprint = 0;
goto out2;
}
/* By writing 0x42 to the TESTvalue location, we also make
* sure no "mirror" shmem areas show up - if they occur
* in another pass through this loop, they will be discarded
* because *cptr != TESTvalue.
*/
writeb(0x42, base);
if (readb(base) != 0x42) {
BUGMSG2(D_INIT_REASONS, "(read only)\n");
BUGMSG2(D_INIT_REASONS, "S3: ");
goto out2;
}
BUGMSG2(D_INIT_REASONS, "\n");
BUGMSG2(D_INIT_REASONS, "S3: ");
BUGLVL(D_INIT_REASONS) numprint = 0;
iomem[index] = base;
continue;
out2:
iounmap(base);
out1:
release_mem_region(*p, MIRROR_SIZE);
out:
*p-- = shmems[--numshmems];
index--;
}
BUGMSG2(D_INIT, "\n");
if (!numshmems) {
BUGMSG2(D_NORMAL, "S3: No ARCnet cards found.\n");
for (port = &ports[0]; port < ports + numports; port++)
release_region(*port, ARCNET_TOTAL_SIZE);
kfree(shmems);
kfree(iomem);
return;
}
/* Stage 4: something of a dummy, to report the shmems that are
* still possible after stage 3.
*/
numprint = -1;
for (p = &shmems[0]; p < shmems + numshmems; p++) {
numprint++;
numprint %= 8;
if (!numprint) {
BUGMSG2(D_INIT, "\n");
BUGMSG2(D_INIT, "S4: ");
}
BUGMSG2(D_INIT, "%lXh ", *p);
}
BUGMSG2(D_INIT, "\n");
/* Stage 5: for any ports that have the correct status, can disable
* the RESET flag, and (if no irq is given) generate an autoirq,
* register an ARCnet device.
*
* Currently, we can only register one device per probe, so quit
* after the first one is found.
*/
numprint = -1;
for (port = &ports[0]; port < ports + numports; port++) {
int found = 0;
numprint++;
numprint %= 8;
if (!numprint) {
BUGMSG2(D_INIT, "\n");
BUGMSG2(D_INIT, "S5: ");
}
BUGMSG2(D_INIT, "%Xh ", *port);
ioaddr = *port;
status = ASTATUS();
if ((status & 0x9D)
!= (NORXflag | RECONflag | TXFREEflag | RESETflag)) {
BUGMSG2(D_INIT_REASONS, "(status=%Xh)\n", status);
BUGMSG2(D_INIT_REASONS, "S5: ");
BUGLVL(D_INIT_REASONS) numprint = 0;
release_region(*port, ARCNET_TOTAL_SIZE);
*port-- = ports[--numports];
continue;
}
ACOMMAND(CFLAGScmd | RESETclear | CONFIGclear);
status = ASTATUS();
if (status & RESETflag) {
BUGMSG2(D_INIT_REASONS, " (eternal reset, status=%Xh)\n",
status);
BUGMSG2(D_INIT_REASONS, "S5: ");
BUGLVL(D_INIT_REASONS) numprint = 0;
release_region(*port, ARCNET_TOTAL_SIZE);
*port-- = ports[--numports];
continue;
}
/* skip this completely if an IRQ was given, because maybe
* we're on a machine that locks during autoirq!
*/
if (!irq) {
/* if we do this, we're sure to get an IRQ since the
* card has just reset and the NORXflag is on until
* we tell it to start receiving.
*/
airqmask = probe_irq_on();
AINTMASK(NORXflag);
udelay(1);
AINTMASK(0);
airq = probe_irq_off(airqmask);
if (airq <= 0) {
BUGMSG2(D_INIT_REASONS, "(airq=%d)\n", airq);
BUGMSG2(D_INIT_REASONS, "S5: ");
BUGLVL(D_INIT_REASONS) numprint = 0;
release_region(*port, ARCNET_TOTAL_SIZE);
*port-- = ports[--numports];
continue;
}
} else {
airq = irq;
}
BUGMSG2(D_INIT, "(%d,", airq);
openparen = 1;
/* Everything seems okay. But which shmem, if any, puts
* back its signature byte when the card is reset?
*
* If there are multiple cards installed, there might be
* multiple shmems still in the list.
*/
#ifdef FAST_PROBE
if (numports > 1 || numshmems > 1) {
inb(_RESET);
mdelay(RESETtime);
} else {
/* just one shmem and port, assume they match */
writeb(TESTvalue, iomem[0]);
}
#else
inb(_RESET);
mdelay(RESETtime);
#endif
for (index = 0; index < numshmems; index++) {
u_long ptr = shmems[index];
void __iomem *base = iomem[index];
if (readb(base) == TESTvalue) { /* found one */
BUGMSG2(D_INIT, "%lXh)\n", *p);
openparen = 0;
/* register the card */
if (com90xx_found(*port, airq, ptr, base) == 0)
found = 1;
numprint = -1;
/* remove shmem from the list */
shmems[index] = shmems[--numshmems];
iomem[index] = iomem[numshmems];
break; /* go to the next I/O port */
} else {
BUGMSG2(D_INIT_REASONS, "%Xh-", readb(base));
}
}
if (openparen) {
BUGLVL(D_INIT) printk("no matching shmem)\n");
BUGLVL(D_INIT_REASONS) printk("S5: ");
BUGLVL(D_INIT_REASONS) numprint = 0;
}
if (!found)
release_region(*port, ARCNET_TOTAL_SIZE);
*port-- = ports[--numports];
}
BUGLVL(D_INIT_REASONS) printk("\n");
/* Now put back TESTvalue on all leftover shmems. */
for (index = 0; index < numshmems; index++) {
writeb(TESTvalue, iomem[index]);
iounmap(iomem[index]);
release_mem_region(shmems[index], MIRROR_SIZE);
}
kfree(shmems);
kfree(iomem);
}
static int serial_omap_probe(struct platform_device *pdev)
{
struct uart_omap_port *up;
struct resource *mem, *irq, *dma_tx, *dma_rx;
struct omap_uart_port_info *omap_up_info = pdev->dev.platform_data;
int ret = -ENOSPC;
mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
if (!mem) {
dev_err(&pdev->dev, "no mem resource?\n");
return -ENODEV;
}
irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
if (!irq) {
dev_err(&pdev->dev, "no irq resource?\n");
return -ENODEV;
}
if (!request_mem_region(mem->start, resource_size(mem),
pdev->dev.driver->name)) {
dev_err(&pdev->dev, "memory region already claimed\n");
return -EBUSY;
}
dma_rx = platform_get_resource_byname(pdev, IORESOURCE_DMA, "rx");
if (!dma_rx) {
ret = -EINVAL;
goto err;
}
dma_tx = platform_get_resource_byname(pdev, IORESOURCE_DMA, "tx");
if (!dma_tx) {
ret = -EINVAL;
goto err;
}
up = kzalloc(sizeof(*up), GFP_KERNEL);
if (up == NULL) {
ret = -ENOMEM;
goto do_release_region;
}
sprintf(up->name, "OMAP UART%d", pdev->id);
up->pdev = pdev;
up->port.dev = &pdev->dev;
up->port.type = PORT_OMAP;
up->port.iotype = UPIO_MEM;
up->port.irq = irq->start;
up->port.regshift = 2;
up->port.fifosize = 64;
up->port.ops = &serial_omap_pops;
up->port.line = pdev->id;
up->port.membase = omap_up_info->membase;
up->port.mapbase = omap_up_info->mapbase;
up->port.flags = omap_up_info->flags;
up->port.irqflags = omap_up_info->irqflags;
up->port.uartclk = omap_up_info->uartclk;
up->uart_dma.uart_base = mem->start;
if (omap_up_info->dma_enabled) {
up->uart_dma.uart_dma_tx = dma_tx->start;
up->uart_dma.uart_dma_rx = dma_rx->start;
up->use_dma = 1;
up->uart_dma.rx_buf_size = 4096;
up->uart_dma.rx_timeout = 2;
spin_lock_init(&(up->uart_dma.tx_lock));
spin_lock_init(&(up->uart_dma.rx_lock));
up->uart_dma.tx_dma_channel = OMAP_UART_DMA_CH_FREE;
up->uart_dma.rx_dma_channel = OMAP_UART_DMA_CH_FREE;
}
ui[pdev->id] = up;
serial_omap_add_console_port(up);
ret = uart_add_one_port(&serial_omap_reg, &up->port);
if (ret != 0)
goto do_release_region;
platform_set_drvdata(pdev, up);
return 0;
err:
dev_err(&pdev->dev, "[UART%d]: failure [%s]: %d\n",
pdev->id, __func__, ret);
do_release_region:
release_mem_region(mem->start, resource_size(mem));
return ret;
}
static int __init xilinx_spi_of_probe(struct of_device *ofdev,
const struct of_device_id *match)
{
struct spi_master *master;
struct xilinx_spi *xspi;
struct resource r_irq_struct;
struct resource r_mem_struct;
struct resource *r_irq = &r_irq_struct;
struct resource *r_mem = &r_mem_struct;
int rc = 0;
const u32 *prop;
int len;
/* Get resources(memory, IRQ) associated with the device */
master = spi_alloc_master(&ofdev->dev, sizeof(struct xilinx_spi));
if (master == NULL) {
return -ENOMEM;
}
dev_set_drvdata(&ofdev->dev, master);
rc = of_address_to_resource(ofdev->node, 0, r_mem);
if (rc) {
dev_warn(&ofdev->dev, "invalid address\n");
goto put_master;
}
rc = of_irq_to_resource(ofdev->node, 0, r_irq);
if (rc == NO_IRQ) {
dev_warn(&ofdev->dev, "no IRQ found\n");
goto put_master;
}
xspi = spi_master_get_devdata(master);
xspi->bitbang.master = spi_master_get(master);
xspi->bitbang.chipselect = xilinx_spi_chipselect;
xspi->bitbang.setup_transfer = xilinx_spi_setup_transfer;
xspi->bitbang.txrx_bufs = xilinx_spi_txrx_bufs;
xspi->bitbang.master->setup = xilinx_spi_setup;
xspi->bitbang.flags |= SPI_SLAVE;
init_completion(&xspi->done);
xspi->rx_ptr = xspi->slave_rx_buf;
xspi->irq = r_irq->start;
if (!request_mem_region(r_mem->start,
r_mem->end - r_mem->start + 1, XILINX_SPI_NAME)) {
rc = -ENXIO;
dev_warn(&ofdev->dev, "memory request failure\n");
goto put_master;
}
xspi->regs = ioremap(r_mem->start, r_mem->end - r_mem->start + 1);
if (xspi->regs == NULL) {
rc = -ENOMEM;
dev_warn(&ofdev->dev, "ioremap failure\n");
goto release_mem;
}
xspi->irq = r_irq->start;
/* dynamic bus assignment */
master->bus_num = -1;
/* number of slave select bits is required */
prop = of_get_property(ofdev->node, "xlnx,num-ss-bits", &len);
if (!prop || len < sizeof(*prop)) {
dev_warn(&ofdev->dev, "no 'xlnx,num-ss-bits' property\n");
goto unmap_io;
}
master->num_chipselect = *prop;
/* SPI controller initializations */
xspi_init_hw(xspi);
/* Register for SPI Interrupt */
rc = request_irq(xspi->irq, xilinx_spi_irq, 0, XILINX_SPI_NAME, xspi);
if (rc != 0) {
dev_warn(&ofdev->dev, "irq request failure: %d\n", xspi->irq);
goto unmap_io;
}
rc = spi_bitbang_start(&xspi->bitbang);
if (rc != 0) {
dev_err(&ofdev->dev, "spi_bitbang_start FAILED\n");
goto free_irq;
}
dev_info(&ofdev->dev, "at 0x%08X mapped to 0x%08X, irq=%d\n",
(unsigned int)r_mem->start, (u32)xspi->regs, xspi->irq);
/* Add any subnodes on the SPI bus */
of_register_spi_devices(master, ofdev->node);
return rc;
free_irq:
free_irq(xspi->irq, xspi);
unmap_io:
iounmap(xspi->regs);
release_mem:
release_mem_region(r_mem->start, resource_size(r_mem));
put_master:
spi_master_put(master);
return rc;
}
struct sdhci_host *sdhci_pltfm_init(struct platform_device *pdev,
const struct sdhci_pltfm_data *pdata)
{
struct sdhci_host *host;
struct sdhci_pltfm_host *pltfm_host;
struct device_node *np = pdev->dev.of_node;
struct resource *iomem;
int ret;
iomem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
if (!iomem) {
ret = -ENOMEM;
goto err;
}
if (resource_size(iomem) < 0x100)
dev_err(&pdev->dev, "Invalid iomem size!\n");
/* Some PCI-based MFD need the parent here */
if (pdev->dev.parent != &platform_bus && !np)
host = sdhci_alloc_host(pdev->dev.parent, sizeof(*pltfm_host));
else
host = sdhci_alloc_host(&pdev->dev, sizeof(*pltfm_host));
if (IS_ERR(host)) {
ret = PTR_ERR(host);
goto err;
}
pltfm_host = sdhci_priv(host);
host->hw_name = dev_name(&pdev->dev);
if (pdata && pdata->ops)
host->ops = pdata->ops;
else
host->ops = &sdhci_pltfm_ops;
if (pdata)
host->quirks = pdata->quirks;
host->irq = platform_get_irq(pdev, 0);
if (!request_mem_region(iomem->start, resource_size(iomem),
mmc_hostname(host->mmc))) {
dev_err(&pdev->dev, "cannot request region\n");
ret = -EBUSY;
goto err_request;
}
host->ioaddr = ioremap(iomem->start, resource_size(iomem));
if (!host->ioaddr) {
dev_err(&pdev->dev, "failed to remap registers\n");
ret = -ENOMEM;
goto err_remap;
}
platform_set_drvdata(pdev, host);
return host;
err_remap:
release_mem_region(iomem->start, resource_size(iomem));
err_request:
sdhci_free_host(host);
err:
dev_err(&pdev->dev, "%s failed %d\n", __func__, ret);
return ERR_PTR(ret);
}
static int __devinit
ohci_hcd_ppc_of_probe(struct of_device *op, const struct of_device_id *match)
{
struct device_node *dn = op->dev.of_node;
struct usb_hcd *hcd;
struct ohci_hcd *ohci;
struct resource res;
int irq;
int rv;
int is_bigendian;
struct device_node *np;
if (usb_disabled())
return -ENODEV;
is_bigendian =
of_device_is_compatible(dn, "ohci-bigendian") ||
of_device_is_compatible(dn, "ohci-be");
dev_dbg(&op->dev, "initializing PPC-OF USB Controller\n");
rv = of_address_to_resource(dn, 0, &res);
if (rv)
return rv;
hcd = usb_create_hcd(&ohci_ppc_of_hc_driver, &op->dev, "PPC-OF USB");
if (!hcd)
return -ENOMEM;
hcd->rsrc_start = res.start;
hcd->rsrc_len = res.end - res.start + 1;
if (!request_mem_region(hcd->rsrc_start, hcd->rsrc_len, hcd_name)) {
printk(KERN_ERR "%s: request_mem_region failed\n", __FILE__);
rv = -EBUSY;
goto err_rmr;
}
irq = irq_of_parse_and_map(dn, 0);
if (irq == NO_IRQ) {
printk(KERN_ERR "%s: irq_of_parse_and_map failed\n", __FILE__);
rv = -EBUSY;
goto err_irq;
}
hcd->regs = ioremap(hcd->rsrc_start, hcd->rsrc_len);
if (!hcd->regs) {
printk(KERN_ERR "%s: ioremap failed\n", __FILE__);
rv = -ENOMEM;
goto err_ioremap;
}
ohci = hcd_to_ohci(hcd);
if (is_bigendian) {
ohci->flags |= OHCI_QUIRK_BE_MMIO | OHCI_QUIRK_BE_DESC;
if (of_device_is_compatible(dn, "fsl,mpc5200-ohci"))
ohci->flags |= OHCI_QUIRK_FRAME_NO;
if (of_device_is_compatible(dn, "mpc5200-ohci"))
ohci->flags |= OHCI_QUIRK_FRAME_NO;
}
ohci_hcd_init(ohci);
rv = usb_add_hcd(hcd, irq, IRQF_DISABLED);
if (rv == 0)
return 0;
/* by now, 440epx is known to show usb_23 erratum */
np = of_find_compatible_node(NULL, NULL, "ibm,usb-ehci-440epx");
/* Work around - At this point ohci_run has executed, the
* controller is running, everything, the root ports, etc., is
* set up. If the ehci driver is loaded, put the ohci core in
* the suspended state. The ehci driver will bring it out of
* suspended state when / if a non-high speed USB device is
* attached to the USB Host port. If the ehci driver is not
* loaded, do nothing. request_mem_region is used to test if
* the ehci driver is loaded.
*/
if (np != NULL) {
if (!of_address_to_resource(np, 0, &res)) {
if (!request_mem_region(res.start, 0x4, hcd_name)) {
writel_be((readl_be(&ohci->regs->control) |
OHCI_USB_SUSPEND), &ohci->regs->control);
(void) readl_be(&ohci->regs->control);
} else
release_mem_region(res.start, 0x4);
} else
pr_debug("%s: cannot get ehci offset from fdt\n", __FILE__);
}
iounmap(hcd->regs);
err_ioremap:
irq_dispose_mapping(irq);
err_irq:
release_mem_region(hcd->rsrc_start, hcd->rsrc_len);
err_rmr:
usb_put_hcd(hcd);
return rv;
}
static int fimg2d_probe(struct platform_device *pdev)
{
int ret = 0;
struct resource *res;
struct fimg2d_platdata *pdata;
#ifdef CONFIG_OF
struct device *dev = &pdev->dev;
int id = 0;
#else
pdata = to_fimg2d_plat(&pdev->dev);
#endif
dev_info(&pdev->dev, "++%s\n", __func__);
#ifdef CONFIG_OF
if (dev->of_node) {
id = of_alias_get_id(pdev->dev.of_node, "fimg2d");
} else {
id = pdev->id;
pdata = dev->platform_data;
if (!pdata) {
dev_err(&pdev->dev, "no platform data\n");
return -EINVAL;
}
}
#else
if (!to_fimg2d_plat(&pdev->dev)) {
fimg2d_err("failed to get platform data\n");
return -ENOMEM;
}
#endif
/* global structure */
ctrl = kzalloc(sizeof(*ctrl), GFP_KERNEL);
if (!ctrl) {
fimg2d_err("failed to allocate memory for controller\n");
return -ENOMEM;
}
#ifdef CONFIG_OF
pdata = kzalloc(sizeof(*pdata), GFP_KERNEL);
if (!pdata) {
fimg2d_err("failed to allocate memory for controller\n");
kfree(ctrl);
return -ENOMEM;
}
ctrl->pdata = pdata;
g2d_parse_dt(dev->of_node, ctrl->pdata);
#endif
/* setup global ctrl */
ret = fimg2d_setup_controller(ctrl);
if (ret) {
fimg2d_err("failed to setup controller\n");
goto drv_free;
}
ctrl->dev = &pdev->dev;
/* memory region */
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
if (!res) {
fimg2d_err("failed to get resource\n");
ret = -ENOENT;
goto drv_free;
}
ctrl->mem = request_mem_region(res->start, resource_size(res),
pdev->name);
if (!ctrl->mem) {
fimg2d_err("failed to request memory region\n");
ret = -ENOMEM;
goto drv_free;
}
/* ioremap */
ctrl->regs = ioremap(res->start, resource_size(res));
if (!ctrl->regs) {
fimg2d_err("failed to ioremap for SFR\n");
ret = -ENOENT;
goto mem_free;
}
fimg2d_debug("base address: 0x%lx\n", (unsigned long)res->start);
/* irq */
ctrl->irq = platform_get_irq(pdev, 0);
if (!ctrl->irq) {
fimg2d_err("failed to get irq resource\n");
ret = -ENOENT;
goto reg_unmap;
}
fimg2d_debug("irq: %d\n", ctrl->irq);
ret = request_irq(ctrl->irq, fimg2d_irq, IRQF_DISABLED,
pdev->name, ctrl);
if (ret) {
fimg2d_err("failed to request irq\n");
ret = -ENOENT;
goto reg_unmap;
}
ret = fimg2d_clk_setup(ctrl);
if (ret) {
fimg2d_err("failed to setup clk\n");
ret = -ENOENT;
goto irq_free;
}
spin_lock_init(&ctrl->qoslock);
#ifdef CONFIG_PM_RUNTIME
pm_runtime_enable(ctrl->dev);
fimg2d_info("enable runtime pm\n");
#else
fimg2d_clk_on(ctrl);
#endif
#ifdef FIMG2D_IOVMM_PAGETABLE
exynos_create_iovmm(dev, 3, 3);
#endif
iovmm_set_fault_handler(dev, fimg2d_sysmmu_fault_handler, ctrl);
fimg2d_debug("register sysmmu page fault handler\n");
/* misc register */
ret = misc_register(&fimg2d_dev);
if (ret) {
fimg2d_err("failed to register misc driver\n");
goto clk_release;
}
fimg2d_pm_qos_add(ctrl);
dev_info(&pdev->dev, "fimg2d registered successfully\n");
return 0;
clk_release:
#ifdef CONFIG_PM_RUNTIME
pm_runtime_disable(ctrl->dev);
#else
fimg2d_clk_off(ctrl);
#endif
fimg2d_clk_release(ctrl);
irq_free:
free_irq(ctrl->irq, NULL);
reg_unmap:
iounmap(ctrl->regs);
mem_free:
release_mem_region(res->start, resource_size(res));
drv_free:
#ifdef BLIT_WORKQUE
if (ctrl->work_q)
destroy_workqueue(ctrl->work_q);
#endif
mutex_destroy(&ctrl->drvlock);
#ifdef CONFIG_OF
kfree(pdata);
#endif
kfree(ctrl);
return ret;
}
static int omap1_cam_probe(struct platform_device *pdev)
{
struct omap1_cam_dev *pcdev;
struct resource *res;
struct clk *clk;
void __iomem *base;
unsigned int irq;
int err = 0;
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
irq = platform_get_irq(pdev, 0);
if (!res || (int)irq <= 0) {
err = -ENODEV;
goto exit;
}
clk = clk_get(&pdev->dev, "armper_ck");
if (IS_ERR(clk)) {
err = PTR_ERR(clk);
goto exit;
}
pcdev = kzalloc(sizeof(*pcdev) + resource_size(res), GFP_KERNEL);
if (!pcdev) {
dev_err(&pdev->dev, "Could not allocate pcdev\n");
err = -ENOMEM;
goto exit_put_clk;
}
pcdev->res = res;
pcdev->clk = clk;
pcdev->pdata = pdev->dev.platform_data;
if (pcdev->pdata) {
pcdev->pflags = pcdev->pdata->flags;
pcdev->camexclk = pcdev->pdata->camexclk_khz * 1000;
}
switch (pcdev->camexclk) {
case 6000000:
case 8000000:
case 9600000:
case 12000000:
case 24000000:
break;
default:
/* pcdev->camexclk != 0 => pcdev->pdata != NULL */
dev_warn(&pdev->dev,
"Incorrect sensor clock frequency %ld kHz, "
"should be one of 0, 6, 8, 9.6, 12 or 24 MHz, "
"please correct your platform data\n",
pcdev->pdata->camexclk_khz);
pcdev->camexclk = 0;
case 0:
dev_info(&pdev->dev, "Not providing sensor clock\n");
}
INIT_LIST_HEAD(&pcdev->capture);
spin_lock_init(&pcdev->lock);
/*
* Request the region.
*/
if (!request_mem_region(res->start, resource_size(res), DRIVER_NAME)) {
err = -EBUSY;
goto exit_kfree;
}
base = ioremap(res->start, resource_size(res));
if (!base) {
err = -ENOMEM;
goto exit_release;
}
pcdev->irq = irq;
pcdev->base = base;
sensor_reset(pcdev, true);
err = omap_request_dma(OMAP_DMA_CAMERA_IF_RX, DRIVER_NAME,
dma_isr, (void *)pcdev, &pcdev->dma_ch);
if (err < 0) {
dev_err(&pdev->dev, "Can't request DMA for OMAP1 Camera\n");
err = -EBUSY;
goto exit_iounmap;
}
dev_dbg(&pdev->dev, "got DMA channel %d\n", pcdev->dma_ch);
/* preconfigure DMA */
omap_set_dma_src_params(pcdev->dma_ch, OMAP_DMA_PORT_TIPB,
OMAP_DMA_AMODE_CONSTANT, res->start + REG_CAMDATA,
0, 0);
omap_set_dma_dest_burst_mode(pcdev->dma_ch, OMAP_DMA_DATA_BURST_4);
/* setup DMA autoinitialization */
omap_dma_link_lch(pcdev->dma_ch, pcdev->dma_ch);
err = request_irq(pcdev->irq, cam_isr, 0, DRIVER_NAME, pcdev);
if (err) {
dev_err(&pdev->dev, "Camera interrupt register failed\n");
goto exit_free_dma;
}
pcdev->soc_host.drv_name = DRIVER_NAME;
pcdev->soc_host.ops = &omap1_host_ops;
pcdev->soc_host.priv = pcdev;
pcdev->soc_host.v4l2_dev.dev = &pdev->dev;
pcdev->soc_host.nr = pdev->id;
err = soc_camera_host_register(&pcdev->soc_host);
if (err)
goto exit_free_irq;
dev_info(&pdev->dev, "OMAP1 Camera Interface driver loaded\n");
return 0;
exit_free_irq:
free_irq(pcdev->irq, pcdev);
exit_free_dma:
omap_free_dma(pcdev->dma_ch);
exit_iounmap:
iounmap(base);
exit_release:
release_mem_region(res->start, resource_size(res));
exit_kfree:
kfree(pcdev);
exit_put_clk:
clk_put(clk);
exit:
return err;
}
static int s3c_sdi_probe(struct device *dev)
{
struct platform_device* pdev = to_platform_device(dev);
struct mmc_host *mmc;
struct s3c_sdi_host *host;
int ret;
#ifdef CONFIG_S3C2443_EVT1
/* EXTINT0 S3C2443 EVT1 workaround */
u32 tmp;
#endif
mmc = mmc_alloc_host(sizeof(struct s3c_sdi_host), &pdev->dev);
if (!mmc) {
ret = -ENOMEM;
goto probe_out;
}
host = mmc_priv(mmc);
spin_lock_init(&host->complete_lock);
host->complete_what = COMPLETION_NONE;
host->mmc = mmc;
#if CONFIG_MACH_TOMTOMGO
host->irq_cd = IO_GetInterruptNumber(CD_SD);
mmc->removable = 1;
#elif CONFIG_ARCH_S3C2460
host->irq_cd = IRQ_EINT3;
#elif defined(CONFIG_MACH_SMDK2443)
host->irq_cd = IRQ_EINT1;
#elif defined(CONFIG_ARCH_MDIRAC3)
host->subchannel =S3C_DMA3_SDMMC;
// host->irq_cd = IRQ_EINT7;
#elif defined CONFIG_ARCH_S3C2412
host->irq_cd = IRQ_EINT18;
#endif
host->dma = S3C_SDI_DMA;
host->mem = platform_get_resource(pdev, IORESOURCE_MEM ,0);
if (!host->mem) {
printk("failed to get io memory region resource.\n");
ret = -ENOENT;
goto probe_free_host;
}
host->mem = request_mem_region(host->mem->start,
RESSIZE(host->mem), pdev->name);
if (!host->mem) {
printk("failed to request io memory region.\n");
ret = -ENOENT;
goto probe_free_host;
}
/* if there is an error here, check your SoC dependent code.
* You must have iotable that contains SDI in it.
* by scsuh.
*/
host->base = S3C24XX_VA_SDI;
host->irq = platform_get_irq(pdev, 0);
if (host->irq == 0) {
printk("failed to get interrupt resouce.\n");
ret = -EINVAL;
goto release_memory;
}
if (request_irq(host->irq, s3c_sdi_irq, 0, DRIVER_NAME, host)) {
printk("failed to request sdi interrupt.\n");
ret = -ENOENT;
goto release_memory;
}
#if defined(CONFIG_MACH_SMDK2443)
#ifdef CONFIG_S3C2443_EVT1
/* EXTINT0 S3C2443 EVT1 workaround */
tmp = __raw_readl(S3C_EXTINT0);
s3c_swap_4bit(tmp);
__raw_writel(tmp | (1<<7), S3C_EXTINT0);
#endif
s3c_gpio_cfgpin(S3C_GPF1, S3C_GPF1_EINT1);
#elif defined(CONFIG_ARCH_S3C2460)
s3c_gpio_cfgpin(S3C_GPJ3, S3C_GPJ3_EXT_INT3);
#elif defined CONFIG_ARCH_S3C2412
s3c_gpio_cfgpin(S3C_GPG10, S3C_GPG10_EINT18);
#elif defined CONFIG_ARCH_MDIRAC3
;
#endif
#ifdef CONFIG_ARCH_MDIRAC3
if (s3c_dma_request(host->dma,host->subchannel, &s3c_sdi_dma_client,NULL)) {
printk("unable to get DMA channel.\n" );
ret = -EBUSY;
goto probe_free_irq_cd;
}
#else
INIT_WORK( &host->irq_cd_wq, s3c24xx_irq_cd_handler, mmc );
set_irq_type(host->irq_cd, IRQT_BOTHEDGE);
if (host->irq_cd > 0) {
if (request_irq(host->irq_cd, s3c_sdi_irq_cd, SA_INTERRUPT, DRIVER_NAME, host)) {
printk("failed to request card detect interrupt.\n" );
ret = -ENOENT;
goto probe_free_irq;
}
}
if (s3c_dma_request(S3C_SDI_DMA, &s3c_sdi_dma_client, NULL)) {
printk("unable to get DMA channel.\n" );
ret = -EBUSY;
goto probe_free_irq_cd;
}
#endif
host->clk = clk_get(&pdev->dev, "sdi");
if (IS_ERR(host->clk)) {
printk("failed to find clock source.\n");
ret = PTR_ERR(host->clk);
host->clk = NULL;
goto probe_free_host;
}
if ((ret = clk_enable(host->clk))) {
printk("failed to enable clock source.\n");
goto clk_free;
}
mmc->ops = &s3c_sdi_ops;
mmc->ocr_avail = MMC_VDD_32_33|MMC_VDD_33_34;
mmc->f_min = clk_get_rate(host->clk) / 512;
/* you must make sure that our sdmmc block can support
* up to 25MHz. by scsuh
*/
mmc->f_max = 25 * MHZ;
mmc->caps = MMC_CAP_4_BIT_DATA;
/*
* Since we only have a 16-bit data length register, we must
* ensure that we don't exceed 2^16-1 bytes in a single request.
*/
mmc->max_req_size = 65535;
/*
* Set the maximum segment size. Since we aren't doing DMA
* (yet) we are only limited by the data length register.
*/
mmc->max_seg_size = mmc->max_req_size;
/*
* Both block size and block count use 12 bit registers.
*/
mmc->max_blk_size = 4095;
mmc->max_blk_count = 4095;
printk(KERN_INFO PFX "probe: mapped sdi_base=%p irq=%u irq_cd=%u dma=%u.\n",
host->base, host->irq, host->irq_cd, host->dma);
platform_set_drvdata(pdev, mmc);
init_timer(&host->timer);
host->timer.data = (unsigned long)host;
host->timer.function = s3c_sdi_check_status;
host->timer.expires = jiffies + HZ;
host->ena_2410_workaround=(IO_GetCpuType( ) == GOCPU_S3C2410);
if ((ret = mmc_add_host(mmc))) {
printk(KERN_INFO PFX "failed to add mmc host.\n");
goto free_dmabuf;
}
/* Do CPUFREQ registration. */
#if defined CONFIG_CPU_FREQ && defined CONFIG_S3C24XX_DFS_CPUFREQ
host->freq_transition.notifier_call = s3c24xxsdi_freq_transition;
host->freq_transition.priority = CPUFREQ_ORDER_S3C24XX_SDCARD_PRIO;
host->freq_policy.notifier_call = s3c24xxsdi_freq_policy;
cpufreq_register_notifier(&host->freq_transition, CPUFREQ_TRANSITION_NOTIFIER);
cpufreq_register_notifier(&host->freq_policy, CPUFREQ_POLICY_NOTIFIER);
#endif
printk(KERN_INFO PFX "initialization done.\n");
return 0;
free_dmabuf:
clk_disable(host->clk);
clk_free:
clk_put(host->clk);
probe_free_irq_cd:
#ifndef CONFIG_ARCH_MDIRAC3
free_irq(host->irq_cd, host);
#endif
probe_free_irq:
free_irq(host->irq, host);
release_memory:
release_mem_region(host->mem->start, RESSIZE(host->mem));
probe_free_host:
mmc_free_host(mmc);
probe_out:
return ret;
}
static int rockchip_spi_probe(struct platform_device *pdev)
{
struct resource *mem_res;
struct rockchip_spi_driver_data *sdd;
struct rockchip_spi_info *info = pdev->dev.platform_data;
struct dw_spi *dws;
int ret, irq;
char clk_name[16];
if (!info && pdev->dev.of_node) {
info = rockchip_spi_parse_dt(&pdev->dev);
if (IS_ERR(info))
return PTR_ERR(info);
}
if (!info) {
dev_err(&pdev->dev, "platform_data missing!\n");
return -ENODEV;
}
sdd = kzalloc(sizeof(struct rockchip_spi_driver_data), GFP_KERNEL);
if (!sdd) {
ret = -ENOMEM;
goto err_kfree;
}
sdd->pdev = pdev;
sdd->info = info;
dws = &sdd->dws;
atomic_set(&dws->debug_flag, 0);//debug flag
/* Get basic io resource and map it */
irq = platform_get_irq(pdev, 0);
if (irq < 0) {
dev_warn(&pdev->dev, "Failed to get IRQ: %d\n", irq);
return irq;
}
mem_res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
if (mem_res == NULL) {
dev_err(&pdev->dev, "Unable to get SPI MEM resource\n");
ret = -ENXIO;
goto err_unmap;
}
dws->regs = ioremap(mem_res->start, (mem_res->end - mem_res->start) + 1);
if (!dws->regs){
ret = -EBUSY;
goto err_unmap;
}
dws->paddr = mem_res->start;
dws->iolen = (mem_res->end - mem_res->start) + 1;
printk(KERN_INFO "dws->regs: %p\n", dws->regs);
//get bus num
if (pdev->dev.of_node) {
ret = of_alias_get_id(pdev->dev.of_node, "spi");
if (ret < 0) {
dev_err(&pdev->dev, "failed to get alias id, errno %d\n",
ret);
goto err_release_mem;
}
info->bus_num = ret;
} else {
info->bus_num = pdev->id;
}
/* Setup clocks */
sdd->clk_spi = devm_clk_get(&pdev->dev, "spi");
if (IS_ERR(sdd->clk_spi)) {
dev_err(&pdev->dev, "Unable to acquire clock 'spi'\n");
ret = PTR_ERR(sdd->clk_spi);
goto err_clk;
}
if (clk_prepare_enable(sdd->clk_spi)) {
dev_err(&pdev->dev, "Couldn't enable clock 'spi'\n");
ret = -EBUSY;
goto err_clk;
}
sprintf(clk_name, "pclk_spi%d", info->src_clk_nr);
sdd->pclk_spi = devm_clk_get(&pdev->dev, clk_name);
if (IS_ERR(sdd->pclk_spi)) {
dev_err(&pdev->dev,
"Unable to acquire clock '%s'\n", clk_name);
ret = PTR_ERR(sdd->pclk_spi);
goto err_pclk;
}
if (clk_prepare_enable(sdd->pclk_spi)) {
dev_err(&pdev->dev, "Couldn't enable clock '%s'\n", clk_name);
ret = -EBUSY;
goto err_pclk;
}
clk_set_rate(sdd->clk_spi, info->spi_freq);
dws->max_freq = clk_get_rate(sdd->clk_spi);
dws->parent_dev = &pdev->dev;
dws->bus_num = info->bus_num;
dws->num_cs = info->num_cs;
dws->irq = irq;
dws->clk_spi = sdd->clk_spi;
dws->pclk_spi = sdd->pclk_spi;
/*
* handling for rockchip paltforms, like dma setup,
* clock rate, FIFO depth.
*/
#ifdef CONFIG_SPI_ROCKCHIP_DMA
ret = dw_spi_dma_init(dws);
if (ret)
printk("%s:fail to init dma\n",__func__);
#endif
ret = dw_spi_add_host(dws);
if (ret)
goto err_release_mem;
platform_set_drvdata(pdev, sdd);
printk("%s:num_cs=%d,bus_num=%d,irq=%d,freq=%d ok\n",__func__, info->num_cs, info->bus_num, irq, dws->max_freq);
return 0;
err_release_mem:
release_mem_region(mem_res->start, (mem_res->end - mem_res->start) + 1);
err_pclk:
clk_disable_unprepare(sdd->pclk_spi);
err_clk:
clk_disable_unprepare(sdd->clk_spi);
err_unmap:
iounmap(dws->regs);
err_kfree:
kfree(sdd);
return ret;
}
static int msm_iommu_probe(struct platform_device *pdev)
{
struct resource *r, *r2;
struct clk *iommu_clk;
struct clk *iommu_pclk;
struct msm_iommu_drvdata *drvdata;
struct msm_iommu_dev *iommu_dev = pdev->dev.platform_data;
void __iomem *regs_base;
resource_size_t len;
int ret, irq, par;
if (pdev->id == -1) {
msm_iommu_root_dev = pdev;
return 0;
}
drvdata = kzalloc(sizeof(*drvdata), GFP_KERNEL);
if (!drvdata) {
ret = -ENOMEM;
goto fail;
}
if (!iommu_dev) {
ret = -ENODEV;
goto fail;
}
iommu_pclk = clk_get(NULL, "smmu_pclk");
if (IS_ERR(iommu_pclk)) {
ret = -ENODEV;
goto fail;
}
ret = clk_prepare_enable(iommu_pclk);
if (ret)
goto fail_enable;
iommu_clk = clk_get(&pdev->dev, "iommu_clk");
if (!IS_ERR(iommu_clk)) {
if (clk_get_rate(iommu_clk) == 0)
clk_set_rate(iommu_clk, 1);
ret = clk_prepare_enable(iommu_clk);
if (ret) {
clk_put(iommu_clk);
goto fail_pclk;
}
} else
iommu_clk = NULL;
r = platform_get_resource_byname(pdev, IORESOURCE_MEM, "physbase");
if (!r) {
ret = -ENODEV;
goto fail_clk;
}
len = resource_size(r);
r2 = request_mem_region(r->start, len, r->name);
if (!r2) {
pr_err("Could not request memory region: start=%p, len=%d\n",
(void *) r->start, len);
ret = -EBUSY;
goto fail_clk;
}
regs_base = ioremap(r2->start, len);
if (!regs_base) {
pr_err("Could not ioremap: start=%p, len=%d\n",
(void *) r2->start, len);
ret = -EBUSY;
goto fail_mem;
}
irq = platform_get_irq_byname(pdev, "secure_irq");
if (irq < 0) {
ret = -ENODEV;
goto fail_io;
}
msm_iommu_reset(regs_base, iommu_dev->ncb);
SET_M(regs_base, 0, 1);
SET_PAR(regs_base, 0, 0);
SET_V2PCFG(regs_base, 0, 1);
SET_V2PPR(regs_base, 0, 0);
par = GET_PAR(regs_base, 0);
SET_V2PCFG(regs_base, 0, 0);
SET_M(regs_base, 0, 0);
if (!par) {
pr_err("%s: Invalid PAR value detected\n", iommu_dev->name);
ret = -ENODEV;
goto fail_io;
}
ret = request_irq(irq, msm_iommu_fault_handler, 0,
"msm_iommu_secure_irpt_handler", drvdata);
if (ret) {
pr_err("Request IRQ %d failed with ret=%d\n", irq, ret);
goto fail_io;
}
drvdata->pclk = iommu_pclk;
drvdata->clk = iommu_clk;
drvdata->base = regs_base;
drvdata->irq = irq;
drvdata->ncb = iommu_dev->ncb;
pr_info("device %s mapped at %p, irq %d with %d ctx banks\n",
iommu_dev->name, regs_base, irq, iommu_dev->ncb);
platform_set_drvdata(pdev, drvdata);
if (iommu_clk)
clk_disable(iommu_clk);
clk_disable(iommu_pclk);
return 0;
fail_io:
iounmap(regs_base);
fail_mem:
release_mem_region(r->start, len);
fail_clk:
if (iommu_clk) {
clk_disable(iommu_clk);
clk_put(iommu_clk);
}
fail_pclk:
clk_disable_unprepare(iommu_pclk);
fail_enable:
clk_put(iommu_pclk);
fail:
kfree(drvdata);
return ret;
}
/*
* camif_init()
*/
static int __init camif_init(void)
{
int ret;
struct s3c2440camif_dev * pdev;
struct clk * camif_upll_clk;
printk(KERN_ALERT"initializing s3c2440 camera interface......\n");
pdev = &camera;
/* set gpio-j to camera mode. */
s3c2410_gpio_cfgpin(S3C2440_GPJ0, S3C2440_GPJ0_CAMDATA0);
s3c2410_gpio_cfgpin(S3C2440_GPJ1, S3C2440_GPJ1_CAMDATA1);
s3c2410_gpio_cfgpin(S3C2440_GPJ2, S3C2440_GPJ2_CAMDATA2);
s3c2410_gpio_cfgpin(S3C2440_GPJ3, S3C2440_GPJ3_CAMDATA3);
s3c2410_gpio_cfgpin(S3C2440_GPJ4, S3C2440_GPJ4_CAMDATA4);
s3c2410_gpio_cfgpin(S3C2440_GPJ5, S3C2440_GPJ5_CAMDATA5);
s3c2410_gpio_cfgpin(S3C2440_GPJ6, S3C2440_GPJ6_CAMDATA6);
s3c2410_gpio_cfgpin(S3C2440_GPJ7, S3C2440_GPJ7_CAMDATA7);
s3c2410_gpio_cfgpin(S3C2440_GPJ8, S3C2440_GPJ8_CAMPCLK);
s3c2410_gpio_cfgpin(S3C2440_GPJ9, S3C2440_GPJ9_CAMVSYNC);
s3c2410_gpio_cfgpin(S3C2440_GPJ10, S3C2440_GPJ10_CAMHREF);
s3c2410_gpio_cfgpin(S3C2440_GPJ11, S3C2440_GPJ11_CAMCLKOUT);
s3c2410_gpio_cfgpin(S3C2440_GPJ12, S3C2440_GPJ12_CAMRESET);
/* init camera's virtual memory. */
if (!request_mem_region((unsigned long)S3C2440_PA_CAMIF, S3C2440_SZ_CAMIF, CARD_NAME))
{
ret = -EBUSY;
goto error1;
}
/* remap the virtual memory. */
camif_base_addr = (unsigned long)ioremap_nocache((unsigned long)S3C2440_PA_CAMIF, S3C2440_SZ_CAMIF);
if (camif_base_addr == (unsigned long)NULL)
{
ret = -EBUSY;
goto error2;
}
/* init camera clock. */
pdev->clk = clk_get(NULL, "camif");
if (IS_ERR(pdev->clk))
{
ret = -ENOENT;
goto error3;
}
clk_enable(pdev->clk);
camif_upll_clk = clk_get(NULL, "camif-upll");
clk_set_rate(camif_upll_clk, 24000000);
mdelay(100);
/* init reference counter and its mutex. */
mutex_init(&pdev->rcmutex);
pdev->rc = 0;
/* init image input source. */
pdev->input = 0;
/* init camif state and its lock. */
pdev->state = CAMIF_STATE_FREE;
/* init command code, command lock and the command wait queue. */
pdev->cmdcode = CAMIF_CMD_NONE;
init_waitqueue_head(&pdev->cmdqueue);
/* register to videodev layer. */
if (misc_register(&misc) < 0)
{
ret = -EBUSY;
goto error4;
}
printk(KERN_ALERT"s3c2440 camif init done\n");
sccb_init();
hw_reset_camif();
has_ov9650 = s3c2440_ov9650_init() >= 0;
s3c2410_gpio_setpin(S3C2410_GPG(4), 1);
return 0;
error4:
clk_put(pdev->clk);
error3:
iounmap((void *)camif_base_addr);
error2:
release_mem_region((unsigned long)S3C2440_PA_CAMIF, S3C2440_SZ_CAMIF);
error1:
return ret;
}
static int __devinit jz4740_i2s_dev_probe(struct platform_device *pdev)
{
struct jz4740_i2s *i2s;
int ret;
i2s = kzalloc(sizeof(*i2s), GFP_KERNEL);
if (!i2s)
return -ENOMEM;
i2s->mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
if (!i2s->mem) {
ret = -ENOENT;
goto err_free;
}
i2s->mem = request_mem_region(i2s->mem->start, resource_size(i2s->mem),
pdev->name);
if (!i2s->mem) {
ret = -EBUSY;
goto err_free;
}
i2s->base = ioremap_nocache(i2s->mem->start, resource_size(i2s->mem));
if (!i2s->base) {
ret = -EBUSY;
goto err_release_mem_region;
}
i2s->phys_base = i2s->mem->start;
i2s->clk_aic = clk_get(&pdev->dev, "aic");
if (IS_ERR(i2s->clk_aic)) {
ret = PTR_ERR(i2s->clk_aic);
goto err_iounmap;
}
i2s->clk_i2s = clk_get(&pdev->dev, "i2s");
if (IS_ERR(i2s->clk_i2s)) {
ret = PTR_ERR(i2s->clk_i2s);
goto err_clk_put_aic;
}
platform_set_drvdata(pdev, i2s);
ret = snd_soc_register_dai(&pdev->dev, &jz4740_i2s_dai);
if (ret) {
dev_err(&pdev->dev, "Failed to register DAI\n");
goto err_clk_put_i2s;
}
return 0;
err_clk_put_i2s:
clk_put(i2s->clk_i2s);
err_clk_put_aic:
clk_put(i2s->clk_aic);
err_iounmap:
iounmap(i2s->base);
err_release_mem_region:
release_mem_region(i2s->mem->start, resource_size(i2s->mem));
err_free:
kfree(i2s);
return ret;
}
void mgag200_device_fini(struct mga_device *mdev)
{
release_mem_region(mdev->rmmio_base, mdev->rmmio_size);
mga_vram_fini(mdev);
}
static int __devinit c67x00_drv_probe(struct platform_device *pdev)
{
struct c67x00_device *c67x00;
struct c67x00_platform_data *pdata;
struct resource *res, *res2;
int ret, i;
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
if (!res)
return -ENODEV;
res2 = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
if (!res2)
return -ENODEV;
pdata = pdev->dev.platform_data;
if (!pdata)
return -ENODEV;
c67x00 = kzalloc(sizeof(*c67x00), GFP_KERNEL);
if (!c67x00)
return -ENOMEM;
if (!request_mem_region(res->start, res->end - res->start + 1,
pdev->name)) {
dev_err(&pdev->dev, "Memory region busy\n");
ret = -EBUSY;
goto request_mem_failed;
}
c67x00->hpi.base = ioremap(res->start, res->end - res->start + 1);
if (!c67x00->hpi.base) {
dev_err(&pdev->dev, "Unable to map HPI registers\n");
ret = -EIO;
goto map_failed;
}
spin_lock_init(&c67x00->hpi.lock);
c67x00->hpi.regstep = pdata->hpi_regstep;
c67x00->pdata = pdev->dev.platform_data;
c67x00->pdev = pdev;
c67x00_ll_init(c67x00);
c67x00_ll_hpi_reg_init(c67x00);
ret = request_irq(res2->start, c67x00_irq, 0, pdev->name, c67x00);
if (ret) {
dev_err(&pdev->dev, "Cannot claim IRQ\n");
goto request_irq_failed;
}
ret = c67x00_ll_reset(c67x00);
if (ret) {
dev_err(&pdev->dev, "Device reset failed\n");
goto reset_failed;
}
for (i = 0; i < C67X00_SIES; i++)
c67x00_probe_sie(&c67x00->sie[i], c67x00, i);
platform_set_drvdata(pdev, c67x00);
return 0;
reset_failed:
free_irq(res2->start, c67x00);
request_irq_failed:
iounmap(c67x00->hpi.base);
map_failed:
release_mem_region(res->start, res->end - res->start + 1);
request_mem_failed:
kfree(c67x00);
return ret;
}
static long sp5100_tco_ioctl(struct file *file, unsigned int cmd,
unsigned long arg)
{
int new_options, retval = -EINVAL;
int new_heartbeat;
void __user *argp = (void __user *)arg;
int __user *p = argp;
static const struct watchdog_info ident = {
.options = WDIOF_SETTIMEOUT |
WDIOF_KEEPALIVEPING |
WDIOF_MAGICCLOSE,
.firmware_version = 0,
.identity = TCO_MODULE_NAME,
};
switch (cmd) {
case WDIOC_GETSUPPORT:
return copy_to_user(argp, &ident,
sizeof(ident)) ? -EFAULT : 0;
case WDIOC_GETSTATUS:
case WDIOC_GETBOOTSTATUS:
return put_user(0, p);
case WDIOC_SETOPTIONS:
if (get_user(new_options, p))
return -EFAULT;
if (new_options & WDIOS_DISABLECARD) {
tco_timer_stop();
retval = 0;
}
if (new_options & WDIOS_ENABLECARD) {
tco_timer_start();
tco_timer_keepalive();
retval = 0;
}
return retval;
case WDIOC_KEEPALIVE:
tco_timer_keepalive();
return 0;
case WDIOC_SETTIMEOUT:
if (get_user(new_heartbeat, p))
return -EFAULT;
if (tco_timer_set_heartbeat(new_heartbeat))
return -EINVAL;
tco_timer_keepalive();
/* Fall through */
case WDIOC_GETTIMEOUT:
return put_user(heartbeat, p);
default:
return -ENOTTY;
}
}
/*
* Kernel Interfaces
*/
static const struct file_operations sp5100_tco_fops = {
.owner = THIS_MODULE,
.llseek = no_llseek,
.write = sp5100_tco_write,
.unlocked_ioctl = sp5100_tco_ioctl,
.open = sp5100_tco_open,
.release = sp5100_tco_release,
};
static struct miscdevice sp5100_tco_miscdev = {
.minor = WATCHDOG_MINOR,
.name = "watchdog",
.fops = &sp5100_tco_fops,
};
/*
* Data for PCI driver interface
*
* This data only exists for exporting the supported
* PCI ids via MODULE_DEVICE_TABLE. We do not actually
* register a pci_driver, because someone else might
* want to register another driver on the same PCI id.
*/
static DEFINE_PCI_DEVICE_TABLE(sp5100_tco_pci_tbl) = {
{ PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_SBX00_SMBUS, PCI_ANY_ID,
PCI_ANY_ID, },
{ 0, }, /* End of list */
};
MODULE_DEVICE_TABLE(pci, sp5100_tco_pci_tbl);
/*
* Init & exit routines
*/
static unsigned char __devinit sp5100_tco_setupdevice(void)
{
struct pci_dev *dev = NULL;
u32 val;
/* Match the PCI device */
for_each_pci_dev(dev) {
if (pci_match_id(sp5100_tco_pci_tbl, dev) != NULL) {
sp5100_tco_pci = dev;
break;
}
}
if (!sp5100_tco_pci)
return 0;
/* Request the IO ports used by this driver */
pm_iobase = SP5100_IO_PM_INDEX_REG;
if (!request_region(pm_iobase, SP5100_PM_IOPORTS_SIZE, "SP5100 TCO")) {
printk(KERN_ERR PFX "I/O address 0x%04x already in use\n",
pm_iobase);
goto exit;
}
/* Find the watchdog base address. */
outb(SP5100_PM_WATCHDOG_BASE3, SP5100_IO_PM_INDEX_REG);
val = inb(SP5100_IO_PM_DATA_REG);
outb(SP5100_PM_WATCHDOG_BASE2, SP5100_IO_PM_INDEX_REG);
val = val << 8 | inb(SP5100_IO_PM_DATA_REG);
outb(SP5100_PM_WATCHDOG_BASE1, SP5100_IO_PM_INDEX_REG);
val = val << 8 | inb(SP5100_IO_PM_DATA_REG);
outb(SP5100_PM_WATCHDOG_BASE0, SP5100_IO_PM_INDEX_REG);
/* Low three bits of BASE0 are reserved. */
val = val << 8 | (inb(SP5100_IO_PM_DATA_REG) & 0xf8);
if (!request_mem_region_exclusive(val, SP5100_WDT_MEM_MAP_SIZE,
"SP5100 TCO")) {
printk(KERN_ERR PFX "mmio address 0x%04x already in use\n",
val);
goto unreg_region;
}
tcobase_phys = val;
tcobase = ioremap(val, SP5100_WDT_MEM_MAP_SIZE);
if (tcobase == 0) {
printk(KERN_ERR PFX "failed to get tcobase address\n");
goto unreg_mem_region;
}
/* Enable watchdog decode bit */
pci_read_config_dword(sp5100_tco_pci,
SP5100_PCI_WATCHDOG_MISC_REG,
&val);
val |= SP5100_PCI_WATCHDOG_DECODE_EN;
pci_write_config_dword(sp5100_tco_pci,
SP5100_PCI_WATCHDOG_MISC_REG,
val);
/* Enable Watchdog timer and set the resolution to 1 sec. */
outb(SP5100_PM_WATCHDOG_CONTROL, SP5100_IO_PM_INDEX_REG);
val = inb(SP5100_IO_PM_DATA_REG);
val |= SP5100_PM_WATCHDOG_SECOND_RES;
val &= ~SP5100_PM_WATCHDOG_DISABLE;
outb(val, SP5100_IO_PM_DATA_REG);
/* Check that the watchdog action is set to reset the system. */
val = readl(SP5100_WDT_CONTROL(tcobase));
val &= ~SP5100_PM_WATCHDOG_ACTION_RESET;
writel(val, SP5100_WDT_CONTROL(tcobase));
/* Set a reasonable heartbeat before we stop the timer */
tco_timer_set_heartbeat(heartbeat);
/*
* Stop the TCO before we change anything so we don't race with
* a zeroed timer.
*/
tco_timer_stop();
/* Done */
return 1;
unreg_mem_region:
release_mem_region(tcobase_phys, SP5100_WDT_MEM_MAP_SIZE);
unreg_region:
release_region(pm_iobase, SP5100_PM_IOPORTS_SIZE);
exit:
return 0;
}
static int __devinit sp5100_tco_init(struct platform_device *dev)
{
int ret;
u32 val;
/* Check whether or not the hardware watchdog is there. If found, then
* set it up.
*/
if (!sp5100_tco_setupdevice())
return -ENODEV;
/* Check to see if last reboot was due to watchdog timeout */
printk(KERN_INFO PFX "Watchdog reboot %sdetected.\n",
readl(SP5100_WDT_CONTROL(tcobase)) & SP5100_PM_WATCHDOG_FIRED ?
"" : "not ");
/* Clear out the old status */
val = readl(SP5100_WDT_CONTROL(tcobase));
val &= ~SP5100_PM_WATCHDOG_FIRED;
writel(val, SP5100_WDT_CONTROL(tcobase));
/*
* Check that the heartbeat value is within it's range.
* If not, reset to the default.
*/
if (tco_timer_set_heartbeat(heartbeat)) {
heartbeat = WATCHDOG_HEARTBEAT;
tco_timer_set_heartbeat(heartbeat);
}
ret = misc_register(&sp5100_tco_miscdev);
if (ret != 0) {
printk(KERN_ERR PFX "cannot register miscdev on minor="
"%d (err=%d)\n",
WATCHDOG_MINOR, ret);
goto exit;
}
clear_bit(0, &timer_alive);
printk(KERN_INFO PFX "initialized (0x%p). heartbeat=%d sec"
" (nowayout=%d)\n",
tcobase, heartbeat, nowayout);
return 0;
exit:
iounmap(tcobase);
release_mem_region(tcobase_phys, SP5100_WDT_MEM_MAP_SIZE);
release_region(pm_iobase, SP5100_PM_IOPORTS_SIZE);
return ret;
}
static void __devexit sp5100_tco_cleanup(void)
{
/* Stop the timer before we leave */
if (!nowayout)
tco_timer_stop();
/* Deregister */
misc_deregister(&sp5100_tco_miscdev);
iounmap(tcobase);
release_mem_region(tcobase_phys, SP5100_WDT_MEM_MAP_SIZE);
release_region(pm_iobase, SP5100_PM_IOPORTS_SIZE);
}
static int __devexit sp5100_tco_remove(struct platform_device *dev)
{
if (tcobase)
sp5100_tco_cleanup();
return 0;
}
static void sp5100_tco_shutdown(struct platform_device *dev)
{
tco_timer_stop();
}
static struct platform_driver sp5100_tco_driver = {
.probe = sp5100_tco_init,
.remove = __devexit_p(sp5100_tco_remove),
.shutdown = sp5100_tco_shutdown,
.driver = {
.owner = THIS_MODULE,
.name = TCO_MODULE_NAME,
},
};
static int __init sp5100_tco_init_module(void)
{
int err;
printk(KERN_INFO PFX "SP5100 TCO WatchDog Timer Driver v%s\n",
TCO_VERSION);
err = platform_driver_register(&sp5100_tco_driver);
if (err)
return err;
sp5100_tco_platform_device = platform_device_register_simple(
TCO_MODULE_NAME, -1, NULL, 0);
if (IS_ERR(sp5100_tco_platform_device)) {
err = PTR_ERR(sp5100_tco_platform_device);
goto unreg_platform_driver;
}
return 0;
unreg_platform_driver:
platform_driver_unregister(&sp5100_tco_driver);
return err;
}
static int __devinit octeon_i2c_probe(struct platform_device *pdev)
{
int irq, result = 0;
struct octeon_i2c *i2c;
struct octeon_i2c_data *i2c_data;
struct resource *res_mem;
/* All adaptors have an irq. */
irq = platform_get_irq(pdev, 0);
if (irq < 0)
return irq;
i2c = kzalloc(sizeof(*i2c), GFP_KERNEL);
if (!i2c) {
dev_err(&pdev->dev, "kzalloc failed\n");
result = -ENOMEM;
goto out;
}
i2c->dev = &pdev->dev;
i2c_data = pdev->dev.platform_data;
res_mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
if (res_mem == NULL) {
dev_err(i2c->dev, "found no memory resource\n");
result = -ENXIO;
goto fail_region;
}
if (i2c_data == NULL) {
dev_err(i2c->dev, "no I2C frequency data\n");
result = -ENXIO;
goto fail_region;
}
i2c->twsi_phys = res_mem->start;
i2c->regsize = resource_size(res_mem);
i2c->twsi_freq = i2c_data->i2c_freq;
i2c->sys_freq = i2c_data->sys_freq;
if (!request_mem_region(i2c->twsi_phys, i2c->regsize, res_mem->name)) {
dev_err(i2c->dev, "request_mem_region failed\n");
goto fail_region;
}
i2c->twsi_base = ioremap(i2c->twsi_phys, i2c->regsize);
init_waitqueue_head(&i2c->queue);
i2c->irq = irq;
result = request_irq(i2c->irq, octeon_i2c_isr, 0, DRV_NAME, i2c);
if (result < 0) {
dev_err(i2c->dev, "failed to attach interrupt\n");
goto fail_irq;
}
result = octeon_i2c_initlowlevel(i2c);
if (result) {
dev_err(i2c->dev, "init low level failed\n");
goto fail_add;
}
result = octeon_i2c_setclock(i2c);
if (result) {
dev_err(i2c->dev, "clock init failed\n");
goto fail_add;
}
i2c->adap = octeon_i2c_ops;
i2c->adap.dev.parent = &pdev->dev;
i2c->adap.nr = pdev->id >= 0 ? pdev->id : 0;
i2c_set_adapdata(&i2c->adap, i2c);
platform_set_drvdata(pdev, i2c);
result = i2c_add_numbered_adapter(&i2c->adap);
if (result < 0) {
dev_err(i2c->dev, "failed to add adapter\n");
goto fail_add;
}
dev_info(i2c->dev, "version %s\n", DRV_VERSION);
return result;
fail_add:
platform_set_drvdata(pdev, NULL);
free_irq(i2c->irq, i2c);
fail_irq:
iounmap(i2c->twsi_base);
release_mem_region(i2c->twsi_phys, i2c->regsize);
fail_region:
kfree(i2c);
out:
return result;
};
static int serial_omap_probe(struct platform_device *pdev)
{
struct uart_omap_port *up;
struct resource *mem, *irq;
int ret = -ENOSPC;
char str[7];
mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
if (!mem) {
dev_err(&pdev->dev, "no mem resource?\n");
return -ENODEV;
}
irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
if (!irq) {
dev_err(&pdev->dev, "no irq resource?\n");
return -ENODEV;
}
ret = (int) request_mem_region(mem->start, (mem->end - mem->start) + 1,
pdev->dev.driver->name);
if (!ret) {
dev_err(&pdev->dev, "memory region already claimed\n");
return -EBUSY;
}
up = kzalloc(sizeof(*up), GFP_KERNEL);
if (up == NULL) {
ret = -ENOMEM;
goto do_release_region;
}
sprintf(up->name, "OMAP UART%d", pdev->id);
up->pdev = pdev;
up->port.dev = &pdev->dev;
up->port.type = PORT_OMAP;
up->port.iotype = UPIO_MEM;
up->port.mapbase = mem->start;
up->port.irq = irq->start;
up->port.fifosize = 64;
up->port.ops = &serial_omap_pops;
up->port.line = line++;
#define QUART_CLK (1843200)
if (pdev->id == 4) {
up->port.membase = ioremap_nocache(mem->start, 0x16 << 1);
up->port.flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP |
UPF_SHARE_IRQ;
up->port.uartclk = QUART_CLK;
up->port.regshift = 1;
} else {
up->port.membase = (void *) io_p2v(mem->start);
up->port.flags = UPF_BOOT_AUTOCONF;
up->port.uartclk = 48000000;
up->port.regshift = 2;
}
if (pdev->id == (UART1+1)) {
#ifdef CONFIG_SERIAL_OMAP_DMA_UART1
up->use_dma = 1;
up->uart_dma.rx_buf_size =
CONFIG_SERIAL_OMAP_UART1_RXDMA_BUFSIZE;
up->uart_dma.rx_timeout =
CONFIG_SERIAL_OMAP_UART1_RXDMA_TIMEOUT;
#endif
} else if (pdev->id == (UART2+1)) {
#ifdef CONFIG_SERIAL_OMAP_DMA_UART2
up->use_dma = 1;
up->uart_dma.rx_buf_size =
CONFIG_SERIAL_OMAP_UART2_RXDMA_BUFSIZE;
up->uart_dma.rx_timeout =
CONFIG_SERIAL_OMAP_UART2_RXDMA_TIMEOUT;
#endif
} else if (pdev->id == (UART3+1)) {
#ifdef CONFIG_SERIAL_OMAP_DMA_UART3
up->use_dma = 1;
up->uart_dma.rx_buf_size =
CONFIG_SERIAL_OMAP_UART3_RXDMA_BUFSIZE;
up->uart_dma.rx_timeout =
CONFIG_SERIAL_OMAP_UART3_RXDMA_TIMEOUT;
#endif
}
if (up->use_dma) {
spin_lock_init(&(up->uart_dma.tx_lock));
spin_lock_init(&(up->uart_dma.rx_lock));
up->uart_dma.tx_dma_channel = 0xFF;
up->uart_dma.rx_dma_channel = 0xFF;
}
if (console_detect(str)) {
printk(KERN_INFO "Invalid console paramter....\n");
}
up->use_console = 0;
fcr[pdev->id - 1] = 0;
if (!strcmp(str, "ttyS0"))
up->use_console = 1;
else if (!strcmp(str, "ttyS1"))
up->use_console = 1;
else if (!strcmp(str, "ttyS2"))
up->use_console = 1;
else if (!strcmp(str, "ttyS3"))
up->use_console = 1;
else
printk(KERN_INFO
"!!!!!!!!! Unable to recongnize Console UART........\n");
ui[pdev->id - 1] = up;
serial_omap_add_console_port(up);
ret = uart_add_one_port(&serial_omap_reg, &up->port);
if (ret != 0)
goto do_release_region;
platform_set_drvdata(pdev, up);
return 0;
do_release_region:
release_mem_region(mem->start, (mem->end - mem->start) + 1);
return ret;
}
int msm_gemini_platform_init(struct platform_device *pdev,
struct resource **mem,
void **base,
int *irq,
irqreturn_t (*handler) (int, void *),
void *context)
{
int rc = -1;
int gemini_irq;
struct resource *gemini_mem, *gemini_io, *gemini_irq_res;
void *gemini_base;
gemini_mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
if (!gemini_mem) {
GMN_PR_ERR("%s: no mem resource?\n", __func__);
return -ENODEV;
}
gemini_irq_res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
if (!gemini_irq_res) {
GMN_PR_ERR("no irq resource?\n");
return -ENODEV;
}
gemini_irq = gemini_irq_res->start;
gemini_io = request_mem_region(gemini_mem->start,
resource_size(gemini_mem), pdev->name);
if (!gemini_io) {
GMN_PR_ERR("%s: region already claimed\n", __func__);
return -EBUSY;
}
gemini_base = ioremap(gemini_mem->start, resource_size(gemini_mem));
if (!gemini_base) {
rc = -ENOMEM;
GMN_PR_ERR("%s: ioremap failed\n", __func__);
goto fail1;
}
rc = msm_camio_jpeg_clk_enable();
if (rc) {
GMN_PR_ERR("%s: clk failed rc = %d\n", __func__, rc);
goto fail2;
}
msm_gemini_hw_init(gemini_base, resource_size(gemini_mem));
rc = request_irq(gemini_irq, handler, IRQF_TRIGGER_RISING, "gemini",
context);
if (rc) {
GMN_PR_ERR("%s: request_irq failed, %d\n", __func__,
gemini_irq);
goto fail3;
}
*mem = gemini_mem;
*base = gemini_base;
*irq = gemini_irq;
GMN_DBG("%s:%d] success\n", __func__, __LINE__);
return rc;
fail3:
msm_camio_jpeg_clk_disable();
fail2:
iounmap(gemini_base);
fail1:
release_mem_region(gemini_mem->start, resource_size(gemini_mem));
GMN_DBG("%s:%d] fail\n", __func__, __LINE__);
return rc;
}
/*
* Release the memory region(s) being used by 'port'
*/
static void pl010_release_port(struct uart_port *port)
{
release_mem_region(port->mapbase, SZ_4K);
}
/* Set up the struct net_device associated with this card. Called after
* probing succeeds.
*/
static int __init com90xx_found(int ioaddr, int airq, u_long shmem, void __iomem *p)
{
struct net_device *dev = NULL;
struct arcnet_local *lp;
u_long first_mirror, last_mirror;
int mirror_size;
/* allocate struct net_device */
dev = alloc_arcdev(device);
if (!dev) {
BUGMSG2(D_NORMAL, "com90xx: Can't allocate device!\n");
iounmap(p);
release_mem_region(shmem, MIRROR_SIZE);
return -ENOMEM;
}
lp = netdev_priv(dev);
/* find the real shared memory start/end points, including mirrors */
/* guess the actual size of one "memory mirror" - the number of
* bytes between copies of the shared memory. On most cards, it's
* 2k (or there are no mirrors at all) but on some, it's 4k.
*/
mirror_size = MIRROR_SIZE;
if (readb(p) == TESTvalue &&
check_mirror(shmem - MIRROR_SIZE, MIRROR_SIZE) == 0 &&
check_mirror(shmem - 2 * MIRROR_SIZE, MIRROR_SIZE) == 1)
mirror_size = 2 * MIRROR_SIZE;
first_mirror = shmem - mirror_size;
while (check_mirror(first_mirror, mirror_size) == 1)
first_mirror -= mirror_size;
first_mirror += mirror_size;
last_mirror = shmem + mirror_size;
while (check_mirror(last_mirror, mirror_size) == 1)
last_mirror += mirror_size;
last_mirror -= mirror_size;
dev->mem_start = first_mirror;
dev->mem_end = last_mirror + MIRROR_SIZE - 1;
iounmap(p);
release_mem_region(shmem, MIRROR_SIZE);
if (!request_mem_region(dev->mem_start, dev->mem_end - dev->mem_start + 1, "arcnet (90xx)"))
goto err_free_dev;
/* reserve the irq */
if (request_irq(airq, arcnet_interrupt, 0, "arcnet (90xx)", dev)) {
BUGMSG(D_NORMAL, "Can't get IRQ %d!\n", airq);
goto err_release_mem;
}
dev->irq = airq;
/* Initialize the rest of the device structure. */
lp->card_name = "COM90xx";
lp->hw.command = com90xx_command;
lp->hw.status = com90xx_status;
lp->hw.intmask = com90xx_setmask;
lp->hw.reset = com90xx_reset;
lp->hw.owner = THIS_MODULE;
lp->hw.copy_to_card = com90xx_copy_to_card;
lp->hw.copy_from_card = com90xx_copy_from_card;
lp->mem_start = ioremap(dev->mem_start, dev->mem_end - dev->mem_start + 1);
if (!lp->mem_start) {
BUGMSG(D_NORMAL, "Can't remap device memory!\n");
goto err_free_irq;
}
/* get and check the station ID from offset 1 in shmem */
dev->dev_addr[0] = readb(lp->mem_start + 1);
dev->base_addr = ioaddr;
BUGMSG(D_NORMAL, "COM90xx station %02Xh found at %03lXh, IRQ %d, "
"ShMem %lXh (%ld*%xh).\n",
dev->dev_addr[0],
dev->base_addr, dev->irq, dev->mem_start,
(dev->mem_end - dev->mem_start + 1) / mirror_size, mirror_size);
if (register_netdev(dev))
goto err_unmap;
cards[numcards++] = dev;
return 0;
err_unmap:
iounmap(lp->mem_start);
err_free_irq:
free_irq(dev->irq, dev);
err_release_mem:
release_mem_region(dev->mem_start, dev->mem_end - dev->mem_start + 1);
err_free_dev:
free_netdev(dev);
return -EIO;
}
/*
* Release the memory region(s) being used by 'port'
*/
static void pl010_release_port(struct uart_port *port)
{
release_mem_region(port->mapbase, UART_PORT_SIZE);
}
static int __devinit i5k_amb_probe(struct platform_device *pdev)
{
struct i5k_amb_data *data;
struct resource *reso;
int i;
int res = -ENODEV;
data = kzalloc(sizeof(*data), GFP_KERNEL);
if (!data)
return -ENOMEM;
/* Figure out where the AMB registers live */
i = 0;
do {
res = i5k_find_amb_registers(data, chipset_ids[i]);
i++;
} while (res && chipset_ids[i]);
if (res)
goto err;
/* Copy the DIMM presence map for the first two channels */
res = i5k_channel_probe(&data->amb_present[0],
i5k_channel_pci_id(data, 0));
if (res)
goto err;
/* Copy the DIMM presence map for the optional second two channels */
i5k_channel_probe(&data->amb_present[2],
i5k_channel_pci_id(data, 1));
/* Set up resource regions */
reso = request_mem_region(data->amb_base, data->amb_len, DRVNAME);
if (!reso) {
res = -EBUSY;
goto err;
}
data->amb_mmio = ioremap_nocache(data->amb_base, data->amb_len);
if (!data->amb_mmio) {
res = -EBUSY;
goto err_map_failed;
}
platform_set_drvdata(pdev, data);
res = i5k_amb_hwmon_init(pdev);
if (res)
goto err_init_failed;
return res;
err_init_failed:
iounmap(data->amb_mmio);
platform_set_drvdata(pdev, NULL);
err_map_failed:
release_mem_region(data->amb_base, data->amb_len);
err:
kfree(data);
return res;
}
/**
* xuartps_release_port - Release the memory region attached to a xuartps
* port, called when the driver removes a xuartps
* port via uart_remove_one_port().
* @port: Handle to the uart port structure
*
**/
static void xuartps_release_port(struct uart_port *port)
{
release_mem_region(port->mapbase, XUARTPS_REGISTER_SPACE);
iounmap(port->membase);
port->membase = NULL;
}
static int __devinit da8xx_rtc_probe(struct platform_device *pdev)
{
struct resource *res, *mem = NULL;
struct rtc_device *rtc = NULL;
int irq, ret;
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
if (!res) {
pr_debug("%s: No MEM resource in platform data.\n", pdev->name);
ret = -ENOENT;
goto err_out;
}
da8xx_rtc_pbase = res->start;
da8xx_rtc_base_size = res->start - res->start + 1;
mem = request_mem_region(res->start, da8xx_rtc_base_size, pdev->name);
if (!mem) {
pr_debug("%s: Can't reserve MEM resource.\n", pdev->name);
ret = -EBUSY;
goto err_out;
}
da8xx_rtc_base = ioremap(res->start, da8xx_rtc_base_size);
if (da8xx_rtc_base == NULL) {
pr_debug("%s: Can't ioremap MEM resource.\n", pdev->name);
ret = -ENOMEM;
goto err_out0;
}
rtc = rtc_device_register(pdev->name, &pdev->dev, &da8xx_rtc_ops,
THIS_MODULE);
if (IS_ERR(rtc)) {
pr_debug("%s: Can't register device.\n", pdev->name);
ret = PTR_ERR(rtc);
goto err_out1;
}
platform_set_drvdata(pdev, rtc);
irq = platform_get_irq(pdev, 0);
if (irq <= 0)
dev_warn(&pdev->dev,
"No IRQ in platform data. Alarms disabled.\n");
else {
ret = request_irq(irq, da8xx_rtc_intr, IRQF_DISABLED,
pdev->name, pdev);
if (ret) {
pr_debug("%s: Failed to register handler for irq %d.\n",
pdev->name, irq);
ret = -EIO;
goto err_out2;
}
da8xx_rtc_irq = irq;
}
da8xx_rtc_mmr_unlock();
if (!da8xx_rtc_is_enabled()) {
pr_debug("%s: RTC disabled and can't be enabled.\n",
pdev->name);
ret = -EIO;
goto err_out3;
}
#if 0 /* XXXX */
da8xx_rtc_sw_reset();
#endif
da8xx_rtc_config();
da8xx_rtc_clear_alarm_intr();
da8xx_rtc_start();
dev_info(&pdev->dev, "TI DA8xx Real Time Clock driver.\n");
return 0;
err_out3:
if (da8xx_rtc_irq)
free_irq(da8xx_rtc_irq, pdev);
err_out2:
platform_set_drvdata(pdev, NULL);
rtc_device_unregister(rtc);
err_out1:
iounmap(da8xx_rtc_base);
err_out0:
release_mem_region(da8xx_rtc_pbase, da8xx_rtc_base_size);
err_out:
dev_err(&pdev->dev, "Unable to register RTC.\n");
return ret;
}
static int __init coh901327_probe(struct platform_device *pdev)
{
int ret;
u16 val;
struct resource *res;
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
if (!res)
return -ENOENT;
parent = &pdev->dev;
physize = resource_size(res);
phybase = res->start;
if (request_mem_region(phybase, physize, DRV_NAME) == NULL) {
ret = -EBUSY;
goto out;
}
virtbase = ioremap(phybase, physize);
if (!virtbase) {
ret = -ENOMEM;
goto out_no_remap;
}
clk = clk_get(&pdev->dev, NULL);
if (IS_ERR(clk)) {
ret = PTR_ERR(clk);
dev_err(&pdev->dev, "could not get clock\n");
goto out_no_clk;
}
ret = clk_enable(clk);
if (ret) {
dev_err(&pdev->dev, "could not enable clock\n");
goto out_no_clk_enable;
}
val = readw(virtbase + U300_WDOG_SR);
switch (val) {
case U300_WDOG_SR_STATUS_TIMED_OUT:
dev_info(&pdev->dev,
"watchdog timed out since last chip reset!\n");
coh901327_wdt.bootstatus |= WDIOF_CARDRESET;
break;
case U300_WDOG_SR_STATUS_NORMAL:
dev_info(&pdev->dev,
"in normal status, no timeouts have occurred.\n");
break;
default:
dev_info(&pdev->dev,
"contains an illegal status code (%08x)\n", val);
break;
}
val = readw(virtbase + U300_WDOG_D2R);
switch (val) {
case U300_WDOG_D2R_DISABLE_STATUS_DISABLED:
dev_info(&pdev->dev, "currently disabled.\n");
break;
case U300_WDOG_D2R_DISABLE_STATUS_ENABLED:
dev_info(&pdev->dev,
"currently enabled! (disabling it now)\n");
coh901327_disable();
break;
default:
dev_err(&pdev->dev,
"contains an illegal enable/disable code (%08x)\n",
val);
break;
}
writew(U300_WDOG_SR_RESET_STATUS_RESET, virtbase + U300_WDOG_SR);
irq = platform_get_irq(pdev, 0);
if (request_irq(irq, coh901327_interrupt, 0,
DRV_NAME " Bark", pdev)) {
ret = -EIO;
goto out_no_irq;
}
clk_disable(clk);
if (margin < 1 || margin > 327)
margin = 60;
coh901327_wdt.timeout = margin;
ret = watchdog_register_device(&coh901327_wdt);
if (ret == 0)
dev_info(&pdev->dev,
"initialized. timer margin=%d sec\n", margin);
else
goto out_no_wdog;
return 0;
out_no_wdog:
free_irq(irq, pdev);
out_no_irq:
clk_disable(clk);
out_no_clk_enable:
clk_put(clk);
out_no_clk:
iounmap(virtbase);
out_no_remap:
release_mem_region(phybase, SZ_4K);
out:
return ret;
}
static int __devinit nf10_probe(struct pci_dev *pdev, const struct pci_device_id *id){
int err;
int i;
int ret = -ENODEV;
struct nf10_card *card;
// create private structure
card = (struct nf10_card*)kmalloc(sizeof(struct nf10_card), GFP_KERNEL);
if (card == NULL) {
printk(KERN_ERR "nf10: Private card memory alloc failed\n");
ret = -ENOMEM;
goto err_out_none;
}
memset(card, 0, sizeof(struct nf10_card));
card->card_id = (int)atomic64_read(&detected_cards);
memcpy(card->card_name,"nf10 ",sizeof(card->card_name));
card->card_name[4] = 'a' + (char)card->card_id;
spin_lock_init(&card->tx_lock);
spin_lock_init(&card->axi_lock);
card->pdev = pdev;
// enable device
if((err = pci_enable_device(pdev))) {
printk(KERN_ERR "nf10: Unable to enable the PCI device!\n");
ret = -ENODEV;
goto err_out_free_card;
}
// set DMA addressing masks (full 64bit)
if(dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64)) < 0){
printk(KERN_ERR "nf10: dma_set_mask fail!\n");
ret = -EFAULT;
goto err_out_disable_device;
}
// enable BusMaster (enables generation of pcie requests)
pci_set_master(pdev);
// enable MSI
if(pci_enable_msi(pdev) != 0){
printk(KERN_ERR "nf10: failed to enable MSI interrupts\n");
ret = -EFAULT;
goto err_out_clear_master;
}
// be nice and tell kernel that we'll use this resource
printk(KERN_INFO "nf10: Reserving memory region for NF10\n");
if (!request_mem_region(pci_resource_start(pdev, 0), pci_resource_len(pdev, 0), card->card_name)) {
printk(KERN_ERR "nf10: Reserving memory region failed\n");
ret = -ENOMEM;
goto err_out_msi;
}
if (!request_mem_region(pci_resource_start(pdev, 2), pci_resource_len(pdev, 2), card->card_name)) {
printk(KERN_ERR "nf10: Reserving memory region failed\n");
ret = -ENOMEM;
goto err_out_release_mem_region1;
}
// map the cfg memory
printk(KERN_INFO "nf10: mapping cfg memory\n");
card->cfg_addr = ioremap_nocache(pci_resource_start(pdev, 0), pci_resource_len(pdev, 0));
if (!card->cfg_addr)
{
printk(KERN_ERR "nf10: cannot mem region len:%lx start:%lx\n",
(long unsigned)pci_resource_len(pdev, 0),
(long unsigned)pci_resource_start(pdev, 0));
goto err_out_iounmap;
}
printk(KERN_INFO "nf10: mapping mem memory\n");
card->tx_dsc = ioremap_nocache(pci_resource_start(pdev, 2) + 0 * 0x00100000ULL, 0x00100000ULL);
card->rx_dsc = ioremap_nocache(pci_resource_start(pdev, 2) + 1 * 0x00100000ULL, 0x00100000ULL);
if (!card->tx_dsc || !card->rx_dsc)
{
printk(KERN_ERR "nf10: cannot mem region len:%lx start:%lx\n",
(long unsigned)pci_resource_len(pdev, 2),
(long unsigned)pci_resource_start(pdev, 2));
goto err_out_iounmap;
}
// reset
*(((uint64_t*)card->cfg_addr)+30) = 1;
mmiowb();
msleep(1);
// set buffer masks
card->tx_dsc_mask = 0x000007ffULL;
card->rx_dsc_mask = 0x000007ffULL;
card->tx_pkt_mask = 0x00007fffULL;
card->rx_pkt_mask = 0x00007fffULL;
card->tx_dne_mask = 0x000007ffULL;
card->rx_dne_mask = 0x000007ffULL;
if(card->tx_dsc_mask > card->tx_dne_mask){
*(((uint64_t*)card->cfg_addr)+1) = card->tx_dne_mask;
card->tx_dsc_mask = card->tx_dne_mask;
}
else if(card->tx_dne_mask > card->tx_dsc_mask){
*(((uint64_t*)card->cfg_addr)+7) = card->tx_dsc_mask;
card->tx_dne_mask = card->tx_dsc_mask;
}
if(card->rx_dsc_mask > card->rx_dne_mask){
*(((uint64_t*)card->cfg_addr)+9) = card->rx_dne_mask;
card->rx_dsc_mask = card->rx_dne_mask;
}
else if(card->rx_dne_mask > card->rx_dsc_mask){
*(((uint64_t*)card->cfg_addr)+15) = card->rx_dsc_mask;
card->rx_dne_mask = card->rx_dsc_mask;
}
// allocate buffers to play with
card->host_tx_dne_ptr = dma_alloc_coherent(&pdev->dev, card->tx_dne_mask+1, &(card->host_tx_dne_dma), GFP_KERNEL);
card->host_rx_dne_ptr = dma_alloc_coherent(&pdev->dev, card->rx_dne_mask+1, &(card->host_rx_dne_dma), GFP_KERNEL);
if( (card->host_rx_dne_ptr == NULL) ||
(card->host_tx_dne_ptr == NULL) ){
printk(KERN_ERR "nf10: cannot allocate dma buffer\n");
goto err_out_free_private2;
}
// set host buffer addresses
*(((uint64_t*)card->cfg_addr)+16) = card->host_tx_dne_dma;
*(((uint64_t*)card->cfg_addr)+17) = card->tx_dne_mask;
*(((uint64_t*)card->cfg_addr)+18) = card->host_rx_dne_dma;
*(((uint64_t*)card->cfg_addr)+19) = card->rx_dne_mask;
mmiowb();
// init mem buffers
card->mem_tx_dsc.wr_ptr = 0;
card->mem_tx_dsc.rd_ptr = 0;
atomic64_set(&card->mem_tx_dsc.cnt, 0);
card->mem_tx_dsc.mask = card->tx_dsc_mask;
card->mem_tx_dsc.cl_size = (card->tx_dsc_mask+1)/64;
card->mem_tx_pkt.wr_ptr = 0;
card->mem_tx_pkt.rd_ptr = 0;
atomic64_set(&card->mem_tx_pkt.cnt, 0);
card->mem_tx_pkt.mask = card->tx_pkt_mask;
card->mem_tx_pkt.cl_size = (card->tx_pkt_mask+1)/64;
card->mem_rx_dsc.wr_ptr = 0;
card->mem_rx_dsc.rd_ptr = 0;
atomic64_set(&card->mem_rx_dsc.cnt, 0);
card->mem_rx_dsc.mask = card->rx_dsc_mask;
card->mem_rx_dsc.cl_size = (card->rx_dsc_mask+1)/64;
card->mem_rx_pkt.wr_ptr = 0;
card->mem_rx_pkt.rd_ptr = 0;
atomic64_set(&card->mem_rx_pkt.cnt, 0);
card->mem_rx_pkt.mask = card->rx_pkt_mask;
card->mem_rx_pkt.cl_size = (card->rx_pkt_mask+1)/64;
card->host_tx_dne.wr_ptr = 0;
card->host_tx_dne.rd_ptr = 0;
atomic64_set(&card->host_tx_dne.cnt, 0);
card->host_tx_dne.mask = card->tx_dne_mask;
card->host_tx_dne.cl_size = (card->tx_dne_mask+1)/64;
card->host_rx_dne.wr_ptr = 0;
card->host_rx_dne.rd_ptr = 0;
atomic64_set(&card->host_rx_dne.cnt, 0);
card->host_rx_dne.mask = card->rx_dne_mask;
card->host_rx_dne.cl_size = (card->rx_dne_mask+1)/64;
for(i = 0; i < card->host_tx_dne.cl_size; i++)
*(((uint32_t*)card->host_tx_dne_ptr) + i * 16) = 0xffffffff;
for(i = 0; i < card->host_rx_dne.cl_size; i++)
*(((uint64_t*)card->host_rx_dne_ptr) + i * 8 + 7) = 0xffffffffffffffffULL;
// allocate book keeping structures
card->tx_bk_skb = (struct sk_buff**)kmalloc(card->mem_tx_dsc.cl_size*sizeof(struct sk_buff*), GFP_KERNEL);
card->tx_bk_dma_addr = (uint64_t*)kmalloc(card->mem_tx_dsc.cl_size*sizeof(uint64_t), GFP_KERNEL);
card->tx_bk_size = (uint64_t*)kmalloc(card->mem_tx_dsc.cl_size*sizeof(uint64_t), GFP_KERNEL);
card->tx_bk_port = (uint64_t*)kmalloc(card->mem_tx_dsc.cl_size*sizeof(uint64_t), GFP_KERNEL);
card->rx_bk_skb = (struct sk_buff**)kmalloc(card->mem_rx_dsc.cl_size*sizeof(struct sk_buff*), GFP_KERNEL);
card->rx_bk_dma_addr = (uint64_t*)kmalloc(card->mem_rx_dsc.cl_size*sizeof(uint64_t), GFP_KERNEL);
card->rx_bk_size = (uint64_t*)kmalloc(card->mem_rx_dsc.cl_size*sizeof(uint64_t), GFP_KERNEL);
card->rx_bk_id = (uint16_t*)kmalloc(card->mem_rx_dsc.cl_size*sizeof(uint16_t), GFP_KERNEL);
for (i = 0; i < card->mem_rx_dsc.cl_size; i++)
card->rx_bk_id[i] = 0xffff;
card->rx_id = 0;
if(card->tx_bk_skb == NULL || card->tx_bk_dma_addr == NULL || card->tx_bk_size == NULL || card->tx_bk_port == NULL ||
card->rx_bk_skb == NULL || card->rx_bk_dma_addr == NULL || card->rx_bk_size == NULL || card->rx_bk_id == NULL) {
printk(KERN_ERR "nf10: kmalloc failed");
goto err_out_free_private2;
}
// store private data to pdev
pci_set_drvdata(pdev, card);
axi_wait_write_buffer_empty(card); // initialize axi_write_buffer_level by waiting for an empty axi write buffer
atomic64_set(&card->axi_access_state, AXI_ACCESS_UNASSIGNED);
if (!nf10_ael2005_phy_configuration(card)) { // Read from the AEL2005 PHY chips
printk(KERN_INFO "nf10: AEL2005 PHY chips are configured\n");
}
else {
printk(KERN_INFO "nf10: AEL2005 PHY chips were already configured\n");
}
// success
ret = nf10iface_probe(pdev, card);
if(ret < 0){
printk(KERN_ERR "nf10: failed to initialize interfaces\n");
goto err_out_free_private2;
}
ret = nf10fops_probe(pdev, card);
if(ret < 0){
printk(KERN_ERR "nf10: failed to initialize dev file\n");
goto err_out_free_private2;
}
else{
printk(KERN_INFO "nf10: device ready\n");
atomic64_inc(&detected_cards);
return ret;
}
// error out
err_out_free_private2:
if(card->tx_bk_dma_addr) kfree(card->tx_bk_dma_addr);
if(card->tx_bk_skb) kfree(card->tx_bk_skb);
if(card->tx_bk_size) kfree(card->tx_bk_size);
if(card->tx_bk_port) kfree(card->tx_bk_port);
if(card->rx_bk_dma_addr) kfree(card->rx_bk_dma_addr);
if(card->rx_bk_skb) kfree(card->rx_bk_skb);
if(card->rx_bk_size) kfree(card->rx_bk_size);
dma_free_coherent(&pdev->dev, card->tx_dne_mask+1, card->host_tx_dne_ptr, card->host_tx_dne_dma);
dma_free_coherent(&pdev->dev, card->rx_dne_mask+1, card->host_rx_dne_ptr, card->host_rx_dne_dma);
err_out_iounmap:
if(card->tx_dsc) iounmap(card->tx_dsc);
if(card->rx_dsc) iounmap(card->rx_dsc);
if(card->cfg_addr) iounmap(card->cfg_addr);
pci_set_drvdata(pdev, NULL);
release_mem_region(pci_resource_start(pdev, 2), pci_resource_len(pdev, 2));
err_out_release_mem_region1:
release_mem_region(pci_resource_start(pdev, 0), pci_resource_len(pdev, 0));
err_out_msi:
pci_disable_msi(pdev);
err_out_clear_master:
pci_clear_master(pdev);
err_out_disable_device:
pci_disable_device(pdev);
err_out_free_card:
kfree(card);
err_out_none:
return ret;
}
int msm_camio_enable(struct platform_device *pdev)
{
int rc = 0;
struct msm_camera_sensor_info *sinfo = pdev->dev.platform_data;
struct msm_camera_device_platform_data *camdev = sinfo->pdata;
camio_dev = pdev;
camio_ext = camdev->ioext;
camio_clk = camdev->ioclk;
camdev->camera_gpio_on();
msm_camera_vreg_enable();
msm_camio_clk_enable(CAMIO_CAM_MCLK_CLK);
msm_camio_clk_enable(CAMIO_VFE_CLK);
msm_camio_clk_enable(CAMIO_CSI0_VFE_CLK);
msm_camio_clk_enable(CAMIO_CSI1_VFE_CLK);
msm_camio_clk_enable(CAMIO_CSI_SRC_CLK);
msm_camio_clk_enable(CAMIO_CSI0_CLK);
msm_camio_clk_enable(CAMIO_CSI1_CLK);
msm_camio_clk_enable(CAMIO_VFE_PCLK);
msm_camio_clk_enable(CAMIO_CSI0_PCLK);
msm_camio_clk_enable(CAMIO_CSI1_PCLK);
csiio = request_mem_region(camio_ext.csiphy,
camio_ext.csisz, pdev->name);
if (!csiio) {
rc = -EBUSY;
goto common_fail;
}
csibase = ioremap(camio_ext.csiphy,
camio_ext.csisz);
if (!csibase) {
rc = -ENOMEM;
goto csi_busy;
}
rc = request_irq(camio_ext.csiirq, msm_io_csi_irq,
IRQF_TRIGGER_RISING, "csi", 0);
if (rc < 0)
goto csi_irq_fail;
return 0;
csi_irq_fail:
iounmap(csibase);
csi_busy:
release_mem_region(camio_ext.csiphy, camio_ext.csisz);
common_fail:
msm_camio_clk_disable(CAMIO_CAM_MCLK_CLK);
msm_camio_clk_disable(CAMIO_CSI0_VFE_CLK);
msm_camio_clk_disable(CAMIO_CSI0_CLK);
msm_camio_clk_disable(CAMIO_CSI1_VFE_CLK);
msm_camio_clk_disable(CAMIO_CSI1_CLK);
msm_camio_clk_disable(CAMIO_VFE_PCLK);
msm_camio_clk_disable(CAMIO_CSI0_PCLK);
msm_camio_clk_disable(CAMIO_CSI1_PCLK);
/* Disable CAMIO_CSI1_VFE_CLK, CAMIO_CSI1_CLK,
CAMIO_CSI1_PCLK for the secondary sensor */
msm_camera_vreg_disable();
camdev->camera_gpio_off();
return rc;
}
static int __devinit ds1553_rtc_probe(struct platform_device *pdev)
{
struct rtc_device *rtc;
struct resource *res;
unsigned int cen, sec;
struct rtc_plat_data *pdata = NULL;
void __iomem *ioaddr = NULL;
int ret = 0;
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
if (!res)
return -ENODEV;
pdata = kzalloc(sizeof(*pdata), GFP_KERNEL);
if (!pdata)
return -ENOMEM;
if (!request_mem_region(res->start, RTC_REG_SIZE, pdev->name)) {
ret = -EBUSY;
goto out;
}
pdata->baseaddr = res->start;
ioaddr = ioremap(pdata->baseaddr, RTC_REG_SIZE);
if (!ioaddr) {
ret = -ENOMEM;
goto out;
}
pdata->ioaddr = ioaddr;
pdata->irq = platform_get_irq(pdev, 0);
/* turn RTC on if it was not on */
sec = readb(ioaddr + RTC_SECONDS);
if (sec & RTC_STOP) {
sec &= RTC_SECONDS_MASK;
cen = readb(ioaddr + RTC_CENTURY) & RTC_CENTURY_MASK;
writeb(RTC_WRITE, ioaddr + RTC_CONTROL);
writeb(sec, ioaddr + RTC_SECONDS);
writeb(cen & RTC_CENTURY_MASK, ioaddr + RTC_CONTROL);
}
if (readb(ioaddr + RTC_FLAGS) & RTC_FLAGS_BLF)
dev_warn(&pdev->dev, "voltage-low detected.\n");
if (pdata->irq > 0) {
writeb(0, ioaddr + RTC_INTERRUPTS);
if (request_irq(pdata->irq, ds1553_rtc_interrupt,
IRQF_DISABLED, pdev->name, pdev) < 0) {
dev_warn(&pdev->dev, "interrupt not available.\n");
pdata->irq = 0;
}
}
rtc = rtc_device_register(pdev->name, &pdev->dev,
&ds1553_rtc_ops, THIS_MODULE);
if (IS_ERR(rtc)) {
ret = PTR_ERR(rtc);
goto out;
}
pdata->rtc = rtc;
pdata->last_jiffies = jiffies;
platform_set_drvdata(pdev, pdata);
ret = sysfs_create_bin_file(&pdev->dev.kobj, &ds1553_nvram_attr);
if (ret)
goto out;
return 0;
out:
if (pdata->rtc)
rtc_device_unregister(pdata->rtc);
if (pdata->irq > 0)
free_irq(pdata->irq, pdev);
if (ioaddr)
iounmap(ioaddr);
if (pdata->baseaddr)
release_mem_region(pdata->baseaddr, RTC_REG_SIZE);
kfree(pdata);
return ret;
}
static int __devinit mmc_omap_probe(struct platform_device *pdev)
{
struct omap_mmc_platform_data *pdata = pdev->dev.platform_data;
struct mmc_omap_host *host = NULL;
struct resource *res;
dma_cap_mask_t mask;
unsigned sig;
int i, ret = 0;
int irq;
if (pdata == NULL) {
dev_err(&pdev->dev, "platform data missing\n");
return -ENXIO;
}
if (pdata->nr_slots == 0) {
dev_err(&pdev->dev, "no slots\n");
return -ENXIO;
}
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
irq = platform_get_irq(pdev, 0);
if (res == NULL || irq < 0)
return -ENXIO;
res = request_mem_region(res->start, resource_size(res),
pdev->name);
if (res == NULL)
return -EBUSY;
host = kzalloc(sizeof(struct mmc_omap_host), GFP_KERNEL);
if (host == NULL) {
ret = -ENOMEM;
goto err_free_mem_region;
}
INIT_WORK(&host->slot_release_work, mmc_omap_slot_release_work);
INIT_WORK(&host->send_stop_work, mmc_omap_send_stop_work);
INIT_WORK(&host->cmd_abort_work, mmc_omap_abort_command);
setup_timer(&host->cmd_abort_timer, mmc_omap_cmd_timer,
(unsigned long) host);
spin_lock_init(&host->clk_lock);
setup_timer(&host->clk_timer, mmc_omap_clk_timer, (unsigned long) host);
spin_lock_init(&host->dma_lock);
spin_lock_init(&host->slot_lock);
init_waitqueue_head(&host->slot_wq);
host->pdata = pdata;
host->dev = &pdev->dev;
platform_set_drvdata(pdev, host);
host->id = pdev->id;
host->mem_res = res;
host->irq = irq;
host->use_dma = 1;
host->irq = irq;
host->phys_base = host->mem_res->start;
host->virt_base = ioremap(res->start, resource_size(res));
if (!host->virt_base)
goto err_ioremap;
host->iclk = clk_get(&pdev->dev, "ick");
if (IS_ERR(host->iclk)) {
ret = PTR_ERR(host->iclk);
goto err_free_mmc_host;
}
clk_enable(host->iclk);
host->fclk = clk_get(&pdev->dev, "fck");
if (IS_ERR(host->fclk)) {
ret = PTR_ERR(host->fclk);
goto err_free_iclk;
}
dma_cap_zero(mask);
dma_cap_set(DMA_SLAVE, mask);
host->dma_tx_burst = -1;
host->dma_rx_burst = -1;
if (cpu_is_omap24xx())
sig = host->id == 0 ? OMAP24XX_DMA_MMC1_TX : OMAP24XX_DMA_MMC2_TX;
else
sig = host->id == 0 ? OMAP_DMA_MMC_TX : OMAP_DMA_MMC2_TX;
host->dma_tx = dma_request_channel(mask, omap_dma_filter_fn, &sig);
#if 0
if (!host->dma_tx) {
dev_err(host->dev, "unable to obtain TX DMA engine channel %u\n",
sig);
goto err_dma;
}
#else
if (!host->dma_tx)
dev_warn(host->dev, "unable to obtain TX DMA engine channel %u\n",
sig);
#endif
if (cpu_is_omap24xx())
sig = host->id == 0 ? OMAP24XX_DMA_MMC1_RX : OMAP24XX_DMA_MMC2_RX;
else
sig = host->id == 0 ? OMAP_DMA_MMC_RX : OMAP_DMA_MMC2_RX;
host->dma_rx = dma_request_channel(mask, omap_dma_filter_fn, &sig);
#if 0
if (!host->dma_rx) {
dev_err(host->dev, "unable to obtain RX DMA engine channel %u\n",
sig);
goto err_dma;
}
#else
if (!host->dma_rx)
dev_warn(host->dev, "unable to obtain RX DMA engine channel %u\n",
sig);
#endif
ret = request_irq(host->irq, mmc_omap_irq, 0, DRIVER_NAME, host);
if (ret)
goto err_free_dma;
if (pdata->init != NULL) {
ret = pdata->init(&pdev->dev);
if (ret < 0)
goto err_free_irq;
}
host->nr_slots = pdata->nr_slots;
host->reg_shift = (cpu_is_omap7xx() ? 1 : 2);
host->mmc_omap_wq = alloc_workqueue("mmc_omap", 0, 0);
if (!host->mmc_omap_wq)
goto err_plat_cleanup;
for (i = 0; i < pdata->nr_slots; i++) {
ret = mmc_omap_new_slot(host, i);
if (ret < 0) {
while (--i >= 0)
mmc_omap_remove_slot(host->slots[i]);
goto err_destroy_wq;
}
}
return 0;
err_destroy_wq:
destroy_workqueue(host->mmc_omap_wq);
err_plat_cleanup:
if (pdata->cleanup)
pdata->cleanup(&pdev->dev);
err_free_irq:
free_irq(host->irq, host);
err_free_dma:
if (host->dma_tx)
dma_release_channel(host->dma_tx);
if (host->dma_rx)
dma_release_channel(host->dma_rx);
clk_put(host->fclk);
err_free_iclk:
clk_disable(host->iclk);
clk_put(host->iclk);
err_free_mmc_host:
iounmap(host->virt_base);
err_ioremap:
kfree(host);
err_free_mem_region:
release_mem_region(res->start, resource_size(res));
return ret;
}