int
pcib_host_res_free(device_t pcib, struct pcib_host_resources *hr)
{
resource_list_free(&hr->hr_rl);
return (0);
}
static int
localbus_attach(device_t dev)
{
device_t dev_child;
struct localbus_softc *sc;
struct localbus_devinfo *di;
phandle_t dt_node, dt_child;
sc = device_get_softc(dev);
sc->sc_dev = dev;
sc->sc_banks = localbus_banks;
/*
* Walk localbus and add direct subordinates as our children.
*/
dt_node = ofw_bus_get_node(dev);
for (dt_child = OF_child(dt_node); dt_child != 0;
dt_child = OF_peer(dt_child)) {
/* Check and process 'status' property. */
if (!(fdt_is_enabled(dt_child)))
continue;
if (!(fdt_pm_is_enabled(dt_child)))
continue;
di = malloc(sizeof(*di), M_LOCALBUS, M_WAITOK | M_ZERO);
if (ofw_bus_gen_setup_devinfo(&di->di_ofw, dt_child) != 0) {
free(di, M_LOCALBUS);
device_printf(dev, "could not set up devinfo\n");
continue;
}
resource_list_init(&di->di_res);
if (fdt_localbus_reg_decode(dt_child, sc, di)) {
device_printf(dev, "could not process 'reg' "
"property\n");
ofw_bus_gen_destroy_devinfo(&di->di_ofw);
free(di, M_LOCALBUS);
continue;
}
/* Add newbus device for this FDT node */
dev_child = device_add_child(dev, NULL, -1);
if (dev_child == NULL) {
device_printf(dev, "could not add child: %s\n",
di->di_ofw.obd_name);
resource_list_free(&di->di_res);
ofw_bus_gen_destroy_devinfo(&di->di_ofw);
free(di, M_LOCALBUS);
continue;
}
#ifdef DEBUG
device_printf(dev, "added child: %s\n\n", di->di_ofw.obd_name);
#endif
device_set_ivars(dev_child, di);
}
return (bus_generic_attach(dev));
}
static void
ofwbus_destroy_dinfo(struct ofwbus_devinfo *ndi)
{
resource_list_free(&ndi->ndi_rl);
ofw_bus_gen_destroy_devinfo(&ndi->ndi_obdinfo);
free(ndi, M_DEVBUF);
}
static void
lebuffer_destroy_dinfo(struct lebuffer_devinfo *dinfo)
{
resource_list_free(&dinfo->ldi_rl);
ofw_bus_gen_destroy_devinfo(&dinfo->ldi_obdinfo);
free(dinfo, M_DEVBUF);
}
static void
vnex_destroy_dinfo(struct vnex_devinfo *vndi)
{
resource_list_free(&vndi->vndi_rl);
mdesc_bus_gen_destroy_devinfo(&vndi->vndi_mbdinfo);
free(vndi, M_DEVBUF);
}
static void
dma_destroy_dinfo(struct dma_devinfo *dinfo)
{
resource_list_free(&dinfo->ddi_rl);
ofw_bus_gen_destroy_devinfo(&dinfo->ddi_obdinfo);
free(dinfo, M_DEVBUF);
}
static void
ebus_destroy_dinfo(struct ebus_devinfo *edi)
{
resource_list_free(&edi->edi_rl);
ofw_bus_gen_destroy_devinfo(&edi->edi_obdinfo);
free(edi, M_DEVBUF);
}
static int
central_attach(device_t dev)
{
struct central_devinfo *cdi;
struct sbus_regs *reg;
struct central_softc *sc;
phandle_t child;
phandle_t node;
device_t cdev;
int nreg;
int i;
sc = device_get_softc(dev);
node = ofw_bus_get_node(dev);
sc->sc_nrange = OF_getprop_alloc(node, "ranges",
sizeof(*sc->sc_ranges), (void **)&sc->sc_ranges);
if (sc->sc_nrange == -1) {
device_printf(dev, "can't get ranges\n");
return (ENXIO);
}
for (child = OF_child(node); child != 0; child = OF_peer(child)) {
cdi = malloc(sizeof(*cdi), M_DEVBUF, M_WAITOK | M_ZERO);
if (ofw_bus_gen_setup_devinfo(&cdi->cdi_obdinfo, child) != 0) {
free(cdi, M_DEVBUF);
continue;
}
nreg = OF_getprop_alloc(child, "reg", sizeof(*reg),
(void **)®);
if (nreg == -1) {
device_printf(dev, "<%s>: incomplete\n",
cdi->cdi_obdinfo.obd_name);
ofw_bus_gen_destroy_devinfo(&cdi->cdi_obdinfo);
free(cdi, M_DEVBUF);
continue;
}
resource_list_init(&cdi->cdi_rl);
for (i = 0; i < nreg; i++)
resource_list_add(&cdi->cdi_rl, SYS_RES_MEMORY, i,
reg[i].sbr_offset, reg[i].sbr_offset +
reg[i].sbr_size, reg[i].sbr_size);
free(reg, M_OFWPROP);
cdev = device_add_child(dev, NULL, -1);
if (cdev == NULL) {
device_printf(dev, "<%s>: device_add_child failed\n",
cdi->cdi_obdinfo.obd_name);
resource_list_free(&cdi->cdi_rl);
ofw_bus_gen_destroy_devinfo(&cdi->cdi_obdinfo);
free(cdi, M_DEVBUF);
continue;
}
device_set_ivars(cdev, cdi);
}
return (bus_generic_attach(dev));
}
/*
* Bus capability support for GICv3.
* Collects and configures device informations and finally
* adds ITS device as a child of GICv3 in Newbus hierarchy.
*/
static int
gic_v3_ofw_bus_attach(device_t dev)
{
struct gic_v3_ofw_devinfo *di;
device_t child;
phandle_t parent, node;
pcell_t addr_cells, size_cells;
parent = ofw_bus_get_node(dev);
if (parent > 0) {
addr_cells = 2;
OF_getencprop(parent, "#address-cells", &addr_cells,
sizeof(addr_cells));
size_cells = 2;
OF_getencprop(parent, "#size-cells", &size_cells,
sizeof(size_cells));
/* Iterate through all GIC subordinates */
for (node = OF_child(parent); node > 0; node = OF_peer(node)) {
/* Allocate and populate devinfo. */
di = malloc(sizeof(*di), M_GIC_V3, M_WAITOK | M_ZERO);
if (ofw_bus_gen_setup_devinfo(&di->di_dinfo, node)) {
if (bootverbose) {
device_printf(dev,
"Could not set up devinfo for ITS\n");
}
free(di, M_GIC_V3);
continue;
}
/* Initialize and populate resource list. */
resource_list_init(&di->di_rl);
ofw_bus_reg_to_rl(dev, node, addr_cells, size_cells,
&di->di_rl);
/* Should not have any interrupts, so don't add any */
/* Add newbus device for this FDT node */
child = device_add_child(dev, NULL, -1);
if (!child) {
if (bootverbose) {
device_printf(dev,
"Could not add child: %s\n",
di->di_dinfo.obd_name);
}
resource_list_free(&di->di_rl);
ofw_bus_gen_destroy_devinfo(&di->di_dinfo);
free(di, M_GIC_V3);
continue;
}
device_set_ivars(child, di);
}
}
return (bus_generic_attach(dev));
}
void
ndis_free_amem(void *arg)
{
struct ndis_softc *sc = arg;
if (sc->ndis_res_am != NULL)
bus_release_resource(sc->ndis_dev, SYS_RES_MEMORY,
sc->ndis_am_rid, sc->ndis_res_am);
resource_list_free(&sc->ndis_rl);
}
/* Free everything except sdi_name, which is handled separately. */
static void
sbus_destroy_dinfo(struct sbus_devinfo *dinfo)
{
resource_list_free(&dinfo->sdi_rl);
if (dinfo->sdi_compat != NULL)
free(dinfo->sdi_compat, M_OFWPROP);
if (dinfo->sdi_type != NULL)
free(dinfo->sdi_type, M_OFWPROP);
free(dinfo, M_DEVBUF);
}
static void
chipc_child_deleted(device_t dev, device_t child)
{
struct chipc_devinfo *dinfo = device_get_ivars(child);
if (dinfo != NULL) {
resource_list_free(&dinfo->resources);
free(dinfo, M_BHND);
}
device_set_ivars(child, NULL);
}
static int
fdt_lbc_reg_decode(phandle_t node, struct lbc_softc *sc,
struct lbc_devinfo *di)
{
u_long start, end, count;
pcell_t *reg, *regptr;
pcell_t addr_cells, size_cells;
int tuple_size, tuples;
int i, rv, bank;
if (fdt_addrsize_cells(OF_parent(node), &addr_cells, &size_cells) != 0)
return (ENXIO);
tuple_size = sizeof(pcell_t) * (addr_cells + size_cells);
tuples = OF_getprop_alloc(node, "reg", tuple_size, (void **)®);
debugf("addr_cells = %d, size_cells = %d\n", addr_cells, size_cells);
debugf("tuples = %d, tuple size = %d\n", tuples, tuple_size);
if (tuples <= 0)
/* No 'reg' property in this node. */
return (0);
regptr = reg;
for (i = 0; i < tuples; i++) {
bank = fdt_data_get((void *)reg, 1);
di->di_bank = bank;
reg += 1;
/* Get address/size. */
rv = fdt_data_to_res(reg, addr_cells - 1, size_cells, &start,
&count);
if (rv != 0) {
resource_list_free(&di->di_res);
goto out;
}
reg += addr_cells - 1 + size_cells;
/* Calculate address range relative to VA base. */
start = sc->sc_banks[bank].kva + start;
end = start + count - 1;
debugf("reg addr bank = %d, start = %lx, end = %lx, "
"count = %lx\n", bank, start, end, count);
/* Use bank (CS) cell as rid. */
resource_list_add(&di->di_res, SYS_RES_MEMORY, bank, start,
end, count);
}
rv = 0;
out:
free(regptr, M_OFWPROP);
return (rv);
}
int
fdt_reg_to_rl(phandle_t node, struct resource_list *rl)
{
u_long end, count, start;
pcell_t *reg, *regptr;
pcell_t addr_cells, size_cells;
int tuple_size, tuples;
int i, rv;
long busaddr, bussize;
if (fdt_addrsize_cells(OF_parent(node), &addr_cells, &size_cells) != 0)
return (ENXIO);
if (fdt_get_range(OF_parent(node), 0, &busaddr, &bussize)) {
busaddr = 0;
bussize = 0;
}
tuple_size = sizeof(pcell_t) * (addr_cells + size_cells);
tuples = OF_getprop_alloc(node, "reg", tuple_size, (void **)®);
debugf("addr_cells = %d, size_cells = %d\n", addr_cells, size_cells);
debugf("tuples = %d, tuple size = %d\n", tuples, tuple_size);
if (tuples <= 0)
/* No 'reg' property in this node. */
return (0);
regptr = reg;
for (i = 0; i < tuples; i++) {
rv = fdt_data_to_res(reg, addr_cells, size_cells, &start,
&count);
if (rv != 0) {
resource_list_free(rl);
goto out;
}
reg += addr_cells + size_cells;
/* Calculate address range relative to base. */
start += busaddr;
end = start + count - 1;
debugf("reg addr start = %lx, end = %lx, count = %lx\n", start,
end, count);
resource_list_add(rl, SYS_RES_MEMORY, i, start, end,
count);
}
rv = 0;
out:
free(regptr, M_OFWPROP);
return (rv);
}
static int
simplebus_attach(device_t dev)
{
struct simplebus_softc *sc;
struct simplebus_devinfo *di;
phandle_t node;
device_t cdev;
node = ofw_bus_get_node(dev);
sc = device_get_softc(dev);
sc->dev = dev;
sc->node = node;
/*
* Some important numbers
*/
sc->acells = 2;
OF_getencprop(node, "#address-cells", &sc->acells, sizeof(sc->acells));
sc->scells = 1;
OF_getencprop(node, "#size-cells", &sc->scells, sizeof(sc->scells));
if (simplebus_fill_ranges(node, sc) < 0) {
device_printf(dev, "could not get ranges\n");
return (ENXIO);
}
/*
* In principle, simplebus could have an interrupt map, but ignore that
* for now
*/
for (node = OF_child(node); node > 0; node = OF_peer(node)) {
if ((di = simplebus_setup_dinfo(dev, node)) == NULL)
continue;
cdev = device_add_child(dev, NULL, -1);
if (cdev == NULL) {
device_printf(dev, "<%s>: device_add_child failed\n",
di->obdinfo.obd_name);
resource_list_free(&di->rl);
ofw_bus_gen_destroy_devinfo(&di->obdinfo);
free(di, M_DEVBUF);
continue;
}
device_set_ivars(cdev, di);
}
return (bus_generic_attach(dev));
}
static int
mdionexus_ofw_bus_attach(device_t dev)
{
struct simplebus_softc *sc;
struct mdionexus_ofw_devinfo *di;
device_t child;
phandle_t parent, node;
parent = ofw_bus_get_node(dev);
simplebus_init(dev, parent);
sc = (struct simplebus_softc *)device_get_softc(dev);
if (mdionexus_ofw_fill_ranges(parent, sc) < 0) {
device_printf(dev, "could not get ranges\n");
return (ENXIO);
}
/* Iterate through all bus subordinates */
for (node = OF_child(parent); node > 0; node = OF_peer(node)) {
/* Allocate and populate devinfo. */
di = malloc(sizeof(*di), M_THUNDER_MDIO, M_WAITOK | M_ZERO);
if (ofw_bus_gen_setup_devinfo(&di->di_dinfo, node) != 0) {
free(di, M_THUNDER_MDIO);
continue;
}
/* Initialize and populate resource list. */
resource_list_init(&di->di_rl);
ofw_bus_reg_to_rl(dev, node, sc->acells, sc->scells,
&di->di_rl);
#ifndef INTRNG
ofw_bus_intr_to_rl(dev, node, &di->di_rl, NULL);
#endif
/* Add newbus device for this FDT node */
child = device_add_child(dev, NULL, -1);
if (child == NULL) {
resource_list_free(&di->di_rl);
ofw_bus_gen_destroy_devinfo(&di->di_dinfo);
free(di, M_THUNDER_MDIO);
continue;
}
device_set_ivars(child, di);
}
return (0);
}
static void
newbus_device_destroy(device_t dev)
{
struct fdtbus_devinfo *di;
di = device_get_ivars(dev);
if (di == NULL)
return;
free(di->di_name, M_OFWPROP);
free(di->di_type, M_OFWPROP);
free(di->di_compat, M_OFWPROP);
resource_list_free(&di->di_res);
free(di, M_FDTBUS);
}
static int
at91_pinctrl_attach(device_t dev)
{
struct pinctrl_softc *sc;
struct pinctrl_devinfo *di;
phandle_t node;
device_t cdev;
sc = device_get_softc(dev);
node = ofw_bus_get_node(dev);
sc->dev = dev;
sc->node = node;
/*
* Some important numbers
*/
sc->acells = 2;
OF_getencprop(node, "#address-cells", &sc->acells, sizeof(sc->acells));
sc->scells = 1;
OF_getencprop(node, "#size-cells", &sc->scells, sizeof(sc->scells));
if (at91_pinctrl_fill_ranges(node, sc) < 0) {
device_printf(dev, "could not get ranges\n");
return (ENXIO);
}
for (node = OF_child(node); node > 0; node = OF_peer(node)) {
if ((di = at91_pinctrl_setup_dinfo(dev, node)) == NULL)
continue;
cdev = device_add_child(dev, NULL, -1);
if (cdev == NULL) {
device_printf(dev, "<%s>: device_add_child failed\n",
di->obdinfo.obd_name);
resource_list_free(&di->rl);
ofw_bus_gen_destroy_devinfo(&di->obdinfo);
free(di, M_DEVBUF);
continue;
}
device_set_ivars(cdev, di);
}
fdt_pinctrl_register(dev, "atmel,pins");
return (bus_generic_attach(dev));
}
static void
ofw_gpiobus_destroy_devinfo(device_t bus, struct ofw_gpiobus_devinfo *dinfo)
{
int i;
struct gpiobus_ivar *devi;
struct gpiobus_softc *sc;
sc = device_get_softc(bus);
devi = &dinfo->opd_dinfo;
for (i = 0; i < devi->npins; i++) {
if (devi->pins[i] > sc->sc_npins)
continue;
sc->sc_pins[devi->pins[i]].mapped = 0;
}
gpiobus_free_ivars(devi);
resource_list_free(&dinfo->opd_dinfo.rl);
ofw_bus_gen_destroy_devinfo(&dinfo->opd_obdinfo);
free(dinfo, M_DEVBUF);
}
/*
* Since this is not a self-enumerating bus, and since we always add
* children in attach, we have to always delete children here.
*/
static int
gpiobus_detach(device_t dev)
{
struct gpiobus_softc *sc;
struct gpiobus_ivar *devi;
device_t *devlist;
int i, err, ndevs;
sc = GPIOBUS_SOFTC(dev);
KASSERT(mtx_initialized(&sc->sc_mtx),
("gpiobus mutex not initialized"));
GPIOBUS_LOCK_DESTROY(sc);
if ((err = bus_generic_detach(dev)) != 0)
return (err);
if ((err = device_get_children(dev, &devlist, &ndevs)) != 0)
return (err);
for (i = 0; i < ndevs; i++) {
devi = GPIOBUS_IVAR(devlist[i]);
gpiobus_free_ivars(devi);
resource_list_free(&devi->rl);
free(devi, M_DEVBUF);
device_delete_child(dev, devlist[i]);
}
free(devlist, M_TEMP);
rman_fini(&sc->sc_intr_rman);
if (sc->sc_pins) {
for (i = 0; i < sc->sc_npins; i++) {
if (sc->sc_pins[i].name != NULL)
free(sc->sc_pins[i].name, M_DEVBUF);
sc->sc_pins[i].name = NULL;
}
free(sc->sc_pins, M_DEVBUF);
sc->sc_pins = NULL;
}
return (0);
}
static void
gpiobus_hinted_child(device_t bus, const char *dname, int dunit)
{
struct gpiobus_softc *sc = GPIOBUS_SOFTC(bus);
struct gpiobus_ivar *devi;
device_t child;
int irq, pins;
child = BUS_ADD_CHILD(bus, 0, dname, dunit);
devi = GPIOBUS_IVAR(child);
resource_int_value(dname, dunit, "pins", &pins);
if (gpiobus_parse_pins(sc, child, pins)) {
resource_list_free(&devi->rl);
free(devi, M_DEVBUF);
device_delete_child(bus, child);
}
if (resource_int_value(dname, dunit, "irq", &irq) == 0) {
if (bus_set_resource(child, SYS_RES_IRQ, 0, irq, 1) != 0)
device_printf(bus,
"warning: bus_set_resource() failed\n");
}
}
device_t
simplebus_add_device(device_t dev, phandle_t node, u_int order,
const char *name, int unit, struct simplebus_devinfo *di)
{
struct simplebus_devinfo *ndi;
device_t cdev;
if ((ndi = simplebus_setup_dinfo(dev, node, di)) == NULL)
return (NULL);
cdev = device_add_child_ordered(dev, order, name, unit);
if (cdev == NULL) {
device_printf(dev, "<%s>: device_add_child failed\n",
ndi->obdinfo.obd_name);
resource_list_free(&ndi->rl);
ofw_bus_gen_destroy_devinfo(&ndi->obdinfo);
if (di == NULL)
free(ndi, M_DEVBUF);
return (NULL);
}
device_set_ivars(cdev, ndi);
return(cdev);
}
static int
simplebus_attach(device_t dev)
{
device_t dev_child;
struct simplebus_devinfo *di;
struct simplebus_softc *sc;
phandle_t dt_node, dt_child;
sc = device_get_softc(dev);
/*
* Walk simple-bus and add direct subordinates as our children.
*/
dt_node = ofw_bus_get_node(dev);
for (dt_child = OF_child(dt_node); dt_child != 0;
dt_child = OF_peer(dt_child)) {
/* Check and process 'status' property. */
if (!(fdt_is_enabled(dt_child)))
continue;
if (!(fdt_pm_is_enabled(dt_child)))
continue;
di = malloc(sizeof(*di), M_SIMPLEBUS, M_WAITOK | M_ZERO);
if (ofw_bus_gen_setup_devinfo(&di->di_ofw, dt_child) != 0) {
free(di, M_SIMPLEBUS);
device_printf(dev, "could not set up devinfo\n");
continue;
}
resource_list_init(&di->di_res);
if (fdt_reg_to_rl(dt_child, &di->di_res)) {
device_printf(dev,
"%s: could not process 'reg' "
"property\n", di->di_ofw.obd_name);
/* XXX should unmap */
ofw_bus_gen_destroy_devinfo(&di->di_ofw);
free(di, M_SIMPLEBUS);
continue;
}
if (fdt_intr_to_rl(dt_child, &di->di_res, di->di_intr_sl)) {
device_printf(dev, "%s: could not process "
"'interrupts' property\n", di->di_ofw.obd_name);
resource_list_free(&di->di_res);
/* XXX should unmap */
ofw_bus_gen_destroy_devinfo(&di->di_ofw);
free(di, M_SIMPLEBUS);
continue;
}
/* Add newbus device for this FDT node */
dev_child = device_add_child(dev, NULL, -1);
if (dev_child == NULL) {
device_printf(dev, "could not add child: %s\n",
di->di_ofw.obd_name);
resource_list_free(&di->di_res);
/* XXX should unmap */
ofw_bus_gen_destroy_devinfo(&di->di_ofw);
free(di, M_SIMPLEBUS);
continue;
}
#ifdef DEBUG
device_printf(dev, "added child: %s\n\n", di->di_ofw.obd_name);
#endif
device_set_ivars(dev_child, di);
}
return (bus_generic_attach(dev));
}
static int
lbc_attach(device_t dev)
{
struct lbc_softc *sc;
struct lbc_devinfo *di;
struct rman *rm;
u_long offset, start, size;
device_t cdev;
phandle_t node, child;
pcell_t *ranges, *rangesptr;
int tuple_size, tuples;
int par_addr_cells;
int bank, error, i;
sc = device_get_softc(dev);
sc->sc_dev = dev;
sc->sc_mrid = 0;
sc->sc_mres = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &sc->sc_mrid,
RF_ACTIVE);
if (sc->sc_mres == NULL)
return (ENXIO);
sc->sc_bst = rman_get_bustag(sc->sc_mres);
sc->sc_bsh = rman_get_bushandle(sc->sc_mres);
for (bank = 0; bank < LBC_DEV_MAX; bank++) {
bus_space_write_4(sc->sc_bst, sc->sc_bsh, LBC85XX_BR(bank), 0);
bus_space_write_4(sc->sc_bst, sc->sc_bsh, LBC85XX_OR(bank), 0);
}
/*
* Initialize configuration register:
* - enable Local Bus
* - set data buffer control signal function
* - disable parity byte select
* - set ECC parity type
* - set bus monitor timing and timer prescale
*/
bus_space_write_4(sc->sc_bst, sc->sc_bsh, LBC85XX_LBCR, 0);
/*
* Initialize clock ratio register:
* - disable PLL bypass mode
* - configure LCLK delay cycles for the assertion of LALE
* - set system clock divider
*/
bus_space_write_4(sc->sc_bst, sc->sc_bsh, LBC85XX_LCRR, 0x00030008);
bus_space_write_4(sc->sc_bst, sc->sc_bsh, LBC85XX_LTEDR, 0);
bus_space_write_4(sc->sc_bst, sc->sc_bsh, LBC85XX_LTESR, ~0);
bus_space_write_4(sc->sc_bst, sc->sc_bsh, LBC85XX_LTEIR, 0x64080001);
sc->sc_irid = 0;
sc->sc_ires = bus_alloc_resource_any(dev, SYS_RES_IRQ, &sc->sc_irid,
RF_ACTIVE | RF_SHAREABLE);
if (sc->sc_ires != NULL) {
error = bus_setup_intr(dev, sc->sc_ires,
INTR_TYPE_MISC | INTR_MPSAFE, NULL, lbc_intr, sc,
&sc->sc_icookie);
if (error) {
device_printf(dev, "could not activate interrupt\n");
bus_release_resource(dev, SYS_RES_IRQ, sc->sc_irid,
sc->sc_ires);
sc->sc_ires = NULL;
}
}
sc->sc_ltesr = ~0;
rangesptr = NULL;
rm = &sc->sc_rman;
rm->rm_type = RMAN_ARRAY;
rm->rm_descr = "Local Bus Space";
rm->rm_start = 0UL;
rm->rm_end = ~0UL;
error = rman_init(rm);
if (error)
goto fail;
error = rman_manage_region(rm, rm->rm_start, rm->rm_end);
if (error) {
rman_fini(rm);
goto fail;
}
/*
* Process 'ranges' property.
*/
node = ofw_bus_get_node(dev);
if ((fdt_addrsize_cells(node, &sc->sc_addr_cells,
&sc->sc_size_cells)) != 0) {
error = ENXIO;
goto fail;
}
par_addr_cells = fdt_parent_addr_cells(node);
if (par_addr_cells > 2) {
device_printf(dev, "unsupported parent #addr-cells\n");
error = ERANGE;
goto fail;
}
tuple_size = sizeof(pcell_t) * (sc->sc_addr_cells + par_addr_cells +
sc->sc_size_cells);
tuples = OF_getprop_alloc(node, "ranges", tuple_size,
(void **)&ranges);
if (tuples < 0) {
device_printf(dev, "could not retrieve 'ranges' property\n");
error = ENXIO;
goto fail;
}
rangesptr = ranges;
debugf("par addr_cells = %d, addr_cells = %d, size_cells = %d, "
"tuple_size = %d, tuples = %d\n", par_addr_cells,
sc->sc_addr_cells, sc->sc_size_cells, tuple_size, tuples);
start = 0;
size = 0;
for (i = 0; i < tuples; i++) {
/* The first cell is the bank (chip select) number. */
bank = fdt_data_get((void *)ranges, 1);
if (bank < 0 || bank > LBC_DEV_MAX) {
device_printf(dev, "bank out of range: %d\n", bank);
error = ERANGE;
goto fail;
}
ranges += 1;
/*
* Remaining cells of the child address define offset into
* this CS.
*/
offset = fdt_data_get((void *)ranges, sc->sc_addr_cells - 1);
ranges += sc->sc_addr_cells - 1;
/* Parent bus start address of this bank. */
start = fdt_data_get((void *)ranges, par_addr_cells);
ranges += par_addr_cells;
size = fdt_data_get((void *)ranges, sc->sc_size_cells);
ranges += sc->sc_size_cells;
debugf("bank = %d, start = %lx, size = %lx\n", bank,
start, size);
sc->sc_banks[bank].addr = start + offset;
sc->sc_banks[bank].size = size;
/*
* Attributes for the bank.
*
* XXX Note there are no DT bindings defined for them at the
* moment, so we need to provide some defaults.
*/
sc->sc_banks[bank].width = 16;
sc->sc_banks[bank].msel = LBCRES_MSEL_GPCM;
sc->sc_banks[bank].decc = LBCRES_DECC_DISABLED;
sc->sc_banks[bank].atom = LBCRES_ATOM_DISABLED;
sc->sc_banks[bank].wp = 0;
}
/*
* Initialize mem-mappings for the LBC banks (i.e. chip selects).
*/
error = lbc_banks_map(sc);
if (error)
goto fail;
/*
* Walk the localbus and add direct subordinates as our children.
*/
for (child = OF_child(node); child != 0; child = OF_peer(child)) {
di = malloc(sizeof(*di), M_LBC, M_WAITOK | M_ZERO);
if (ofw_bus_gen_setup_devinfo(&di->di_ofw, child) != 0) {
free(di, M_LBC);
device_printf(dev, "could not set up devinfo\n");
continue;
}
resource_list_init(&di->di_res);
if (fdt_lbc_reg_decode(child, sc, di)) {
device_printf(dev, "could not process 'reg' "
"property\n");
ofw_bus_gen_destroy_devinfo(&di->di_ofw);
free(di, M_LBC);
continue;
}
fdt_lbc_fixup(child, sc, di);
/* Add newbus device for this FDT node */
cdev = device_add_child(dev, NULL, -1);
if (cdev == NULL) {
device_printf(dev, "could not add child: %s\n",
di->di_ofw.obd_name);
resource_list_free(&di->di_res);
ofw_bus_gen_destroy_devinfo(&di->di_ofw);
free(di, M_LBC);
continue;
}
debugf("added child name='%s', node=%p\n", di->di_ofw.obd_name,
(void *)child);
device_set_ivars(cdev, di);
}
/*
* Enable the LBC.
*/
lbc_banks_enable(sc);
free(rangesptr, M_OFWPROP);
return (bus_generic_attach(dev));
fail:
free(rangesptr, M_OFWPROP);
bus_release_resource(dev, SYS_RES_MEMORY, sc->sc_mrid, sc->sc_mres);
return (error);
}
static int
acpi_sysres_attach(device_t dev)
{
device_t bus;
struct resource_list_entry *bus_rle, *dev_rle;
struct resource_list *bus_rl, *dev_rl;
int done, type;
u_long start, end, count;
/*
* Loop through all current resources to see if the new one overlaps
* any existing ones. If so, grow the old one up and/or down
* accordingly. Discard any that are wholly contained in the old. If
* the resource is unique, add it to the parent. It will later go into
* the rman pool.
*/
bus = device_get_parent(dev);
dev_rl = BUS_GET_RESOURCE_LIST(bus, dev);
bus_rl = BUS_GET_RESOURCE_LIST(device_get_parent(bus), bus);
STAILQ_FOREACH(dev_rle, dev_rl, link) {
if (dev_rle->type != SYS_RES_IOPORT && dev_rle->type != SYS_RES_MEMORY)
continue;
start = dev_rle->start;
end = dev_rle->end;
count = dev_rle->count;
type = dev_rle->type;
done = FALSE;
STAILQ_FOREACH(bus_rle, bus_rl, link) {
if (bus_rle->type != type)
continue;
/* New resource wholly contained in old, discard. */
if (start >= bus_rle->start && end <= bus_rle->end)
break;
/* New tail overlaps old head, grow existing resource downward. */
if (start < bus_rle->start && end >= bus_rle->start) {
bus_rle->count += bus_rle->start - start;
bus_rle->start = start;
done = TRUE;
}
/* New head overlaps old tail, grow existing resource upward. */
if (start <= bus_rle->end && end > bus_rle->end) {
bus_rle->count += end - bus_rle->end;
bus_rle->end = end;
done = TRUE;
}
/* If we adjusted the old resource, we're finished. */
if (done)
break;
}
/* If we didn't merge with anything, add this resource. */
if (bus_rle == NULL)
bus_set_resource(bus, type, acpi_sysres_rid++, start, count);
}
/* After merging/moving resources to the parent, free the list. */
resource_list_free(dev_rl);
return (0);
}
static int
fdt_localbus_reg_decode(phandle_t node, struct localbus_softc *sc,
struct localbus_devinfo *di)
{
u_long start, end, count;
pcell_t *reg, *regptr;
pcell_t addr_cells, size_cells;
int tuple_size, tuples;
int i, rv, bank;
if (fdt_addrsize_cells(OF_parent(node), &addr_cells, &size_cells) != 0)
return (ENXIO);
tuple_size = sizeof(pcell_t) * (addr_cells + size_cells);
tuples = OF_getprop_alloc(node, "reg", tuple_size, (void **)®);
debugf("addr_cells = %d, size_cells = %d\n", addr_cells, size_cells);
debugf("tuples = %d, tuple size = %d\n", tuples, tuple_size);
if (tuples <= 0)
/* No 'reg' property in this node. */
return (0);
regptr = reg;
for (i = 0; i < tuples; i++) {
bank = fdt_data_get((void *)regptr, 1);
if (bank >= MV_LOCALBUS_MAX_BANKS) {
device_printf(sc->sc_dev, "bank number [%d] out of "
"range\n", bank);
continue;
}
/*
* If device doesn't have virtual to physical mapping don't add
* resources
*/
if (!(sc->sc_banks[bank].mapped)) {
device_printf(sc->sc_dev, "device [%d]: missing memory "
"mapping\n", bank);
continue;
}
di->di_bank = bank;
regptr += 1;
/* Get address/size. */
rv = fdt_data_to_res(regptr, addr_cells - 1, size_cells, &start,
&count);
if (rv != 0) {
resource_list_free(&di->di_res);
goto out;
}
/* Check if enough amount of memory is mapped */
if (sc->sc_banks[bank].size < count) {
device_printf(sc->sc_dev, "device [%d]: not enough "
"memory reserved\n", bank);
continue;
}
regptr += addr_cells - 1 + size_cells;
/* Calculate address range relative to VA base. */
start = sc->sc_banks[bank].va + start;
end = start + count - 1;
debugf("reg addr bank = %d, start = %lx, end = %lx, "
"count = %lx\n", bank, start, end, count);
/* Use bank (CS) cell as rid. */
resource_list_add(&di->di_res, SYS_RES_MEMORY, di->di_bank,
start, end, count);
}
rv = 0;
out:
free(reg, M_OFWPROP);
return (rv);
}
static int
qman_portals_fdt_attach(device_t dev)
{
struct dpaa_portals_softc *sc;
phandle_t node, child, cpu_node;
vm_paddr_t portal_pa, portal_par_pa;
vm_size_t portal_size;
uint32_t addr, paddr, size;
ihandle_t cpu;
int cpu_num, cpus, intr_rid;
struct dpaa_portals_devinfo di;
struct ofw_bus_devinfo ofw_di = {};
cell_t *range;
int nrange;
int i;
cpus = 0;
sc = device_get_softc(dev);
sc->sc_dev = dev;
node = ofw_bus_get_node(dev);
/* Get this node's range */
get_addr_props(ofw_bus_get_node(device_get_parent(dev)), &paddr, &size);
get_addr_props(node, &addr, &size);
nrange = OF_getencprop_alloc(node, "ranges",
sizeof(*range), (void **)&range);
if (nrange < addr + paddr + size)
return (ENXIO);
portal_pa = portal_par_pa = 0;
portal_size = 0;
for (i = 0; i < addr; i++) {
portal_pa <<= 32;
portal_pa |= range[i];
}
for (; i < paddr + addr; i++) {
portal_par_pa <<= 32;
portal_par_pa |= range[i];
}
portal_pa += portal_par_pa;
for (; i < size + paddr + addr; i++) {
portal_size = (uintmax_t)portal_size << 32;
portal_size |= range[i];
}
OF_prop_free(range);
sc->sc_dp_size = portal_size;
sc->sc_dp_pa = portal_pa;
/* Find portals tied to CPUs */
for (child = OF_child(node); child != 0; child = OF_peer(child)) {
if (cpus >= mp_ncpus)
break;
if (!ofw_bus_node_is_compatible(child, "fsl,qman-portal")) {
continue;
}
/* Checkout related cpu */
if (OF_getprop(child, "cpu-handle", (void *)&cpu,
sizeof(cpu)) <= 0) {
cpu = qman_portal_find_cpu(cpus);
if (cpu <= 0)
continue;
}
/* Acquire cpu number */
cpu_node = OF_instance_to_package(cpu);
if (OF_getencprop(cpu_node, "reg", &cpu_num, sizeof(cpu_num)) <= 0) {
device_printf(dev, "Could not retrieve CPU number.\n");
return (ENXIO);
}
cpus++;
if (ofw_bus_gen_setup_devinfo(&ofw_di, child) != 0) {
device_printf(dev, "could not set up devinfo\n");
continue;
}
resource_list_init(&di.di_res);
if (ofw_bus_reg_to_rl(dev, child, addr, size, &di.di_res)) {
device_printf(dev, "%s: could not process 'reg' "
"property\n", ofw_di.obd_name);
ofw_bus_gen_destroy_devinfo(&ofw_di);
continue;
}
if (ofw_bus_intr_to_rl(dev, child, &di.di_res, &intr_rid)) {
device_printf(dev, "%s: could not process "
"'interrupts' property\n", ofw_di.obd_name);
resource_list_free(&di.di_res);
ofw_bus_gen_destroy_devinfo(&ofw_di);
continue;
}
di.di_intr_rid = intr_rid;
if (dpaa_portal_alloc_res(dev, &di, cpu_num))
goto err;
}
ofw_bus_gen_destroy_devinfo(&ofw_di);
return (qman_portals_attach(dev));
err:
resource_list_free(&di.di_res);
ofw_bus_gen_destroy_devinfo(&ofw_di);
qman_portals_detach(dev);
return (ENXIO);
}
static int
arm_gic_fdt_attach(device_t dev)
{
struct arm_gic_fdt_softc *sc = device_get_softc(dev);
phandle_t root, child;
struct gic_devinfo *dinfo;
device_t cdev;
int err;
err = arm_gic_attach(dev);
if (err != 0)
return (err);
root = ofw_bus_get_node(dev);
sc->sc_host_cells = 1;
OF_getencprop(OF_parent(root), "#address-cells", &sc->sc_host_cells,
sizeof(sc->sc_host_cells));
sc->sc_addr_cells = 2;
OF_getencprop(root, "#address-cells", &sc->sc_addr_cells,
sizeof(sc->sc_addr_cells));
sc->sc_size_cells = 2;
OF_getencprop(root, "#size-cells", &sc->sc_size_cells,
sizeof(sc->sc_size_cells));
/* If we have no children don't probe for them */
child = OF_child(root);
if (child == 0)
return (0);
if (gic_fill_ranges(root, sc) < 0) {
device_printf(dev, "could not get ranges\n");
return (ENXIO);
}
for (; child != 0; child = OF_peer(child)) {
dinfo = malloc(sizeof(*dinfo), M_DEVBUF, M_WAITOK | M_ZERO);
if (ofw_bus_gen_setup_devinfo(&dinfo->obdinfo, child) != 0) {
free(dinfo, M_DEVBUF);
continue;
}
resource_list_init(&dinfo->rl);
ofw_bus_reg_to_rl(dev, child, sc->sc_addr_cells,
sc->sc_size_cells, &dinfo->rl);
cdev = device_add_child(dev, NULL, -1);
if (cdev == NULL) {
device_printf(dev, "<%s>: device_add_child failed\n",
dinfo->obdinfo.obd_name);
resource_list_free(&dinfo->rl);
ofw_bus_gen_destroy_devinfo(&dinfo->obdinfo);
free(dinfo, M_DEVBUF);
continue;
}
device_set_ivars(cdev, dinfo);
}
bus_generic_probe(dev);
return (bus_generic_attach(dev));
}
/**
* acpi_dev_free_resource_list - Free resource from %acpi_dev_get_resources().
* @list: The head of the resource list to free.
*/
void acpi_dev_free_resource_list(struct list_head *list)
{
resource_list_free(list);
}
static int
unin_chip_attach(device_t dev)
{
struct unin_chip_softc *sc;
struct unin_chip_devinfo *dinfo;
phandle_t root;
phandle_t child;
phandle_t iparent;
device_t cdev;
cell_t acells, scells;
char compat[32];
char name[32];
u_int irq, reg[3];
int error, i = 0;
sc = device_get_softc(dev);
root = ofw_bus_get_node(dev);
if (OF_getprop(root, "reg", reg, sizeof(reg)) < 8)
return (ENXIO);
acells = scells = 1;
OF_getprop(OF_parent(root), "#address-cells", &acells, sizeof(acells));
OF_getprop(OF_parent(root), "#size-cells", &scells, sizeof(scells));
i = 0;
sc->sc_physaddr = reg[i++];
if (acells == 2) {
sc->sc_physaddr <<= 32;
sc->sc_physaddr |= reg[i++];
}
sc->sc_size = reg[i++];
if (scells == 2) {
sc->sc_size <<= 32;
sc->sc_size |= reg[i++];
}
sc->sc_mem_rman.rm_type = RMAN_ARRAY;
sc->sc_mem_rman.rm_descr = "UniNorth Device Memory";
error = rman_init(&sc->sc_mem_rman);
if (error) {
device_printf(dev, "rman_init() failed. error = %d\n", error);
return (error);
}
error = rman_manage_region(&sc->sc_mem_rman, sc->sc_physaddr,
sc->sc_physaddr + sc->sc_size - 1);
if (error) {
device_printf(dev,
"rman_manage_region() failed. error = %d\n",
error);
return (error);
}
if (unin_chip == NULL)
unin_chip = dev;
/*
* Iterate through the sub-devices
*/
for (child = OF_child(root); child != 0; child = OF_peer(child)) {
dinfo = malloc(sizeof(*dinfo), M_UNIN, M_WAITOK | M_ZERO);
if (ofw_bus_gen_setup_devinfo(&dinfo->udi_obdinfo, child)
!= 0)
{
free(dinfo, M_UNIN);
continue;
}
resource_list_init(&dinfo->udi_resources);
dinfo->udi_ninterrupts = 0;
unin_chip_add_intr(child, dinfo);
/*
* Some Apple machines do have a bug in OF, they miss
* the interrupt entries on the U3 I2C node. That means they
* do not have an entry with number of interrupts nor the
* entry of the interrupt parent handle.
* We define an interrupt and hardwire it to the /u3/mpic
* handle.
*/
if (OF_getprop(child, "name", name, sizeof(name)) <= 0)
device_printf(dev, "device has no name!\n");
if (dinfo->udi_ninterrupts == 0 &&
(strcmp(name, "i2c-bus") == 0 ||
strcmp(name, "i2c") == 0)) {
if (OF_getprop(child, "interrupt-parent", &iparent,
sizeof(iparent)) <= 0) {
iparent = OF_finddevice("/u3/mpic");
device_printf(dev, "Set /u3/mpic as iparent!\n");
}
/* Add an interrupt number 0 to the parent. */
irq = MAP_IRQ(iparent, 0);
resource_list_add(&dinfo->udi_resources, SYS_RES_IRQ,
dinfo->udi_ninterrupts, irq, irq, 1);
dinfo->udi_interrupts[dinfo->udi_ninterrupts] = irq;
dinfo->udi_ninterrupts++;
}
unin_chip_add_reg(child, dinfo);
cdev = device_add_child(dev, NULL, -1);
if (cdev == NULL) {
device_printf(dev, "<%s>: device_add_child failed\n",
dinfo->udi_obdinfo.obd_name);
resource_list_free(&dinfo->udi_resources);
ofw_bus_gen_destroy_devinfo(&dinfo->udi_obdinfo);
free(dinfo, M_UNIN);
continue;
}
device_set_ivars(cdev, dinfo);
}
/*
* Only map the first page, since that is where the registers
* of interest lie.
*/
sc->sc_addr = (vm_offset_t)pmap_mapdev(sc->sc_physaddr, PAGE_SIZE);
sc->sc_version = *(u_int *)sc->sc_addr;
device_printf(dev, "Version %d\n", sc->sc_version);
/*
* Enable the GMAC Ethernet cell and the integrated OpenPIC
* if Open Firmware says they are used.
*/
for (child = OF_child(root); child; child = OF_peer(child)) {
memset(compat, 0, sizeof(compat));
OF_getprop(child, "compatible", compat, sizeof(compat));
if (strcmp(compat, "gmac") == 0)
unin_enable_gmac(dev);
if (strcmp(compat, "chrp,open-pic") == 0)
unin_enable_mpic(dev);
}
/*
* GMAC lives under the PCI bus, so just check if enet is gmac.
*/
child = OF_finddevice("enet");
memset(compat, 0, sizeof(compat));
OF_getprop(child, "compatible", compat, sizeof(compat));
if (strcmp(compat, "gmac") == 0)
unin_enable_gmac(dev);
return (bus_generic_attach(dev));
}
