static int rk_edp_start_aux_transaction(struct rk_edp *edp) { int val; /* Enable AUX CH operation */ if (rk_edp_aux_enable(edp)) { edp_debug("AUX CH enable timeout!\n"); return -1; } /* Is AUX CH command reply received? */ if (rk_edp_is_aux_reply(edp)) { edp_debug("AUX CH command reply failed!\n"); return -1; } /* Clear interrupt source for AUX CH access error */ val = read32(&edp->regs->dp_int_sta); if (val & AUX_ERR) { write32(&edp->regs->dp_int_sta, AUX_ERR); return -1; } /* Check AUX CH error access status */ val = read32(&edp->regs->dp_int_sta); if ((val & AUX_STATUS_MASK) != 0) { edp_debug("AUX CH error happens: %d\n\n", val & AUX_STATUS_MASK); return -1; } return 0; }
static int rk_edp_start_aux_transaction(struct rk3288_edp *regs) { int val, ret; /* Enable AUX CH operation */ ret = rk_edp_aux_enable(regs); if (ret) { debug("AUX CH enable timeout!\n"); return ret; } /* Is AUX CH command reply received? */ if (rk_edp_is_aux_reply(regs)) { debug("AUX CH command reply failed!\n"); return ret; } /* Clear interrupt source for AUX CH access error */ val = readl(®s->dp_int_sta); if (val & AUX_ERR) { writel(AUX_ERR, ®s->dp_int_sta); return -EIO; } /* Check AUX CH error access status */ val = readl(®s->dp_int_sta); if (val & AUX_STATUS_MASK) { debug("AUX CH error happens: %d\n\n", val & AUX_STATUS_MASK); return -EIO; } return 0; }