void lower(VLS& env, defvmrettype& inst, Vlabel b, size_t i) {
switch (arch()) {
case Arch::X64: // fall through
case Arch::PPC64:
env.unit.blocks[b].code[i] = copy{rret_type(), inst.type};
break;
case Arch::ARM:
// For ARM64 we need to clear the bits 8..31 from the type value.
// That allows us to use the resulting register values in
// type comparisons without the need for truncation there.
// We must not touch bits 63..32 as they contain the AUX data.
env.unit.blocks[b].code[i] = andq{
env.unit.makeConst(Vconst{0xffffffff000000ff}),
rret_type(), inst.type, env.unit.makeReg()};
break;
}
}
void lower(VLS& env, syncvmrettype& inst, Vlabel b, size_t i) {
switch (arch()) {
case Arch::X64: // fall through
case Arch::PPC64:
env.unit.blocks[b].code[i] = copy{inst.type, rret_type()};
break;
case Arch::ARM:
// For ARM64 we need to clear the bits 8..31 from the type value.
// That allows us to use the resulting register values in
// type comparisons without the need for truncation there.
// We must not touch bits 63..32 as they contain the AUX data.
lower_impl(env.unit, b, i, [&] (Vout& v) {
v << andq{v.cns(0xffffffff000000ff),
inst.type, rret_type(), v.makeReg()};
});
break;
}
}
void lower(Vunit& unit, syncvmret& inst, Vlabel b, size_t i) {
unit.blocks[b].code[i] = copy2{inst.data, inst.type,
rret_data(), rret_type()};
}
