/* * MC functions. */ int rs690_mc_init(struct radeon_device *rdev) { uint32_t tmp; int r; if (r100_debugfs_rbbm_init(rdev)) { DRM_ERROR("Failed to register debugfs file for RBBM !\n"); } rs690_gpu_init(rdev); rs400_gart_disable(rdev); /* Setup GPU memory space */ rdev->mc.gtt_location = rdev->mc.mc_vram_size; rdev->mc.gtt_location += (rdev->mc.gtt_size - 1); rdev->mc.gtt_location &= ~(rdev->mc.gtt_size - 1); rdev->mc.vram_location = 0xFFFFFFFFUL; r = radeon_mc_setup(rdev); if (r) { return r; } /* Program GPU memory space */ rs600_mc_disable_clients(rdev); if (rs690_mc_wait_for_idle(rdev)) { printk(KERN_WARNING "Failed to wait MC idle while " "programming pipes. Bad things might happen.\n"); } tmp = rdev->mc.vram_location + rdev->mc.mc_vram_size - 1; tmp = REG_SET(RS690_MC_FB_TOP, tmp >> 16); tmp |= REG_SET(RS690_MC_FB_START, rdev->mc.vram_location >> 16); WREG32_MC(RS690_MCCFG_FB_LOCATION, tmp); /* FIXME: Does this reg exist on RS480,RS740 ? */ WREG32(0x310, rdev->mc.vram_location); WREG32(RS690_HDP_FB_LOCATION, rdev->mc.vram_location >> 16); return 0; }
/* * MC functions. */ int rs400_mc_init(struct radeon_device *rdev) { uint32_t tmp; int r; if (r100_debugfs_rbbm_init(rdev)) { DRM_ERROR("Failed to register debugfs file for RBBM !\n"); } rs400_gpu_init(rdev); rs400_gart_disable(rdev); rdev->mc.gtt_location = rdev->mc.mc_vram_size; rdev->mc.gtt_location += (rdev->mc.gtt_size - 1); rdev->mc.gtt_location &= ~(rdev->mc.gtt_size - 1); r = radeon_mc_setup(rdev); if (r) { return r; } r100_mc_disable_clients(rdev); if (r300_mc_wait_for_idle(rdev)) { printk(KERN_WARNING "Failed to wait MC idle while " "programming pipes. Bad things might happen.\n"); } tmp = rdev->mc.vram_location + rdev->mc.mc_vram_size - 1; tmp = REG_SET(RADEON_MC_FB_TOP, tmp >> 16); tmp |= REG_SET(RADEON_MC_FB_START, rdev->mc.vram_location >> 16); WREG32(RADEON_MC_FB_LOCATION, tmp); tmp = RREG32(RADEON_HOST_PATH_CNTL) | RADEON_HP_LIN_RD_CACHE_DIS; WREG32(RADEON_HOST_PATH_CNTL, tmp | RADEON_HDP_SOFT_RESET | RADEON_HDP_READ_BUFFER_INVALIDATE); (void)RREG32(RADEON_HOST_PATH_CNTL); WREG32(RADEON_HOST_PATH_CNTL, tmp); (void)RREG32(RADEON_HOST_PATH_CNTL); return 0; }
void rs690_mc_fini(struct radeon_device *rdev) { rs400_gart_disable(rdev); radeon_gart_table_ram_free(rdev); radeon_gart_fini(rdev); }