static void rtl8723e_dm_initial_gain_sta(struct ieee80211_hw *hw) { struct rtl_priv *rtlpriv = rtl_priv(hw); struct dig_t *dm_digtable = &rtlpriv->dm_digtable; RT_TRACE(rtlpriv, COMP_DIG, DBG_TRACE, "pre_sta_cstate = %x, cur_sta_cstate = %x\n", dm_digtable->pre_sta_cstate, dm_digtable->cur_sta_cstate); if (dm_digtable->pre_sta_cstate == dm_digtable->cur_sta_cstate || dm_digtable->cur_sta_cstate == DIG_STA_BEFORE_CONNECT || dm_digtable->cur_sta_cstate == DIG_STA_CONNECT) { if (dm_digtable->cur_sta_cstate != DIG_STA_DISCONNECT) { dm_digtable->rssi_val_min = rtl8723e_dm_initial_gain_min_pwdb(hw); rtl92c_dm_ctrl_initgain_by_rssi(hw); } } else { dm_digtable->rssi_val_min = 0; dm_digtable->dig_ext_port_stage = DIG_EXT_PORT_STAGE_MAX; dm_digtable->back_val = DM_DIG_BACKOFF_DEFAULT; dm_digtable->cur_igvalue = 0x20; dm_digtable->pre_igvalue = 0; rtl8723e_dm_write_dig(hw); } }
static void rtl8723e_dm_initial_gain_sta(struct ieee80211_hw *hw) { struct rtl_priv *rtlpriv = rtl_priv(hw); RT_TRACE(COMP_DIG, DBG_TRACE, ("presta_connectstate = %x," " cursta_connectctate = %x\n", dm_digtable.presta_connectstate, dm_digtable.cursta_connectctate)); if (dm_digtable.presta_connectstate == dm_digtable.cursta_connectctate || dm_digtable.cursta_connectctate == DIG_STA_BEFORE_CONNECT || dm_digtable.cursta_connectctate == DIG_STA_CONNECT) { if (dm_digtable.cursta_connectctate != DIG_STA_DISCONNECT) { dm_digtable.rssi_val_min = rtl8723e_dm_initial_gain_min_pwdb(hw); rtl92c_dm_ctrl_initgain_by_rssi(hw); } } else { dm_digtable.rssi_val_min = 0; dm_digtable.dig_ext_port_stage = DIG_EXT_PORT_STAGE_MAX; dm_digtable.backoff_val = DM_DIG_BACKOFF_DEFAULT; dm_digtable.cur_igvalue = 0x20; dm_digtable.pre_igvalue = 0; rtl8723e_dm_write_dig(hw); } }
static void rtl8723e_dm_cck_packet_detection_thresh(struct ieee80211_hw *hw) { struct rtl_priv *rtlpriv = rtl_priv(hw); struct dig_t *dm_digtable = &rtlpriv->dm_digtable; if (dm_digtable->cur_sta_cstate == DIG_STA_CONNECT) { dm_digtable->rssi_val_min = rtl8723e_dm_initial_gain_min_pwdb(hw); if (dm_digtable->pre_cck_pd_state == CCK_PD_STAGE_LowRssi) { if (dm_digtable->rssi_val_min <= 25) dm_digtable->cur_cck_pd_state = CCK_PD_STAGE_LowRssi; else dm_digtable->cur_cck_pd_state = CCK_PD_STAGE_HighRssi; } else { if (dm_digtable->rssi_val_min <= 20) dm_digtable->cur_cck_pd_state = CCK_PD_STAGE_LowRssi; else dm_digtable->cur_cck_pd_state = CCK_PD_STAGE_HighRssi; } } else { dm_digtable->cur_cck_pd_state = CCK_PD_STAGE_MAX; } if (dm_digtable->pre_cck_pd_state != dm_digtable->cur_cck_pd_state) { if (dm_digtable->cur_cck_pd_state == CCK_PD_STAGE_LowRssi) { if (rtlpriv->falsealm_cnt.cnt_cck_fail > 800) dm_digtable->cur_cck_fa_state = CCK_FA_STAGE_High; else dm_digtable->cur_cck_fa_state = CCK_FA_STAGE_Low; if (dm_digtable->pre_cck_fa_state != dm_digtable->cur_cck_fa_state) { if (dm_digtable->cur_cck_fa_state == CCK_FA_STAGE_Low) rtl_set_bbreg(hw, RCCK0_CCA, MASKBYTE2, 0x83); else rtl_set_bbreg(hw, RCCK0_CCA, MASKBYTE2, 0xcd); dm_digtable->pre_cck_fa_state = dm_digtable->cur_cck_fa_state; } rtl_set_bbreg(hw, RCCK0_SYSTEM, MASKBYTE1, 0x40); } else { rtl_set_bbreg(hw, RCCK0_CCA, MASKBYTE2, 0xcd); rtl_set_bbreg(hw, RCCK0_SYSTEM, MASKBYTE1, 0x47); } dm_digtable->pre_cck_pd_state = dm_digtable->cur_cck_pd_state; } RT_TRACE(rtlpriv, COMP_DIG, DBG_TRACE, "CCKPDStage=%x\n", dm_digtable->cur_cck_pd_state); }