u2Byte ODM_Read2Byte( IN PDM_ODM_T pDM_Odm, IN u4Byte RegAddr ) { #if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) prtl8192cd_priv priv = pDM_Odm->priv; return RTL_R16(RegAddr); #elif(DM_ODM_SUPPORT_TYPE & ODM_CE) PADAPTER Adapter = pDM_Odm->Adapter; return rtw_read16(Adapter,RegAddr); #elif(DM_ODM_SUPPORT_TYPE & ODM_MP) PADAPTER Adapter = pDM_Odm->Adapter; return PlatformEFIORead2Byte(Adapter, RegAddr); #endif }
u16 ODM_Read2Byte( PDM_ODM_T pDM_Odm, u32 RegAddr ) { #if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) prtl8192cd_priv priv = pDM_Odm->priv; return RTL_R16(RegAddr); #elif(DM_ODM_SUPPORT_TYPE & ODM_CE) struct rtw_adapter * Adapter = pDM_Odm->Adapter; return rtw_read16(Adapter,RegAddr); #elif(DM_ODM_SUPPORT_TYPE & ODM_MP) struct rtw_adapter * Adapter = pDM_Odm->Adapter; return PlatformEFIORead2Byte(Adapter, RegAddr); #endif }
void rtw_hal_check_rxfifo_full(struct adapter *adapter) { struct dvobj_priv *psdpriv = adapter->dvobj; struct debug_priv *pdbgpriv = &psdpriv->drv_dbg; int save_cnt = false; /* switch counter to RX fifo */ /* printk("8723b or 8192e , MAC_667 set 0xf0\n"); */ rtw_write8(adapter, REG_RXERR_RPT+3, rtw_read8(adapter, REG_RXERR_RPT+3)|0xf0); save_cnt = true; /* todo: other chips */ if (save_cnt) { /* rtw_write8(adapter, REG_RXERR_RPT+3, rtw_read8(adapter, REG_RXERR_RPT+3)|0xa0); */ pdbgpriv->dbg_rx_fifo_last_overflow = pdbgpriv->dbg_rx_fifo_curr_overflow; pdbgpriv->dbg_rx_fifo_curr_overflow = rtw_read16(adapter, REG_RXERR_RPT); pdbgpriv->dbg_rx_fifo_diff_overflow = pdbgpriv->dbg_rx_fifo_curr_overflow-pdbgpriv->dbg_rx_fifo_last_overflow; } }
static VOID _InitNormalChipRegPriority( IN PADAPTER Adapter, IN u16 beQ, IN u16 bkQ, IN u16 viQ, IN u16 voQ, IN u16 mgtQ, IN u16 hiQ ) { u16 value16 = (rtw_read16(Adapter, REG_TRXDMA_CTRL) & 0x7); value16 |= _TXDMA_BEQ_MAP(beQ) | _TXDMA_BKQ_MAP(bkQ) | _TXDMA_VIQ_MAP(viQ) | _TXDMA_VOQ_MAP(voQ) | _TXDMA_MGQ_MAP(mgtQ)| _TXDMA_HIQ_MAP(hiQ); rtw_write16(Adapter, REG_TRXDMA_CTRL, value16); }
u32 read_macreg(struct adapter *padapter, u32 addr, u32 sz) { u32 val = 0; switch (sz) { case 1: val = rtw_read8(padapter, addr); break; case 2: val = rtw_read16(padapter, addr); break; case 4: val = rtw_read32(padapter, addr); break; default: val = 0xffffffff; break; } return val; }
int proc_get_read_reg(char *page, char **start, off_t offset, int count, int *eof, void *data) { struct net_device *dev = data; _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); int len = 0; if(proc_get_read_addr==0xeeeeeeee) { *eof = 1; return len; } switch(proc_get_read_len) { case 1: len += snprintf(page + len, count - len, "rtw_read8(0x%x)=0x%x\n", proc_get_read_addr, rtw_read8(padapter, proc_get_read_addr)); break; case 2: len += snprintf(page + len, count - len, "rtw_read16(0x%x)=0x%x\n", proc_get_read_addr, rtw_read16(padapter, proc_get_read_addr)); break; case 4: len += snprintf(page + len, count - len, "rtw_read32(0x%x)=0x%x\n", proc_get_read_addr, rtw_read32(padapter, proc_get_read_addr)); break; default: len += snprintf(page + len, count - len, "error read length=%d\n", proc_get_read_len); break; } *eof = 1; return len; }
void SetHwReg(struct adapter *adapter, u8 variable, u8 *val) { struct hal_com_data *hal_data = GET_HAL_DATA(adapter); DM_ODM_T *odm = &(hal_data->odmpriv); switch (variable) { case HW_VAR_PORT_SWITCH: hw_var_port_switch(adapter); break; case HW_VAR_INIT_RTS_RATE: rtw_warn_on(1); break; case HW_VAR_SEC_CFG: { u16 reg_scr; reg_scr = rtw_read16(adapter, REG_SECCFG); rtw_write16(adapter, REG_SECCFG, reg_scr|SCR_CHK_KEYID|SCR_RxDecEnable|SCR_TxEncEnable); } break; case HW_VAR_SEC_DK_CFG: { struct security_priv *sec = &adapter->securitypriv; u8 reg_scr = rtw_read8(adapter, REG_SECCFG); if (val) { /* Enable default key related setting */ reg_scr |= SCR_TXBCUSEDK; if (sec->dot11AuthAlgrthm != dot11AuthAlgrthm_8021X) reg_scr |= (SCR_RxUseDK|SCR_TxUseDK); } else /* Disable default key related setting */ reg_scr &= ~(SCR_RXBCUSEDK|SCR_TXBCUSEDK|SCR_RxUseDK|SCR_TxUseDK); rtw_write8(adapter, REG_SECCFG, reg_scr); } break; case HW_VAR_DM_FLAG: odm->SupportAbility = *((u32 *)val); break; case HW_VAR_DM_FUNC_OP: if (*((u8 *)val) == true) { /* save dm flag */ odm->BK_SupportAbility = odm->SupportAbility; } else { /* restore dm flag */ odm->SupportAbility = odm->BK_SupportAbility; } break; case HW_VAR_DM_FUNC_SET: if (*((u32 *)val) == DYNAMIC_ALL_FUNC_ENABLE) { struct dm_priv *dm = &hal_data->dmpriv; dm->DMFlag = dm->InitDMFlag; odm->SupportAbility = dm->InitODMFlag; } else { odm->SupportAbility |= *((u32 *)val); } break; case HW_VAR_DM_FUNC_CLR: /* * input is already a mask to clear function * don't invert it again! George, Lucas@20130513 */ odm->SupportAbility &= *((u32 *)val); break; case HW_VAR_AMPDU_MIN_SPACE: /* TODO - Is something needed here? */ break; case HW_VAR_WIRELESS_MODE: /* TODO - Is something needed here? */ break; default: DBG_871X_LEVEL( _drv_always_, FUNC_ADPT_FMT" variable(%d) not defined!\n", FUNC_ADPT_ARG(adapter), variable ); break; } }
_adapter *rtw_sdio_if1_init(struct dvobj_priv *dvobj, const struct sdio_device_id *pdid){ int status = _FAIL; struct net_device *pnetdev; PADAPTER padapter = NULL; u8 mac_addr[ETH_ALEN]; u16 fw_ready; u32 i; _func_enter_; if ((padapter = (_adapter *)rtw_zvmalloc(sizeof(*padapter))) == NULL) { DBG_871X("%s: vmalloc for padapter failed!\n", __FUNCTION__); goto exit; } padapter->dvobj = dvobj; dvobj->if1 = padapter; padapter->interface_type = RTW_SDIO; // 1. init network device data pnetdev = rtw_init_netdev(padapter); if (!pnetdev) goto free_adapter; SET_NETDEV_DEV(pnetdev, &dvobj->intf_data.func->dev); padapter = rtw_netdev_priv(pnetdev); // 2. init driver special setting, interface, OS and hardware relative rtw_set_hal_ops(padapter); // 3. initialize Chip version padapter->intf_start = &sd_intf_start; padapter->intf_stop = &sd_intf_stop; padapter->intf_init = &sdio_init; padapter->intf_deinit = &sdio_deinit; padapter->intf_alloc_irq = &sdio_alloc_irq; padapter->intf_free_irq = &sdio_free_irq; sdio_set_intf_ops(padapter, &padapter->io_ops); // 4. init driver common data if (rtw_init_drv_sw(padapter) == _FAIL) { goto free_adapter; } // 5. get MAC address mac_addr[0] = 0x00; mac_addr[1] = 0xe0; mac_addr[2] = 0x4c; mac_addr[3] = 0xB7; mac_addr[4] = 0x23; mac_addr[5] = 0x00; _rtw_memcpy(pnetdev->dev_addr, mac_addr, ETH_ALEN); #ifdef CONFIG_FWDL // wait for the device boot code ready for (i=0;i<100;i++) { fw_ready = rtw_read16(padapter, SDIO_REG_HCPWM2); if (fw_ready & SDIO_INIT_DONE) { break; } rtw_msleep_os(10); } if (i==100) { DBG_871X("%s: Wait Device Firmware Ready Timeout!!SDIO_REG_HCPWM2 @ 0x%04x\n", __FUNCTION__, fw_ready); goto free_adapter; } #else // wait for the device firmware ready for (i=0;i<100;i++) { fw_ready = rtw_read8(padapter, SDIO_REG_CPU_IND); if (fw_ready & SDIO_SYSTEM_TRX_RDY_IND) { break; } rtw_msleep_os(10); } if (i==100) { DBG_871X("%s: Wait Device Firmware Ready Timeout!!SDIO_REG_CPU_IND @ 0x%04x\n", __FUNCTION__, fw_ready); goto free_adapter; } #endif rtw_hal_disable_interrupt(padapter); DBG_871X("bDriverStopped:%d, bSurpriseRemoved:%d, bup:%d\n" ,padapter->bDriverStopped ,padapter->bSurpriseRemoved ,padapter->bup ); status = _SUCCESS; free_adapter: if (status != _SUCCESS) { if (pnetdev) rtw_free_netdev(pnetdev); else rtw_vmfree((u8*)padapter, sizeof(*padapter)); padapter = NULL; } exit: _func_exit_; return padapter; }