static int s3c2440_plls12_add(struct sys_device *dev) { struct clk *xtal_clk; unsigned long xtal; xtal_clk = clk_get(NULL, "xtal"); if (IS_ERR(xtal_clk)) return PTR_ERR(xtal_clk); xtal = clk_get_rate(xtal_clk); clk_put(xtal_clk); if (xtal == 12000000) { printk(KERN_INFO "Using PLL table for 12MHz crystal\n"); return s3c_plltab_register(s3c2440_plls_12, ARRAY_SIZE(s3c2440_plls_12)); } return 0; }
static int s3c2440_plls169344_add(struct device *dev, struct subsys_interface *sif) { struct clk *xtal_clk; unsigned long xtal; xtal_clk = clk_get(NULL, "xtal"); if (IS_ERR(xtal_clk)) return PTR_ERR(xtal_clk); xtal = clk_get_rate(xtal_clk); clk_put(xtal_clk); if (xtal == 169344000) { printk(KERN_INFO "Using PLL table for 16.9344MHz crystal\n"); return s3c_plltab_register(s3c2440_plls_169344, ARRAY_SIZE(s3c2440_plls_169344)); } return 0; }
static int s3c2410_plls_add(struct device *dev, struct subsys_interface *sif) { return s3c_plltab_register(pll_vals_12MHz, ARRAY_SIZE(pll_vals_12MHz)); }
static int s3c2410_plls_add(struct sys_device *dev) { return s3c_plltab_register(pll_vals_12MHz, ARRAY_SIZE(pll_vals_12MHz)); }