static void serial_setbrg_dev(void) { struct s5p_uart *uart = (struct s5p_uart *)base_port; u32 uclk; u32 baudrate = CONFIG_TTYS0_BAUD; u32 val; // All UARTs share the same clock. uclk = clock_get_periph_rate(PERIPH_ID_UART3); val = uclk / baudrate; writel(val / 16 - 1, &uart->ubrdiv); /* * FIXME(dhendrix): the original uart.h had a "br_rest" value which * does not seem relevant to the exynos5250... not entirely sure * where/if we need to worry about it here */ #if 0 if (s5p_uart_divslot()) writel(udivslot[val % 16], &uart->rest.slot); else writeb(val % 16, &uart->rest.value); #endif }
static void __maybe_unused s5p_serial_baud(struct s5p_uart *uart, uint uclk, int baudrate) { u32 val; val = uclk / baudrate; writel(val / 16 - 1, &uart->ubrdiv); if (s5p_uart_divslot()) writew(udivslot[val % 16], &uart->rest.slot); else writeb(val % 16, &uart->rest.value); }
void serial_setbrg_dev(const int dev_index) { struct s5p_uart *const uart = s5p_get_base_uart(dev_index); u32 uclk = get_uart_clk(dev_index); u32 baudrate = gd->baudrate; u32 val; val = uclk / baudrate; writel(val / 16 - 1, &uart->ubrdiv); if (s5p_uart_divslot()) writew(udivslot[val % 16], &uart->rest.slot); else writeb(val % 16, &uart->rest.value); }
static void serial_setbrg_dev(struct s5p_uart *uart) { u32 uclk; u32 val; // All UARTs share the same clock. uclk = clock_get_periph_rate(PERIPH_ID_UART3); val = uclk / default_baudrate(); write32(&uart->ubrdiv, val / 16 - 1); /* * FIXME(dhendrix): the original uart.h had a "br_rest" value which * does not seem relevant to the exynos5420... not entirely sure * where/if we need to worry about it here */ #if 0 if (s5p_uart_divslot()) writel(udivslot[val % 16], &uart->rest.slot); else writeb(val % 16, &uart->rest.value); #endif }