/** * Cell internal flush function. Send the current batch buffer to all SPUs. * If flags & CELL_FLUSH_WAIT, do not return until the SPUs are idle. * \param flags bitmask of flags CELL_FLUSH_WAIT, or zero */ void cell_flush_int(struct cell_context *cell, unsigned flags) { static boolean flushing = FALSE; /* recursion catcher */ uint i; ASSERT(!flushing); flushing = TRUE; if (flags & CELL_FLUSH_WAIT) { STATIC_ASSERT(sizeof(opcode_t) % 16 == 0); opcode_t *cmd = (opcode_t*) cell_batch_alloc16(cell, sizeof(opcode_t)); *cmd[0] = CELL_CMD_FINISH; } cell_batch_flush(cell); #if 0 /* Send CMD_FINISH to all SPUs */ for (i = 0; i < cell->num_spus; i++) { send_mbox_message(cell_global.spe_contexts[i], CELL_CMD_FINISH); } #endif if (flags & CELL_FLUSH_WAIT) { /* Wait for ack */ for (i = 0; i < cell->num_spus; i++) { uint k = wait_mbox_message(cell_global.spe_contexts[i]); assert(k == CELL_CMD_FINISH); } } flushing = FALSE; }
/** * Send the a RENDER command to all SPUs to have them render the prims * in the current prim_buffer. */ void cell_flush_prim_buffer(struct cell_context *cell) { uint i; if (cell->prim_buffer.num_verts == 0) return; for (i = 0; i < cell->num_spus; i++) { struct cell_command_render *render = &cell_global.command[i].render; render->prim_type = PIPE_PRIM_TRIANGLES; render->num_verts = cell->prim_buffer.num_verts; render->front_winding = cell->rasterizer->front_winding; render->vertex_size = cell->vertex_info->size * 4; render->xmin = cell->prim_buffer.xmin; render->ymin = cell->prim_buffer.ymin; render->xmax = cell->prim_buffer.xmax; render->ymax = cell->prim_buffer.ymax; render->vertex_data = &cell->prim_buffer.vertex; ASSERT_ALIGN16(render->vertex_data); send_mbox_message(cell_global.spe_contexts[i], CELL_CMD_RENDER); } cell->prim_buffer.num_verts = 0; cell->prim_buffer.xmin = 1e100; cell->prim_buffer.ymin = 1e100; cell->prim_buffer.xmax = -1e100; cell->prim_buffer.ymax = -1e100; /* XXX temporary, need to double-buffer the prim buffer until we get * a real command buffer/list system. */ cell_flush(&cell->pipe, 0x0); }
/** * Tell all the SPUs to stop/exit. * This is done when the driver's exiting / cleaning up. */ void cell_spu_exit(struct cell_context *cell) { uint i; for (i = 0; i < cell->num_spus; i++) { send_mbox_message(cell_global.spe_contexts[i], CELL_CMD_EXIT); } /* wait for threads to exit */ for (i = 0; i < cell->num_spus; i++) { void *value; pthread_join(cell_global.spe_threads[i], &value); cell_global.spe_threads[i] = 0; cell_global.spe_contexts[i] = 0; } }
/** * Run the vertex shader on all vertices in the vertex queue. * Called by the draw module when the vertx cache needs to be flushed. */ void cell_vertex_shader_queue_flush(struct draw_context *draw) { #if 0 struct cell_context *const cell = (struct cell_context *) draw->driver_private; struct cell_command_vs *const vs = &cell_global.command[0].vs; uint64_t *batch; struct cell_array_info *array_info; unsigned i, j; struct cell_attribute_fetch_code *cf; assert(draw->vs.queue_nr != 0); /* XXX: do this on statechange: */ draw_update_vertex_fetch(draw); cell_update_vertex_fetch(draw); batch = cell_batch_alloc(cell, sizeof(batch[0]) + sizeof(*cf)); batch[0] = CELL_CMD_STATE_ATTRIB_FETCH; cf = (struct cell_attribute_fetch_code *) (&batch[1]); cf->base = (uint64_t) cell->attrib_fetch.store; cf->size = ROUNDUP16((unsigned)((void *) cell->attrib_fetch.csr - (void *) cell->attrib_fetch.store)); for (i = 0; i < draw->vertex_fetch.nr_attrs; i++) { const enum pipe_format format = draw->vertex_element[i].src_format; const unsigned count = ((pf_size_x(format) != 0) + (pf_size_y(format) != 0) + (pf_size_z(format) != 0) + (pf_size_w(format) != 0)); const unsigned size = pf_size_x(format) * count; batch = cell_batch_alloc(cell, sizeof(batch[0]) + sizeof(*array_info)); batch[0] = CELL_CMD_STATE_VS_ARRAY_INFO; array_info = (struct cell_array_info *) &batch[1]; assert(draw->vertex_fetch.src_ptr[i] != NULL); array_info->base = (uintptr_t) draw->vertex_fetch.src_ptr[i]; array_info->attr = i; array_info->pitch = draw->vertex_fetch.pitch[i]; array_info->size = size; array_info->function_offset = cell->attrib_fetch_offsets[i]; } batch = cell_batch_alloc(cell, sizeof(batch[0]) + sizeof(struct pipe_viewport_state)); batch[0] = CELL_CMD_STATE_VIEWPORT; (void) memcpy(&batch[1], &draw->viewport, sizeof(struct pipe_viewport_state)); { uint64_t uniforms = (uintptr_t) draw->user.constants; batch = cell_batch_alloc(cell, 2 *sizeof(batch[0])); batch[0] = CELL_CMD_STATE_UNIFORMS; batch[1] = uniforms; } cell_batch_flush(cell); vs->opcode = CELL_CMD_VS_EXECUTE; vs->nr_attrs = draw->vertex_fetch.nr_attrs; (void) memcpy(vs->plane, draw->plane, sizeof(draw->plane)); vs->nr_planes = draw->nr_planes; for (i = 0; i < draw->vs.queue_nr; i += SPU_VERTS_PER_BATCH) { const unsigned n = MIN2(SPU_VERTS_PER_BATCH, draw->vs.queue_nr - i); for (j = 0; j < n; j++) { vs->elts[j] = draw->vs.queue[i + j].elt; vs->vOut[j] = (uintptr_t) draw->vs.queue[i + j].vertex; } for (/* empty */; j < SPU_VERTS_PER_BATCH; j++) { vs->elts[j] = vs->elts[0]; vs->vOut[j] = (uintptr_t) draw->vs.queue[i + j].vertex; } vs->num_elts = n; send_mbox_message(cell_global.spe_contexts[0], CELL_CMD_VS_EXECUTE); cell_flush_int(cell, CELL_FLUSH_WAIT); } draw->vs.post_nr = draw->vs.queue_nr; draw->vs.queue_nr = 0; #else assert(0); #endif }