//************************************************************************ void tone(uint8_t _pin, unsigned int frequency, unsigned long duration) { // uint32_t tonePeriod; uint8_t port; // Should have an error check here for pin number out of range. //* there is no standard on the number of pins. Since we want this to work on all versions of the PIC32 //* I have set it to 112 for now which is the largest I/O pin count on a pic32 if ((frequency > 0) && (_pin < (NUM_DIGITAL_PINS))) { // If a tone is currently playing on a different pin, the function is // documented to have no effect. If playing on the same pin, change // the frequency. If not currently playing, initialize the timer. // This is currently hard coded to use timer1. if (tone_pin == 255) { // No tone currently playing. Init the timer. T1CON = TACON_PS_256; setIntVector(_TIMER_1_VECTOR, Timer1Handler); clearIntFlag(_TIMER_1_IRQ); setIntPriority(_TIMER_1_VECTOR, _T1_IPL_IPC, _T1_SPL_IPC); setIntEnable(_TIMER_1_IRQ); } else if (_pin != tone_pin) { // Tone currently playing on another pin. ignore this call. return; } // Determine which port and bit are requested. tone_pin = _pin; port = digitalPinToPort(_pin); tone_pin_port = (p32_ioport *)portRegisters(port); tone_pin_mask = digitalPinToBitMask(_pin); // Ensure that the pin is a digital output pinMode(_pin, OUTPUT); // Duration 0 means to play forever until stopped. Other values // mean to play for that many milliseconds. if (duration > 0) { timer1_toggle_count = (2 * frequency * duration) / 1000; } else { timer1_toggle_count = -1; } TMR1 = 0; PR1 = ((__PIC32_pbClk / 256) / 2 / frequency); T1CONSET = TACON_ON; } }
void RTCCClass::begin() { setIntVector(_RTCC_VECTOR, __RTCCInterrupt); setIntPriority(_RTCC_VECTOR, 3, 0); clearIntFlag(_RTCC_IRQ); setIntEnable(_RTCC_IRQ); /*Ensure the secondary oscillator is enabled and ready, i.e. OSCCON<1>=1, OSCCON<22>=1, and RTCC write is enabled i.e. RTCWREN (RTCCON<3>) =1;*/ UNLOCK RTCCONbits.RTCWREN = 1; RTCCONbits.ON = 1; OSCCONSET = 0x00400002; LOCK _validity = RTCC_VAL_NOT; // 0: very unsure! }
const NWADP * GetMRF24GAdaptor(MACADDR *pUseThisMac, HRRHEAP hAdpHeap, IPSTATUS * pStatus) { // get our pins set up WF_HIBERNATE_IO = 0; WF_HIBERNATE_TRIS = 0; WF_RESET_IO = 0; WF_RESET_TRIS = 0; // Enable the WiFi WF_CS_IO = 1; WF_CS_TRIS = 0; WF_INT_TRIS = 1; // register our interrupt vectors setIntVector(WF_INT_VEC, _WFInterrupt); setIntPriority(WF_INT_VEC, 3, 0); if (hAdpHeap == NULL) { AssignStatusSafely(pStatus, ipsNoHeapGiven); return(NULL); } AssignStatusSafely(pStatus, ipsSuccess); wfmrf24.priv.initStatus = ForceIPStatus((InitMask | WF_INIT_ERROR_SPI_NOT_CONNECTED)); wfmrf24.priv.connectionStatus = ForceIPStatus((InitMask | WF_EVENT_INITIALIZATION)); wfmrf24.priv.cScanResults = -1; wfmrf24.adpMRF24G.hAdpHeap = hAdpHeap; wfmrf24.priv.pIpStackBeingTx = NULL; memset(&wfmrf24.priv.ffptRead, 0, sizeof(FFPT)); memset(&wfmrf24.priv.ffptWrite, 0, sizeof(FFPT)); // save away our MAC if (pUseThisMac != NULL) { memcpy(&wfmrf24.adpMRF24G.mac, pUseThisMac, sizeof(MACADDR)); } else { memcpy(&wfmrf24.adpMRF24G.mac, &MACNONE, sizeof(MACADDR)); } WF_Init(); return(&wfmrf24.adpMRF24G); }
void LowPower_::snooze(unsigned long ms) { uint32_t f_pb = getPeripheralClock(); if (switchToLPRC()) { f_pb = 31250; } float baseclock = f_pb; uint8_t ps = 0; float f = 1.0 / (ms / 1000.0); if (baseclock / f > 0xFFFFFFFF) { baseclock = f_pb / 2; ps = 1; } if (baseclock / f > 0xFFFFFFFF) { baseclock = f_pb / 4; ps = 2; } if (baseclock / f > 0xFFFFFFFF) { baseclock = f_pb / 8; ps = 3; } if (baseclock / f > 0xFFFFFFFF) { baseclock = f_pb / 8; ps = 3; } if (baseclock / f > 0xFFFFFFFF) { baseclock = f_pb / 16; ps = 4; } if (baseclock / f > 0xFFFFFFFF) { baseclock = f_pb / 32; ps = 5; } if (baseclock / f > 0xFFFFFFFF) { baseclock = f_pb / 64; ps = 6; } if (baseclock / f > 0xFFFFFFFF) { baseclock = f_pb / 256; ps = 7; } uint32_t tcon4 = T4CON; uint32_t tpr4 = PR4; uint32_t tmr4 = TMR4; uint32_t tcon5 = T5CON; uint32_t tpr5 = PR5; uint32_t tmr5 = TMR5; int ipl; int spl; T4CON = 0; T5CON = 0; T4CONbits.TCKPS = ps; T4CONbits.T32 = 1; uint32_t pr = baseclock / f; PR4 = pr & 0xFFFF; PR5 = pr >> 16; isrFunc origIsr = setIntVector(_TIMER_5_VECTOR, _timerWakeup); getIntPriority(_TIMER_5_VECTOR, &ipl, &spl); setIntPriority(_TIMER_5_VECTOR, 5, 0); int en = setIntEnable(_TIMER_5_IRQ); clearIntFlag(_TIMER_5_IRQ); TMR4 = 0; TMR5 = 0; // If we're going to do this we need to ensure the two timers are enabled! enableTimer4(); enableTimer5(); int cten = clearIntEnable(_CORE_TIMER_IRQ); T4CONbits.TON = 1; enterIdleMode(); restoreIntEnable(_CORE_TIMER_IRQ, cten); T4CONbits.TON = 0; setIntPriority(_TIMER_5_VECTOR, ipl, spl); setIntVector(_TIMER_5_VECTOR, origIsr); restoreIntEnable(_TIMER_5_IRQ, en); T5CON = tcon5; PR5 = tpr5; TMR5 = tmr5; T4CON = tcon4; PR4 = tpr4; TMR4 = tmr4; restoreSystemClock(); }
void VGA::initializeDevice() { _vgaDevice = this; if (_hsync_pin == 0 || _vsync_pin == 0) { return; } memset((void *)_buffer0, 0, ((Width/8)+1) * Height); #if VGA_USE_DOUBLE_BUFFER memset((void *)_buffer1, 0, ((Width/8)+1) * Height); bufferNumber = 0; activeBuffer = _buffer0; vgaBuffer = _buffer1; #else bufferNumber = 0; activeBuffer = _buffer0; vgaBuffer = _buffer0; #endif _hsync_port->tris.clr = _hsync_pin; _vsync_port->tris.clr = _vsync_pin; // First we need to set up a timer that will trigger at the different times. T2CONbits.TCKPS = 0; // No prescaler PR2 = 0xFFFF; setIntVector(_TIMER_2_VECTOR, vgaProcess); setIntPriority(_TIMER_2_VECTOR, 6, 0); clearIntFlag(_TIMER_2_IRQ); setIntEnable(_TIMER_2_IRQ); // Now congfigure SPI4 for display data transmission. SPI4CON = 0; SPI4CONbits.MSTEN = 1; SPI4CONbits.STXISEL = 0b11; // Interrupt when one byte in buffer #if VGA_USE_HI_RES SPI4BRG = 0; // This will set how big each pixel is. #else SPI4BRG = 1; // This will set how big each pixel is. #endif SPI4CONbits.ON = 1; // And now a DMA channel for transferring the data DCH0SSA = ((unsigned int)vgaBuffer) & 0x1FFFFFFF; DCH0DSA = ((unsigned int)&SPI4BUF) & 0x1FFFFFFF; DCH0SSIZ = (Width / 8) + 1; DCH0DSIZ = 1; DCH0CSIZ = 1; DCH0ECONbits.SIRQEN = 1; DCH0ECONbits.CHSIRQ = _SPI4_TX_IRQ; DCH0CONbits.CHAEN = 0; DCH0CONbits.CHEN = 0; DCH0CONbits.CHPRI = 3; vgaVsyncPort = _vsync_port; vgaHsyncPort = _hsync_port; vgaVsyncMask = _vsync_pin; vgaHsyncMask = _hsync_pin; vgaWidth = (Width/8) + 1; vgaHeight = Height; vgaBufSize = vgaWidth * vgaHeight; clearIntEnable(_CORE_TIMER_IRQ); // setIntPriority(_CORE_TIMER_VECTOR, 5, 0); VSYNC_OFF HSYNC_OFF DMACONbits.ON = 1; T2CONbits.ON = 1; // Turn on the timer }
DTWI::DTWI(p32_i2c * ptwiC, uint8_t irqBusC, uint8_t vecC, uint8_t iplC, uint8_t splC, uint8_t pinSCLC, uint8_t pinSDAC) { int bnIRQ = (irqBusC % 32); // IE and IF bit locations uint32_t bmI2C = 0; // make sure we don't assert a stop condition fStop = false; fMasterMode = false; // slave mode is sort of always on // clear IO buffers iReadNext = 0; iReadLast = 0; iWriteNext = 0; iWriteLast = 0; addr = addrGenCall; iSession = 0; // passed in values ptwi = ptwiC; ptwi->ixCon.reg = 0; // make sure the I2C device is OFF irqBus = irqBusC; vec = vecC; ipl = iplC; spl = splC; pinSCL = pinSCLC; pinSDA = pinSDAC; // set priority and sub priority setIntPriority(vec, ipl, spl); // MZ has 2 more vectors to worry about #if defined(__PIC32MZXX__) // the MZ part works off of offset tables // We are given the BUS VEC, and we must fill in the // the SLAVE and MASTER VECs as well setIntVector(vec+1, getIntVector(vec)); setIntVector(vec+2, getIntVector(vec)); // and set the priorities for the other 2 vectors. setIntPriority(vec+1, ipl, spl); setIntPriority(vec+2, ipl, spl); #endif // calculated values pregIfs = (((p32_regset *)&IFS0) + (irqBus / 32)); pregIec = (((p32_regset *)&IEC0) + (irqBus / 32)); bitB = (I2C_BUS_COLLISION_EVENT) << bnIRQ; bitMASK = 0; bmI2C = bitB | (bitB << shiftSlave) | (bitB << shiftMaster); // Disable the interrupt because we don't want to call this until after the begin() pregIec->clr = bmI2C; // Clear the interrupt flags pregIfs->clr = bmI2C; // init the state machine state curState = I2C_IDLE; // put a default of 100KHz // use F_CPU because __PIC32_pbClk is not set up yet // as constructor run before MPIDE Init; however, this would be the correct // value at this point as noone has the chance to change the clock freq // later we can use __PIC32_pbClk; which is used in masterStart ptwi->ixBrg.reg = (F_CPU/FQ100KHz/2) - (((F_CPU / 10000000) * 26) / 25) - 2; // put the slave general call address ptwi->ixAdd.reg = addrGenCall; ptwi->ixCon.reg = 0; // turn everything OFF ptwi->ixStat.reg = 0; // clear the status bits as well }
void HardwareSerial::begin(unsigned long baudRate, uint8_t address) { /* Initialize the receive buffer. */ purge(); #if defined(__PIC32_PPS__) // set the pins to digital, just in case they // are analog pins. The serial controller will not // set these to digital. pinMode(pinTx, INPUT); // let serial controller set as output, keep tri-stated for now. pinMode(pinRx, INPUT); /* Map the UART TX to the appropriate pin. */ mapPps(pinTx, ppsTx); /* Map the UART RX to the appropriate pin. */ mapPps(pinRx, ppsRx); // the only UART on a non-PPS MX that conflicts with an analog // pin is UART5 on MX 5,6,& 7 64 pin parts only. #elif __PIC32_PINS__ == 64 && (defined(__PIC32MX5XX__) || defined(__PIC32MX6XX__) || defined(__PIC32MX7XX__)) // see if this is UART5 if(uart == ((p32_uart *) _UART5_BASE_ADDRESS)) { // RB8 is AN8 & U5RX // RB14 is AN14 & U5TX // set as digital pins AD1PCFGbits.PCFG8 = 1; AD1PCFGbits.PCFG14 = 1; } #endif setIntVector(vec, isr); /* Set the interrupt privilege level and sub-privilege level */ setIntPriority(vec, ipl, spl); // MZ has 2 more vectors to worry about #if defined(__PIC32MZXX__) // the MZ part works off of offset tables // we must fill in the tx and rx VECs to point // to the ERR VEC so all 3 VECs use the same ISR setIntVector(vec+1, isr); setIntVector(vec+2, isr); // and set the priorities for the other 2 vectors. setIntPriority(vec+1, ipl, spl); setIntPriority(vec+2, ipl, spl); #endif /* Clear the interrupt flags, and set the interrupt enables for the ** interrupts used by this UART. */ ifs->clr = bit_rx + bit_tx + bit_err; //clear all interrupt flags iec->clr = bit_rx + bit_tx + bit_err; //disable all interrupts iec->set = bit_rx; //enable rx interrupts /* Initialize the UART itself. ** http://www.chipkit.org/forum/viewtopic.php?f=7&t=213&p=948#p948 ** Use high baud rate divisor for bauds over LOW_HIGH_BAUD_SPLIT */ uart->uxMode.reg = 0; uart->uxSta.reg = 0; if (baudRate < LOW_HIGH_BAUD_SPLIT) { // calculate actual BAUD generate value. uart->uxBrg.reg = ((__PIC32_pbClk / 16 / baudRate) - 1); // set to 9 data bits, no parity uart->uxMode.set = 0b11 << _UARTMODE_PDSEL; } else { // calculate actual BAUD generate value. uart->uxBrg.reg = ((__PIC32_pbClk / 4 / baudRate) - 1); // set to 9 data bits, no parity uart->uxMode.set = (1 << _UARTMODE_BRGH) + (0b11 << _UARTMODE_PDSEL); } // set address of RS485 slave, enable transmitter and receiver and auto address detection uart->uxSta.set = (1 << _UARTSTA_ADM_EN) + (address << _UARTSTA_ADDR) + (1 << _UARTSTA_UTXEN) + (1 << _UARTSTA_URXEN); enableAddressDetection(); // enable auto address detection uart->uxMode.set = 1 << _UARTMODE_ON; // enable UART module }