void uos_init (void)
{
set_mem(cscon);
uart_init (&uart, 0, 90, KHZ, 115200);
#if 0
/* Стираем экран. */
printf (&uart, "\33[H\33[2J");
printf (&uart, "\nTesting memory on LDE-Vega board\n");
printf (&uart, "Generator %d.%d MHz, CPU clock %d.%d MHz, bus clock %d.%d MHz\n",
ELVEES_CLKIN/1000, ELVEES_CLKIN/100%10, KHZ/1000, KHZ/100%10,
MPORT_KHZ/1000, MPORT_KHZ/100%10);
#ifdef ENABLE_ICACHE
puts (&uart, "Instruction cache enabled\n");
#else
puts (&uart, "Instruction cache disabled\n");
#endif
#ifdef ENABLE_DCACHE
puts (&uart, "Data cache enabled\n");
#else
puts (&uart, "Data cache disabled\n");
#endif
printf (&uart, " CRPLL = %08X\n", MC_CRPLL);
printf (&uart, " CSCON0 = %08X\n", MC_CSCON0);
printf (&uart, " CSCON3 = %08X\n", MC_CSCON3);
printf (&uart, " SDRCON = %08X\n", MC_SDRCON);
printf (&uart, " SDRTMR = %08X\n", MC_SDRTMR);
printf (&uart, " SDRTMR = %08X\n", MC_SDRTMR);
#endif
task_create (main_console, 0, "console", 1, stack_console, sizeof (stack_console));
}
int
ressl_config_set_key_mem(struct ressl_config *config, const uint8_t *key,
size_t len)
{
if (config->key_mem)
explicit_bzero(config->key_mem, config->key_len);
return set_mem(&config->key_mem, &config->key_len, key, len);
}
static int
tls_keypair_set_key_mem(struct tls_keypair *keypair, const uint8_t *key,
size_t len)
{
if (keypair->key_mem != NULL)
explicit_bzero(keypair->key_mem, keypair->key_len);
return set_mem(&keypair->key_mem, &keypair->key_len, key, len);
}
void TIFGroup::load_input_line(NeuronID i, const char * buf)
{
float vmem,vampa,vgaba;
NeuronID vref;
sscanf (buf,"%f %f %f %u",&vmem,&vampa,&vgaba,&vref);
if ( localrank(i) ) {
NeuronID trans = global2rank(i);
set_mem(trans,vmem);
set_ampa(trans,vampa);
set_gaba(trans,vgaba);
gsl_vector_ushort_set (ref, trans, vref);
}
}
void EditBuffer(int address) {
unsigned long addr, data;
char c, *cp, str[128];
int n, radix, nadr;
if ((mem == NULL) || (memlen == 0)) {
printf("No allocated memory to edit\n");
return;
}
printf("EditMemory: [?]Help [/]Open [CR]Next [.]Exit [x]Hex [d]Dec\n\n");
addr = address;
radix = 16;
c = '\n';
while (1) {
if (radix == 16) {
if (c=='\n') printf("%24s 0x%04x: 0x%08x ", get_name(addr), (int) addr, (int) get_mem(addr));
} else {
if (c=='\n') printf("%24s %04d: %5d ", get_name(addr), (int) addr, (int) get_mem(addr));
}
c = (char) getchar();
if (c == '/') {
bzero((void *) str, 128); n = 0;
while ((c != '\n') && (n < 128)) c = str[n++] = (char) getchar();
nadr = strtoul(str,&cp,radix);
if (cp != str) addr = nadr;
}
else if (c == 'x') { radix = 16; if (addr) addr--; continue; }
else if (c == 'd') { radix = 10; if (addr) addr--; continue; }
else if (c == '.') { c = getchar(); printf("\n"); break; }
else if (c == 'q') { c = getchar(); printf("\n"); break; }
else if (c == '\n') { addr += dwd; if (addr >= memlen) {addr = 0; printf("\n----\n");} }
else if (c == '?') { printf("[?]Help [/]Open [CR]Next [.]Exit [x]Hex [d]Dec\n"); }
else {
bzero((void *) str, 128); n = 0;
str[n++] = c;
while ((c != '\n') && (n < 128)) c = str[n++] = (char) getchar();
data = strtoul(str,&cp,radix);
if (cp != str) set_mem(addr,data);
}
}
}
int main()
{
struct proc *p;
int procs,i;
set_mem('0');
procs = load_progs();
if (procs < 0)
return 1;
if (sched_init() != 0) {
fprintf(stderr, "Scheduler init failed\n");
return 1;
}
msg_init();
for (i=0; i<procs; i++) {
p = &proc_table[i];
/* set up the process */
memset(p, '0', sizeof(struct proc));
p->c = 'F';
p->stack_base = 0;
p->pid = i;
int2word(i*100, p->br);
int2word(99, p->lr);
/* schedule process */
sched_reset(i);
sched_resume(i);
}
/* print_mem(); */
sched_run();
/* print_mem(); */
return 0;
}
void PPU::write_register(byte num, byte val) {
int cycles;
switch(num) {
case 0:
pctrl = val;
cycles = mach->cpu->get_cycle_count() * 3;
if(pctrl & (1<<7)) {
if(((pstat & (1<<7)) || (cycles - vbl_off <= 2)) && !nmi_occurred) {
mach->request_nmi();
nmi_occurred = true;
}
} else {
nmi_occurred = false;
if(cycles - last_nmi < 6) {
mach->suppress_nmi();
}
}
taddr &= (~(0x3 << 10));
taddr |= (val & 0x3) << 10;
break;
case 1:
pmask = val;
break;
case 3:
obj_addr = val;
break;
case 4:
obj_mem[obj_addr] = val;
obj_addr += 1;
obj_addr &= 0xff;
break;
case 5:
if(latch) {
taddr &= (~0x73e0);
taddr |= (val >> 3) << 5;
taddr |= (val & 0x7) << 12;
} else {
taddr &= ~0x1f;
taddr |= val >> 3;
xoff = val & 0x7;
fine_x = val & 0x7;
}
latch = !latch;
break;
case 6:
if(latch) {
taddr &= ~0xff;
taddr |= val;
vaddr = taddr;
a12high = vaddr & 0x1000;
} else {
taddr &= 0xff;
taddr |= (val & 0x3f) << 8;
}
latch = !latch;
break;
case 7:
set_mem(vaddr, val);
if(pctrl & (1 << 2)) {
vaddr += 32;
} else {
vaddr += 1;
}
vaddr &= 0x3fff;
a12high = vaddr & 0x1000;
break;
}
int
ressl_config_set_cert_mem(struct ressl_config *config, const uint8_t *cert,
size_t len)
{
return set_mem(&config->cert_mem, &config->cert_len, cert, len);
}
int cpy_mem(MIPS simulateur, int source, int cible){
set_mem(simulateur, cible, get_mem(simulateur, source));
return 1;
}
virtual void set_reg(sys_bus_addr addr, uint32_t data) {
set_mem(addr, static_cast<const void*>(&data), 1);
}
int
tls_config_set_ca_mem(struct tls_config *config, const uint8_t *ca, size_t len)
{
return set_mem(&config->ca_mem, &config->ca_len, ca, len);
}
//push a byte onto the stack and update the stack pointer
void CPU::push(byte val) {
set_mem(s-- | 0x100, val);
}
//push a word onto the stack and update the stack pointer
void CPU::push2(word val) {
s -= 2;
word ss = 0x0100;
set_mem(ss | (s + 1), val & 0xff);
set_mem(ss | (s + 2), val >> 8);
}
int CPU::execute_inst(Instruction inst) {
//stringstream inststr;
//inststr << HEX4(pc) << " " << inst << dump_regs();
//log(inststr.str());
byte t;
byte a7, m7, r7;
word result;
switch(inst.op.op) {
case NOP:
case DOP:
case TOP:
break;
case JMP:
pc = inst.addr;
break;
case JSR:
push2(pc-1);
pc = inst.addr;
break;
case RTS:
get_mem(0x100 | s);
pc = pop2()+1;
get_mem(pc);
break;
case RTI:
get_mem(0x100 | s);
p = (pop() | (1<<5)) & (~B);
pc = pop2();
if(get_flag(I))
m->scheduled_irq = -1;
else if(m->irq_waiting)
m->scheduled_irq = 1;
break;
case BRK:
pc += 1;
p |= B;
irq();
break;
case BCS:
branch(get_flag(C), inst);
break;
case BCC:
branch(!get_flag(C), inst);
break;
case BEQ:
branch(get_flag(Z), inst);
break;
case BNE:
branch(!get_flag(Z), inst);
break;
case BVS:
branch(get_flag(V), inst);
break;
case BVC:
branch(!get_flag(V), inst);
break;
case BPL:
branch(!get_flag(N), inst);
break;
case BMI:
branch(get_flag(N), inst);
break;
case BIT:
t = inst.operand;
set_flag(N, t & (1 << 7));
set_flag(V, t & (1 << 6));
set_flag(Z, (t & a) == 0);
break;
case CMP:
compare(a, inst.operand);
break;
case CPY:
compare(y, inst.operand);
break;
case CPX:
compare(x, inst.operand);
break;
case CLC:
set_flag(C, false);
break;
case CLD:
set_flag(D, false);
break;
case CLV:
set_flag(V, false);
break;
case CLI:
set_flag(I, false);
break;
case SED:
set_flag(D, true);
break;
case SEC:
set_flag(C, true);
break;
case SEI:
set_flag(I, true);
break;
case LDA:
a = inst.operand;
set_nz(a);
break;
case STA:
set_mem(inst.addr, a);
break;
case LDX:
x = inst.operand;
set_nz(x);
break;
case STX:
set_mem(inst.addr, x);
break;
case LDY:
y = inst.operand;
set_nz(y);
break;
case STY:
set_mem(inst.addr, y);
break;
case LAX:
a = inst.operand;
x = inst.operand;
set_nz(a);
break;
case SAX:
set_mem(inst.addr, a & x);
break;
case PHP:
push(p | B);
break;
case PLP:
get_mem(0x100|s);
p = (pop() | (1 << 5)) & (~B);
break;
case PLA:
get_mem(0x100|s);
a = pop();
set_nz(a);
break;
case PHA:
push(a);
break;
case AND:
a &= inst.operand;
set_nz(a);
break;
case AAC:
a &= inst.operand;
set_nz(a);
set_flag(C, a & 0x80);
break;
case ORA:
a |= inst.operand;
set_nz(a);
break;
case EOR:
a ^= inst.operand;
set_nz(a);
break;
case ADC:
a7 = a & (1 << 7);
m7 = inst.operand & (1 << 7);
result = a + inst.operand;
if(get_flag(C)) {
result += 1;
}
a = result & 0xff;
set_flag(C, result > 0xff);
set_nz(a);
r7 = a & (1 << 7);
set_flag(V, !((a7 != m7) || ((a7 == m7) && (m7 == r7))));
break;
case SBC:
a7 = a & (1 << 7);
m7 = inst.operand & (1 << 7);
result = a - inst.operand;
if(!get_flag(C)) {
result -= 1;
}
a = result & 0xff;
set_flag(C, result < 0x100);
set_nz(a);
r7 = a & (1 << 7);
set_flag(V, !((a7 == m7) || ((a7 != m7) && (r7 == a7))));
break;
case INX:
x += 1;
set_nz(x);
break;
case INY:
y += 1;
set_nz(y);
break;
case DEX:
x -= 1;
set_nz(x);
break;
case DEY:
y -= 1;
set_nz(y);
break;
case INC:
set_mem(inst.addr, inst.operand);
inst.operand += 1;
inst.operand &= 0xff;
set_nz(inst.operand);
set_mem(inst.addr, inst.operand);
break;
case DEC:
set_mem(inst.addr, inst.operand);
inst.operand -= 1;
inst.operand &= 0xff;
set_nz(inst.operand);
set_mem(inst.addr, inst.operand);
break;
case DCP:
set_mem(inst.addr, inst.operand);
set_mem(inst.addr, (inst.operand -1) & 0xff);
compare(a, (inst.operand-1)&0xff);
break;
case ISB:
set_mem(inst.addr, inst.operand);
inst.operand = (inst.operand + 1) & 0xff;
set_mem(inst.addr, inst.operand);
a7 = a & (1 << 7);
m7 = inst.operand & (1 << 7);
result = a - inst.operand;
if(!get_flag(C)) {
result -= 1;
}
a = result & 0xff;
set_flag(C, result < 0x100);
set_nz(a);
r7 = a & (1 << 7);
set_flag(V, !((a7 == m7) || ((a7 != m7) && (r7 == a7))));
break;
case LSR_A:
set_flag(C, a & 1);
a >>= 1;
set_nz(a);
break;
case LSR:
set_flag(C, inst.operand & 1);
set_mem(inst.addr, inst.operand);
inst.operand >>= 1;
set_mem(inst.addr, inst.operand);
set_nz(inst.operand);
break;
case ASL_A:
set_flag(C, a & (1 << 7));
a <<= 1;
set_nz(a);
break;
case ASL:
set_flag(C, inst.operand & (1 << 7));
set_mem(inst.addr, inst.operand);
inst.operand <<= 1;
set_mem(inst.addr, inst.operand);
set_nz(inst.operand);
break;
case ASR:
a &= inst.operand;
set_flag(C, a & 1);
a >>= 1;
set_nz(a);
break;
case ARR:
a &= inst.operand;
a >>= 1;
if(get_flag(C))
a |= 0x80;
set_flag(C, a & (1<<6));
set_flag(V, ((a & (1<<5))<<1) ^ (a & (1<<6)));
set_nz(a);
break;
case TSX:
x = s;
set_nz(x);
break;
case TXS:
s = x;
break;
case TYA:
a = y;
set_nz(a);
break;
case TXA:
a = x;
set_nz(a);
break;
case ATX:
a |= 0xff;
a &= inst.operand;
x = a;
set_nz(x);
break;
case AXS:
x = a & x;
result = x - inst.operand;
set_flag(C, result < 0x100);
x = result & 0xff;
set_nz(x);
break;
case SYA:
t = y & (inst.args[1] + 1);
if(!inst.extra_cycles)
set_mem(inst.addr, t);
else
inst.extra_cycles = 0;
break;
case SXA:
t = x & (inst.args[1] + 1);
if(!inst.extra_cycles)
set_mem(inst.addr, t);
else
inst.extra_cycles = 0;
break;
case ROR_A:
t = a & 1;
a >>= 1;
if(get_flag(C))
a |= 1 << 7;
set_flag(C, t);
set_nz(a);
break;
case ROR:
t = inst.operand & 1;
set_mem(inst.addr, inst.operand);
inst.operand >>= 1;
if(get_flag(C))
inst.operand |= 1 << 7;
set_flag(C, t);
set_mem(inst.addr, inst.operand);
set_nz(inst.operand);
break;
case ROL_A:
t = a & (1 << 7);
a <<= 1;
if(get_flag(C))
a |= 1;
set_flag(C, t);
set_nz(a);
break;
case ROL:
t = inst.operand & (1 << 7);
set_mem(inst.addr, inst.operand);
inst.operand <<= 1;
if(get_flag(C))
inst.operand |= 1;
set_flag(C, t);
set_mem(inst.addr, inst.operand);
set_nz(inst.operand);
break;
case TAY:
y = a;
set_nz(y);
break;
case TAX:
x = a;
set_nz(x);
break;
case RLA:
t = inst.operand & (1 << 7);
set_mem(inst.addr, inst.operand);
inst.operand <<= 1;
if(get_flag(C))
inst.operand |= 1;
set_flag(C, t);
set_mem(inst.addr, inst.operand);
a &= inst.operand;
set_nz(a);
break;
case SLO:
set_flag(C, inst.operand & (1 << 7));
set_mem(inst.addr, inst.operand);
inst.operand <<= 1;
set_mem(inst.addr, inst.operand);
a |= inst.operand;
set_nz(a);
break;
case SRE:
set_flag(C, inst.operand & 1);
set_mem(inst.addr, inst.operand);
inst.operand >>= 1;
set_mem(inst.addr, inst.operand);
a ^= inst.operand;
set_nz(a);
break;
case RRA:
t = inst.operand & 1;
set_mem(inst.addr, inst.operand);
inst.operand >>= 1;
if(get_flag(C))
inst.operand |= 1 << 7;
set_mem(inst.addr, inst.operand);
a7 = a & (1 << 7);
m7 = inst.operand & (1 << 7);
result = a + inst.operand;
if(t) {
result += 1;
}
a = result & 0xff;
set_flag(C, result > 0xff);
set_nz(a);
r7 = a & (1 << 7);
set_flag(V, !((a7 != m7) || ((a7 == m7) && (m7 == r7))));
break;
case XAA:
case AXA:
case XAS:
case LAR:
break;
default:
cout << "Unsupported opcode! " << int(inst.opcode) << endl;
cout << inst.op.op << endl;
cout << opnames[inst.op.op] << endl;
throw new runtime_error("Unsupported opcode");
break;
}
int inst_cycles = cycle_count - prev_cycles;
prev_cycles = cycle_count;
//cycle_count += inst.op.cycles + inst.extra_cycles;
return inst_cycles;
}
static int
tls_keypair_set_cert_mem(struct tls_keypair *keypair, const uint8_t *cert,
size_t len)
{
return set_mem(&keypair->cert_mem, &keypair->cert_len, cert, len);
}