void board_init_f(ulong dummy) { struct udevice *pinctrl, *dev; struct rk3188_pmu *pmu; int ret; /* Example code showing how to enable the debug UART on RK3188 */ #ifdef EARLY_UART #include <asm/arch/grf_rk3188.h> /* Enable early UART on the RK3188 */ #define GRF_BASE 0x20008000 struct rk3188_grf * const grf = (void *)GRF_BASE; rk_clrsetreg(&grf->gpio1b_iomux, GPIO1B1_MASK << GPIO1B1_SHIFT | GPIO1B0_MASK << GPIO1B0_SHIFT, GPIO1B1_UART2_SOUT << GPIO1B1_SHIFT | GPIO1B0_UART2_SIN << GPIO1B0_SHIFT); /* * Debug UART can be used from here if required: * * debug_uart_init(); * printch('a'); * printhex8(0x1234); * printascii("string"); */ debug_uart_init(); printch('s'); printch('p'); printch('l'); printch('\n'); #endif ret = spl_early_init(); if (ret) { debug("spl_early_init() failed: %d\n", ret); hang(); } rockchip_timer_init(); ret = rockchip_get_clk(&dev); if (ret) { debug("CLK init failed: %d\n", ret); return; } /* * Recover the bootrom's stackpointer. * For whatever reason needs to run after rockchip_get_clk. */ pmu = syscon_get_first_range(ROCKCHIP_SYSCON_PMU); if (IS_ERR(pmu)) error("pmu syscon returned %ld\n", PTR_ERR(pmu)); SAVE_SP_ADDR = readl(&pmu->sys_reg[2]); ret = uclass_get_device(UCLASS_PINCTRL, 0, &pinctrl); if (ret) { debug("Pinctrl init failed: %d\n", ret); return; } ret = uclass_get_device(UCLASS_RAM, 0, &dev); if (ret) { debug("DRAM init failed: %d\n", ret); return; } setup_arm_clock(); #if defined(CONFIG_ROCKCHIP_SPL_BACK_TO_BROM) && !defined(CONFIG_SPL_BOARD_INIT) back_to_bootrom(); #endif }
void board_init_f(ulong dummy) { struct udevice *pinctrl, *dev; int ret; /* Example code showing how to enable the debug UART on RK3188 */ #ifdef EARLY_UART #include <asm/arch/grf_rk3188.h> /* Enable early UART on the RK3188 */ #define GRF_BASE 0x20008000 struct rk3188_grf * const grf = (void *)GRF_BASE; rk_clrsetreg(&grf->gpio1b_iomux, GPIO1B1_MASK << GPIO1B1_SHIFT | GPIO1B0_MASK << GPIO1B0_SHIFT, GPIO1B1_UART2_SOUT << GPIO1B1_SHIFT | GPIO1B0_UART2_SIN << GPIO1B0_SHIFT); /* * Debug UART can be used from here if required: * * debug_uart_init(); * printch('a'); * printhex8(0x1234); * printascii("string"); */ debug_uart_init(); printch('s'); printch('p'); printch('l'); printch('\n'); #endif ret = spl_early_init(); if (ret) { debug("spl_early_init() failed: %d\n", ret); hang(); } ret = rockchip_get_clk(&dev); if (ret) { debug("CLK init failed: %d\n", ret); return; } ret = uclass_get_device(UCLASS_PINCTRL, 0, &pinctrl); if (ret) { debug("Pinctrl init failed: %d\n", ret); return; } ret = uclass_get_device(UCLASS_RAM, 0, &dev); if (ret) { debug("DRAM init failed: %d\n", ret); return; } setup_arm_clock(); #if CONFIG_IS_ENABLED(ROCKCHIP_BACK_TO_BROM) && !defined(CONFIG_SPL_BOARD_INIT) back_to_bootrom(BROM_BOOT_NEXTSTAGE); #endif }