void sio2_serialIn(u8 value){ u16 ctrl=0x0002; if (sio2.packet.sendArray3[sio2.cmdport] && (sio2.cmdlength==0)) { sio2.cmdlength=(sio2.packet.sendArray3[sio2.cmdport] >> 8) & 0x1FF; ctrl &= ~0x2000; ctrl |= (sio2.packet.sendArray3[sio2.cmdport] & 1) << 13; //sioWriteCtrl16(SIO_RESET); sioWriteCtrl16(ctrl); PSXDMA_LOG("sio2_fifoIn: ctrl = %x, cmdlength = %x, cmdport = %d (%x)", ctrl, sio2.cmdlength, sio2.cmdport, sio2.packet.sendArray3[sio2.cmdport]); sio2.cmdport++; }
void sio2_setCtrl(u32 value){ sio2.ctrl=value; if (sio2.ctrl & 1){ //recv packet //handle data that had been sent iopIntcIrq( 17 ); //SBUS sio2.recvIndex=0; sio2.ctrl &= ~1; } else { // send packet //clean up sio2.packet.sendSize=0; //reset size sio2.cmdport=0; sio2.cmdlength=0; sioWriteCtrl16(SIO_RESET); } }
void psxHwWrite16(u32 add, u16 value) { switch (add) { case 0x1f801040: sioWrite8((unsigned char)value); sioWrite8((unsigned char)(value>>8)); #ifdef PAD_LOG PAD_LOG ("sio write16 %x, %x\n", add&0xf, value); #endif return; case 0x1f801044: sioWriteStat16(value); #ifdef PAD_LOG PAD_LOG ("sio write16 %x, %x\n", add&0xf, value); #endif return; case 0x1f801048: sioWriteMode16(value); #ifdef PAD_LOG PAD_LOG ("sio write16 %x, %x\n", add&0xf, value); #endif return; case 0x1f80104a: // control register sioWriteCtrl16(value); #ifdef PAD_LOG PAD_LOG ("sio write16 %x, %x\n", add&0xf, value); #endif return; case 0x1f80104e: // baudrate register sioWriteBaud16(value); #ifdef PAD_LOG PAD_LOG ("sio write16 %x, %x\n", add&0xf, value); #endif return; #ifdef ENABLE_SIO1API case 0x1f801050: SIO1_writeData16(value); return; case 0x1f801054: SIO1_writeStat16(value); return; case 0x1f80105a: SIO1_writeCtrl16(value); return; case 0x1f80105e: SIO1_writeBaud16(value); return; #endif case 0x1f801070: #ifdef PSXHW_LOG PSXHW_LOG("IREG 16bit write %x\n", value); #endif if (Config.Sio) psxHu16ref(0x1070) |= SWAPu16(0x80); if (Config.SpuIrq) psxHu16ref(0x1070) |= SWAPu16(0x200); psxHu16ref(0x1070) &= SWAPu16((psxHu16(0x1074) & value)); return; case 0x1f801074: #ifdef PSXHW_LOG PSXHW_LOG("IMASK 16bit write %x\n", value); #endif psxHu16ref(0x1074) = SWAPu16(value); if (psxHu16ref(0x1070) & value) new_dyna_set_event(PSXINT_NEWDRC_CHECK, 1); return; case 0x1f801100: #ifdef PSXHW_LOG PSXHW_LOG("COUNTER 0 COUNT 16bit write %x\n", value); #endif psxRcntWcount(0, value); return; case 0x1f801104: #ifdef PSXHW_LOG PSXHW_LOG("COUNTER 0 MODE 16bit write %x\n", value); #endif psxRcntWmode(0, value); return; case 0x1f801108: #ifdef PSXHW_LOG PSXHW_LOG("COUNTER 0 TARGET 16bit write %x\n", value); #endif psxRcntWtarget(0, value); return; case 0x1f801110: #ifdef PSXHW_LOG PSXHW_LOG("COUNTER 1 COUNT 16bit write %x\n", value); #endif psxRcntWcount(1, value); return; case 0x1f801114: #ifdef PSXHW_LOG PSXHW_LOG("COUNTER 1 MODE 16bit write %x\n", value); #endif psxRcntWmode(1, value); return; case 0x1f801118: #ifdef PSXHW_LOG PSXHW_LOG("COUNTER 1 TARGET 16bit write %x\n", value); #endif psxRcntWtarget(1, value); return; case 0x1f801120: #ifdef PSXHW_LOG PSXHW_LOG("COUNTER 2 COUNT 16bit write %x\n", value); #endif psxRcntWcount(2, value); return; case 0x1f801124: #ifdef PSXHW_LOG PSXHW_LOG("COUNTER 2 MODE 16bit write %x\n", value); #endif psxRcntWmode(2, value); return; case 0x1f801128: #ifdef PSXHW_LOG PSXHW_LOG("COUNTER 2 TARGET 16bit write %x\n", value); #endif psxRcntWtarget(2, value); return; default: if (add>=0x1f801c00 && add<0x1f801e00) { SPU_writeRegister(add, value); return; } psxHu16ref(add) = SWAPu16(value); #ifdef PSXHW_LOG PSXHW_LOG("*Unknown 16bit write at address %x value %x\n", add, value); #endif return; } psxHu16ref(add) = SWAPu16(value); #ifdef PSXHW_LOG PSXHW_LOG("*Known 16bit write at address %x value %x\n", add, value); #endif }