static int stm32_spdifrx_hw_params(struct snd_pcm_substream *substream,
struct snd_pcm_hw_params *params,
struct snd_soc_dai *cpu_dai)
{
struct stm32_spdifrx_data *spdifrx = snd_soc_dai_get_drvdata(cpu_dai);
int data_size = params_width(params);
int fmt;
switch (data_size) {
case 16:
fmt = SPDIFRX_DRFMT_PACKED;
spdifrx->dma_params.addr_width = DMA_SLAVE_BUSWIDTH_2_BYTES;
break;
case 32:
fmt = SPDIFRX_DRFMT_LEFT;
spdifrx->dma_params.addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
break;
default:
dev_err(&spdifrx->pdev->dev, "Unexpected data format\n");
return -EINVAL;
}
snd_soc_dai_init_dma_data(cpu_dai, NULL, &spdifrx->dma_params);
return regmap_update_bits(spdifrx->regmap, STM32_SPDIFRX_CR,
SPDIFRX_CR_DRFMT_MASK,
SPDIFRX_CR_DRFMTSET(fmt));
}
static int sirf_usp_pcm_dai_probe(struct snd_soc_dai *dai)
{
struct sirf_usp *usp = snd_soc_dai_get_drvdata(dai);
snd_soc_dai_init_dma_data(dai, &usp->playback_dma_data,
&usp->capture_dma_data);
return 0;
}
static int stm32_sai_dai_probe(struct snd_soc_dai *cpu_dai)
{
struct stm32_sai_sub_data *sai = dev_get_drvdata(cpu_dai->dev);
sai->dma_params.addr = (dma_addr_t)(sai->phys_addr + STM_SAI_DR_REGX);
sai->dma_params.maxburst = 1;
/* Buswidth will be set by framework at runtime */
sai->dma_params.addr_width = DMA_SLAVE_BUSWIDTH_UNDEFINED;
if (STM_SAI_IS_PLAYBACK(sai))
snd_soc_dai_init_dma_data(cpu_dai, &sai->dma_params, NULL);
else
snd_soc_dai_init_dma_data(cpu_dai, NULL, &sai->dma_params);
return 0;
}
static int ux500_msp_dai_of_probe(struct snd_soc_dai *dai)
{
struct ux500_msp_i2s_drvdata *drvdata = dev_get_drvdata(dai->dev);
struct snd_dmaengine_dai_dma_data *playback_dma_data;
struct snd_dmaengine_dai_dma_data *capture_dma_data;
playback_dma_data = devm_kzalloc(dai->dev,
sizeof(*playback_dma_data),
GFP_KERNEL);
if (!playback_dma_data)
return -ENOMEM;
capture_dma_data = devm_kzalloc(dai->dev,
sizeof(*capture_dma_data),
GFP_KERNEL);
if (!capture_dma_data)
return -ENOMEM;
playback_dma_data->addr = drvdata->msp->playback_dma_data.tx_rx_addr;
capture_dma_data->addr = drvdata->msp->capture_dma_data.tx_rx_addr;
playback_dma_data->maxburst = 4;
capture_dma_data->maxburst = 4;
snd_soc_dai_init_dma_data(dai, playback_dma_data, capture_dma_data);
return 0;
}
static int s3c2412_i2s_probe(struct snd_soc_dai *dai)
{
int ret;
pr_debug("Entered %s\n", __func__);
snd_soc_dai_init_dma_data(dai, &s3c2412_i2s_pcm_stereo_out,
&s3c2412_i2s_pcm_stereo_in);
ret = s3c_i2sv2_probe(dai, &s3c2412_i2s, S3C2410_PA_IIS);
if (ret)
return ret;
s3c2412_i2s.dma_capture = &s3c2412_i2s_pcm_stereo_in;
s3c2412_i2s.dma_playback = &s3c2412_i2s_pcm_stereo_out;
s3c2412_i2s.iis_cclk = devm_clk_get(dai->dev, "i2sclk");
if (IS_ERR(s3c2412_i2s.iis_cclk)) {
pr_err("failed to get i2sclk clock\n");
return PTR_ERR(s3c2412_i2s.iis_cclk);
}
/* Set MPLL as the source for IIS CLK */
clk_set_parent(s3c2412_i2s.iis_cclk, clk_get(NULL, "mpll"));
clk_prepare_enable(s3c2412_i2s.iis_cclk);
s3c2412_i2s.iis_cclk = s3c2412_i2s.iis_pclk;
/* Configure the I2S pins (GPE0...GPE4) in correct mode */
s3c_gpio_cfgall_range(S3C2410_GPE(0), 5, S3C_GPIO_SFN(2),
S3C_GPIO_PULL_NONE);
return 0;
}
static int jz4740_i2s_dai_probe(struct snd_soc_dai *dai)
{
struct jz4740_i2s *i2s = snd_soc_dai_get_drvdata(dai);
uint32_t conf;
clk_prepare_enable(i2s->clk_aic);
jz4740_i2c_init_pcm_config(i2s);
snd_soc_dai_init_dma_data(dai, &i2s->playback_dma_data,
&i2s->capture_dma_data);
if (i2s->version >= JZ_I2S_JZ4780) {
conf = (7 << JZ4780_AIC_CONF_FIFO_RX_THRESHOLD_OFFSET) |
(8 << JZ4780_AIC_CONF_FIFO_TX_THRESHOLD_OFFSET) |
JZ_AIC_CONF_OVERFLOW_PLAY_LAST |
JZ_AIC_CONF_I2S |
JZ_AIC_CONF_INTERNAL_CODEC;
} else {
conf = (7 << JZ_AIC_CONF_FIFO_RX_THRESHOLD_OFFSET) |
(8 << JZ_AIC_CONF_FIFO_TX_THRESHOLD_OFFSET) |
JZ_AIC_CONF_OVERFLOW_PLAY_LAST |
JZ_AIC_CONF_I2S |
JZ_AIC_CONF_INTERNAL_CODEC;
}
jz4740_i2s_write(i2s, JZ_REG_AIC_CONF, JZ_AIC_CONF_RESET);
jz4740_i2s_write(i2s, JZ_REG_AIC_CONF, conf);
return 0;
}
static int omap_mcpdm_probe(struct snd_soc_dai *dai)
{
struct omap_mcpdm *mcpdm = snd_soc_dai_get_drvdata(dai);
int ret;
pm_runtime_enable(mcpdm->dev);
/* Disable lines while request is ongoing */
pm_runtime_get_sync(mcpdm->dev);
omap_mcpdm_write(mcpdm, MCPDM_REG_CTRL, 0x00);
ret = request_irq(mcpdm->irq, omap_mcpdm_irq_handler, 0, "McPDM",
(void *)mcpdm);
pm_runtime_put_sync(mcpdm->dev);
if (ret) {
dev_err(mcpdm->dev, "Request for IRQ failed\n");
pm_runtime_disable(mcpdm->dev);
}
/* Configure McPDM threshold values */
mcpdm->config[SNDRV_PCM_STREAM_PLAYBACK].threshold = 2;
mcpdm->config[SNDRV_PCM_STREAM_CAPTURE].threshold =
MCPDM_UP_THRES_MAX - 3;
snd_soc_dai_init_dma_data(dai,
&mcpdm->dma_data[SNDRV_PCM_STREAM_PLAYBACK],
&mcpdm->dma_data[SNDRV_PCM_STREAM_CAPTURE]);
return ret;
}
static int sirf_audio_port_dai_probe(struct snd_soc_dai *dai)
{
struct sirf_audio_port *port = snd_soc_dai_get_drvdata(dai);
snd_soc_dai_init_dma_data(dai, &port->playback_dma_data,
&port->capture_dma_data);
return 0;
}
static int axi_spdif_dai_probe(struct snd_soc_dai *dai)
{
struct axi_spdif *spdif = snd_soc_dai_get_drvdata(dai);
snd_soc_dai_init_dma_data(dai, &spdif->dma_data, NULL);
return 0;
}
static int img_i2s_out_dai_probe(struct snd_soc_dai *dai)
{
struct img_i2s_out *i2s = snd_soc_dai_get_drvdata(dai);
snd_soc_dai_init_dma_data(dai, &i2s->dma_data, NULL);
return 0;
}
static int fsl_esai_dai_probe(struct snd_soc_dai *dai)
{
struct fsl_esai *esai_priv = snd_soc_dai_get_drvdata(dai);
snd_soc_dai_init_dma_data(dai, &esai_priv->dma_params_tx,
&esai_priv->dma_params_rx);
return 0;
}
static int axi_i2s_dai_probe(struct snd_soc_dai *dai)
{
struct axi_i2s *i2s = snd_soc_dai_get_drvdata(dai);
snd_soc_dai_init_dma_data(dai, &i2s->playback_dma_data,
&i2s->capture_dma_data);
return 0;
}
static int zx_spdif_dai_probe(struct snd_soc_dai *dai)
{
struct zx_spdif_info *zx_spdif = dev_get_drvdata(dai->dev);
snd_soc_dai_set_drvdata(dai, zx_spdif);
zx_spdif->dma_data.addr = zx_spdif->mapbase + ZX_DATA;
zx_spdif->dma_data.maxburst = 8;
snd_soc_dai_init_dma_data(dai, &zx_spdif->dma_data, NULL);
return 0;
}
static int sun4i_codec_dai_probe(struct snd_soc_dai *dai)
{
struct snd_soc_card *card = snd_soc_dai_get_drvdata(dai);
struct sun4i_codec *scodec = snd_soc_card_get_drvdata(card);
snd_soc_dai_init_dma_data(dai, &scodec->playback_dma_data,
&scodec->capture_dma_data);
return 0;
}
static int oc_i2s_dai_probe(struct snd_soc_dai *dai)
{
struct oc_i2s *i2s = snd_soc_dai_get_drvdata(dai);
dev_dbg(dai->dev, "dai_probe\n");
snd_soc_dai_init_dma_data(dai, &i2s->playback_dma_data,
&i2s->capture_dma_data);
return 0;
}
static int bcm2835_i2s_dai_probe(struct snd_soc_dai *dai)
{
struct bcm2835_i2s_dev *dev = snd_soc_dai_get_drvdata(dai);
snd_soc_dai_init_dma_data(dai,
&dev->dma_data[SNDRV_PCM_STREAM_PLAYBACK],
&dev->dma_data[SNDRV_PCM_STREAM_CAPTURE]);
return 0;
}
static int hi6210_i2s_dai_probe(struct snd_soc_dai *dai)
{
struct hi6210_i2s *i2s = snd_soc_dai_get_drvdata(dai);
snd_soc_dai_init_dma_data(dai,
&i2s->dma_data[SNDRV_PCM_STREAM_PLAYBACK],
&i2s->dma_data[SNDRV_PCM_STREAM_CAPTURE]);
return 0;
}
static int img_spdif_out_dai_probe(struct snd_soc_dai *dai)
{
struct img_spdif_out *spdif = snd_soc_dai_get_drvdata(dai);
snd_soc_dai_init_dma_data(dai, &spdif->dma_data, NULL);
snd_soc_add_dai_controls(dai, img_spdif_out_controls,
ARRAY_SIZE(img_spdif_out_controls));
return 0;
}
static int stm32_spdifrx_dai_probe(struct snd_soc_dai *cpu_dai)
{
struct stm32_spdifrx_data *spdifrx = dev_get_drvdata(cpu_dai->dev);
spdifrx->dma_params.addr = (dma_addr_t)(spdifrx->phys_addr +
STM32_SPDIFRX_DR);
spdifrx->dma_params.maxburst = 1;
snd_soc_dai_init_dma_data(cpu_dai, NULL, &spdifrx->dma_params);
return stm32_spdifrx_dai_register_ctrls(cpu_dai);
}
static int omap_mcbsp_probe(struct snd_soc_dai *dai)
{
struct omap_mcbsp *mcbsp = snd_soc_dai_get_drvdata(dai);
pm_runtime_enable(mcbsp->dev);
snd_soc_dai_init_dma_data(dai,
&mcbsp->dma_data[SNDRV_PCM_STREAM_PLAYBACK],
&mcbsp->dma_data[SNDRV_PCM_STREAM_CAPTURE]);
return 0;
}
static int zx_tdm_dai_probe(struct snd_soc_dai *dai)
{
struct zx_tdm_info *zx_tdm = dev_get_drvdata(dai->dev);
snd_soc_dai_set_drvdata(dai, zx_tdm);
zx_tdm->dma_playback.addr = zx_tdm->phy_addr + REG_DATABUF;
zx_tdm->dma_playback.maxburst = 16;
zx_tdm->dma_capture.addr = zx_tdm->phy_addr + REG_DATABUF;
zx_tdm->dma_capture.maxburst = 16;
snd_soc_dai_init_dma_data(dai, &zx_tdm->dma_playback,
&zx_tdm->dma_capture);
return 0;
}
static int omap_dmic_probe(struct snd_soc_dai *dai)
{
struct omap_dmic *dmic = snd_soc_dai_get_drvdata(dai);
pm_runtime_enable(dmic->dev);
/* Disable lines while request is ongoing */
pm_runtime_get_sync(dmic->dev);
omap_dmic_write(dmic, OMAP_DMIC_CTRL_REG, 0x00);
pm_runtime_put_sync(dmic->dev);
/* Configure DMIC threshold value */
dmic->threshold = OMAP_DMIC_THRES_MAX - 3;
snd_soc_dai_init_dma_data(dai, NULL, &dmic->dma_data);
return 0;
}
static int stm32_i2s_dai_probe(struct snd_soc_dai *cpu_dai)
{
struct stm32_i2s_data *i2s = dev_get_drvdata(cpu_dai->dev);
struct snd_dmaengine_dai_dma_data *dma_data_tx = &i2s->dma_data_tx;
struct snd_dmaengine_dai_dma_data *dma_data_rx = &i2s->dma_data_rx;
/* Buswidth will be set by framework */
dma_data_tx->addr_width = DMA_SLAVE_BUSWIDTH_UNDEFINED;
dma_data_tx->addr = (dma_addr_t)(i2s->phys_addr) + STM32_I2S_TXDR_REG;
dma_data_tx->maxburst = 1;
dma_data_rx->addr_width = DMA_SLAVE_BUSWIDTH_UNDEFINED;
dma_data_rx->addr = (dma_addr_t)(i2s->phys_addr) + STM32_I2S_RXDR_REG;
dma_data_rx->maxburst = 1;
snd_soc_dai_init_dma_data(cpu_dai, dma_data_tx, dma_data_rx);
return 0;
}
static int fsl_sai_dai_probe(struct snd_soc_dai *cpu_dai)
{
struct fsl_sai *sai = dev_get_drvdata(cpu_dai->dev);
regmap_update_bits(sai->regmap, FSL_SAI_TCSR, 0xffffffff, 0x0);
regmap_update_bits(sai->regmap, FSL_SAI_RCSR, 0xffffffff, 0x0);
regmap_update_bits(sai->regmap, FSL_SAI_TCR1, FSL_SAI_CR1_RFW_MASK,
FSL_SAI_MAXBURST_TX * 2);
regmap_update_bits(sai->regmap, FSL_SAI_RCR1, FSL_SAI_CR1_RFW_MASK,
FSL_SAI_MAXBURST_RX - 1);
snd_soc_dai_init_dma_data(cpu_dai, &sai->dma_params_tx,
&sai->dma_params_rx);
snd_soc_dai_set_drvdata(cpu_dai, sai);
return 0;
}
static int ux500_msp_dai_probe(struct snd_soc_dai *dai)
{
struct ux500_msp_i2s_drvdata *drvdata = dev_get_drvdata(dai->dev);
struct msp_i2s_platform_data *pdata = dai->dev->platform_data;
int ret;
if (!pdata) {
ret = ux500_msp_dai_of_probe(dai);
return ret;
}
drvdata->msp->playback_dma_data.data_size = drvdata->slot_width;
drvdata->msp->capture_dma_data.data_size = drvdata->slot_width;
snd_soc_dai_init_dma_data(dai,
&drvdata->msp->playback_dma_data,
&drvdata->msp->capture_dma_data);
return 0;
}
static int s3c24xx_i2s_probe(struct snd_soc_dai *dai)
{
snd_soc_dai_init_dma_data(dai, &s3c24xx_i2s_pcm_stereo_out,
&s3c24xx_i2s_pcm_stereo_in);
s3c24xx_i2s.iis_clk = devm_clk_get(dai->dev, "iis");
if (IS_ERR(s3c24xx_i2s.iis_clk)) {
pr_err("failed to get iis_clock\n");
return PTR_ERR(s3c24xx_i2s.iis_clk);
}
clk_prepare_enable(s3c24xx_i2s.iis_clk);
/* Configure the I2S pins (GPE0...GPE4) in correct mode */
s3c_gpio_cfgall_range(S3C2410_GPE(0), 5, S3C_GPIO_SFN(2),
S3C_GPIO_PULL_NONE);
writel(S3C2410_IISCON_IISEN, s3c24xx_i2s.regs + S3C2410_IISCON);
s3c24xx_snd_txctrl(0);
s3c24xx_snd_rxctrl(0);
return 0;
}
void samsung_asoc_init_dma_data(struct snd_soc_dai *dai,
struct s3c_dma_params *playback,
struct s3c_dma_params *capture)
{
struct snd_dmaengine_dai_dma_data *playback_data = NULL;
struct snd_dmaengine_dai_dma_data *capture_data = NULL;
if (playback) {
playback_data = &playback->dma_data;
playback_data->filter_data = (void *)playback->channel;
playback_data->chan_name = playback->ch_name;
playback_data->addr = playback->dma_addr;
playback_data->addr_width = playback->dma_size;
}
if (capture) {
capture_data = &capture->dma_data;
capture_data->filter_data = (void *)capture->channel;
capture_data->chan_name = capture->ch_name;
capture_data->addr = capture->dma_addr;
capture_data->addr_width = capture->dma_size;
}
snd_soc_dai_init_dma_data(dai, playback_data, capture_data);
}
