int blkdev_read( const size_t lba, void *buffer, const size_t len ) { uint32_t i; for (i=0; i<len+16; i+=4){ #if __mips >= 32 asm volatile( " cache %0, %1" : : "i" (0x11) , "R" (*(uint8_t*)(buffer+i)) : "memory" ); #elif __mips asm volatile("lw $0, 0(%0)"::"r"((uint32_t)buffer+i)); #endif } soclib_io_set(base(BD), BLOCK_DEVICE_LBA, lba); soclib_io_set(base(BD), BLOCK_DEVICE_BUFFER, (uint32_t)buffer); soclib_io_set(base(BD), BLOCK_DEVICE_COUNT, len); soclib_io_set(base(BD), BLOCK_DEVICE_OP, BLOCK_DEVICE_READ); int state; do { state = soclib_io_get(base(BD), BLOCK_DEVICE_STATUS); } while (state == BLOCK_DEVICE_BUSY); return state; }
int blkdev_write( const size_t lba, const void *buffer, const size_t len ) { soclib_io_set(base(BD), BLOCK_DEVICE_LBA, lba); soclib_io_set(base(BD), BLOCK_DEVICE_BUFFER, (uint32_t)buffer); soclib_io_set(base(BD), BLOCK_DEVICE_COUNT, len); soclib_io_set(base(BD), BLOCK_DEVICE_OP, BLOCK_DEVICE_WRITE); int state; do { state = soclib_io_get(base(BD), BLOCK_DEVICE_STATUS); } while (state == BLOCK_DEVICE_BUSY); return state; }
static void wait_dma() { while (1) { unsigned int t1, t2; if (soclib_io_get(base(IP), DMA_START_REG) != 1) { break; } // wait a little before trying again for (t1 = 0; t1 < 0xFFFF; ++t1) { for (t2 = 0; t2 < 0xFFFF; ++t2) { ; } } } printf("End of dma transferts\n\n"); }
void irq_handler(int irq) { printf("IRQ handle\n\n"); uint32_t ti; int count = atomic_add(&interrupt_counter, 1); ti = soclib_io_get( base(TIMER), procnum()*TIMER_SPAN+TIMER_VALUE); printf("IRQ %d received at cycle %d on cpu %d, %d interrupts received\n\n", irq, ti, procnum(), count); soclib_io_set( base(TIMER), procnum()*TIMER_SPAN+TIMER_RESETIRQ, 0); }
void irq_handler(int irq) { const int cpu = procnum(); uint32_t ti; int left = atomic_add(&max_interrupts, -1); ti = soclib_io_get( base(TIMER), cpu*TIMER_SPAN+TIMER_VALUE); printf("IRQ %d received at cycle %d on cpu %d %d interrupts to go\n\n", irq, ti, cpu, left); soclib_io_set( base(TIMER), cpu*TIMER_SPAN+TIMER_RESETIRQ, 0); if ( ! left ) exit(0); }
void mwmr_wait_fifo_empty( void *coproc, enum SoclibMwmrWay way, unsigned int no, mwmr_t *fifo ) { //Wait until the RAM fifo is empty local_mwmr_status_t status; mwmr_lock( fifo->lock ); rehash_status( fifo, &status ); while (status.usage > 0) { mwmr_unlock( fifo->lock ); busy_wait(1000); mwmr_lock( fifo->lock ); rehash_status( fifo, &status ); } mwmr_unlock( fifo->lock ); //Wait untill all the data is consumed by the coprocessor int value; do { soclib_io_set( coproc, MWMR_CONFIG_FIFO_WAY, way ); soclib_io_set( coproc, MWMR_CONFIG_FIFO_NO, no ); value = soclib_io_get( coproc, /**MWMR_FIFO_STATUS**/MWMR_FIFO_FILL_STATUS ); } while (value > 0); }
void irq_handler(int irq) { uint32_t ti; int left = atomic_add(&max_interrupts, -1); ti = soclib_io_get( base(TIMER), procnum()*TIMER_SPAN+TIMER_VALUE); printf("IRQ %d received at cycle %d on cpu %d %d interrupts to go\n\n", irq, ti, procnum(), left); soclib_io_set( base(TIMER), procnum()*TIMER_SPAN+TIMER_RESETIRQ, 0); if(left==0){ soclib_io_set( base(TIMER), procnum()*TIMER_SPAN+TIMER_MODE, 0); } }
uint32_t blkdev_block_size() { return soclib_io_get(base(BD), BLOCK_DEVICE_BLOCK_SIZE); }
uint32_t mwmr_status( void *coproc, unsigned int no ) { // assert(no < MWMR_IOREG_MAX); return soclib_io_get( coproc, no ); }
void irq_handler() { char data = soclib_io_get( base(TTY), procnum()*TTY_SPAN + TTY_READ ); soclib_io_set( base(TTY), procnum()*TTY_SPAN + TTY_WRITE, data); }
int main(void) { const int cpu = procnum(); //unsigned int time; printf("Hello from processor %d\n", procnum()); set_irq_handler(irq_handler); // irq_set_pil(0); // enable_hw_irq(0); // irq_enable(); // included in enable_hw_irq(); printf("TIMER_BASE:%x\n",base(TIMER)); printf("TIMER_SPAN:%d\n",TIMER_SPAN); printf("TIMER_RERIOD:%d\n",TIMER_PERIOD); // time = soclib_io_get( // base(TIMER), // procnum()*TIMER_SPAN+TIMER_VALUE); // printf("timer value:%d\n",time ); soclib_io_set( base(TIMER), procnum()*TIMER_SPAN+TIMER_PERIOD, 10000); // period[cpu]); soclib_io_set( base(TIMER), procnum()*TIMER_SPAN+TIMER_MODE, TIMER_RUNNING|TIMER_IRQ_ENABLED); int i=0; /* for(;i<100000;i++) { for(;j<10000;j++) ; } */ for (i=0;i<20;i++) { if(i%NCPU==cpu) { printf("Fifo %d : %d\n",i,fibo(i)); } } time = soclib_io_get( base(TIMER), procnum()*TIMER_SPAN+TIMER_VALUE); finish_bit[cpu]=1; while(1) { int flag=0; // printf("==========\n"); for(i=0;i<NCPU;i++) { flag+=finish_bit[cpu]; // printf("%d ",finish_bit[cpu]); } // printf("\n"); if (flag == NCPU) { break; } } printf("RUN_TIME:%d\n",time ); while (1) ; // pause(); return 0; }