static int spear_read_raw(struct iio_dev *indio_dev, struct iio_chan_spec const *chan, int *val, int *val2, long mask) { struct spear_adc_info *info = iio_priv(indio_dev); u32 status; switch (mask) { case IIO_CHAN_INFO_RAW: mutex_lock(&indio_dev->mlock); status = CHANNEL_NUM(chan->channel) | AVG_SAMPLE(info->avg_samples) | START_CONVERSION | ADC_ENABLE; if (info->vref_external == 0) status |= VREF_INTERNAL; spear_adc_set_status(info, status); wait_for_completion(&info->completion); /* set by ISR */ *val = info->value; mutex_unlock(&indio_dev->mlock); return IIO_VAL_INT; case IIO_CHAN_INFO_SCALE: *val = info->vref_external; *val2 = DATA_BITS; return IIO_VAL_FRACTIONAL_LOG2; } return -EINVAL; }
static int spear_adc_configure(struct spear_adc_info *info) { int i; /* Reset ADC core */ spear_adc_set_status(info, 0); __raw_writel(0, &info->adc_base_spear6xx->clk); for (i = 0; i < 8; i++) spear_adc_set_ctrl(info, i, 0); spear_adc_set_scanrate(info, 0); spear_adc_set_clk(info, info->sampling_freq); return 0; }