void lp079x01_exit(__panel_para_t * info)
{
spi_24bit_3wire(0x7000B7); //enter LP mode
spi_24bit_3wire(0x720342);
sunxi_lcd_delay_ms(50);
spi_24bit_3wire(0x700028); //display off
sunxi_lcd_delay_ms(10);
spi_24bit_3wire(0x700010); //sleep in cmd
sunxi_lcd_delay_ms(20);
ssd2828_rst(0);
panel_rst(0);
}
void lp079x01_exit(void)
{
spi_24bit_3wire(0x7000B7); //enter LP mode
spi_24bit_3wire(0x720342);
LCD_delay_ms(50);
spi_24bit_3wire(0x700028); //display off
LCD_delay_ms(10);
spi_24bit_3wire(0x700010); //sleep in cmd
LCD_delay_ms(20);
ssd2828_rst(0);
panel_rst(0);
}
void vvx07h005a00_init(__panel_para_t * info)
{
spi_24bit_3wire(0x7000B7); //enter LP mode
spi_24bit_3wire(0x720340);
ssd2828_shutdown(1);
ssd2828_rst(0);
LCD_delay_ms(20);
ssd2828_rst(1);
spi_24bit_3wire(0x7000B1);
spi_24bit_3wire(0x720110);
spi_24bit_3wire(0x7000B2);
spi_24bit_3wire(0x720330);
spi_24bit_3wire(0x7000B3);
spi_24bit_3wire(0x720510);
spi_24bit_3wire(0x7000B4);
spi_24bit_3wire(0x720320);
spi_24bit_3wire(0x7000B5);
spi_24bit_3wire(0x720500);
spi_24bit_3wire(0x7000B6);
//spi_24bit_3wire(0x720007);
spi_24bit_3wire(0x72000A); //Burst mode
//////////////////////////
spi_24bit_3wire(0x7000C9);
spi_24bit_3wire(0x721e04);
spi_24bit_3wire(0x7000CA);
spi_24bit_3wire(0x722f04);
spi_24bit_3wire(0x7000CB);
spi_24bit_3wire(0x720228);
spi_24bit_3wire(0x7000CC);
spi_24bit_3wire(0x720f0f);
delayms(10);
////////////////////////////
spi_24bit_3wire(0x7000DE);
spi_24bit_3wire(0x720003);
spi_24bit_3wire(0x7000D6);
spi_24bit_3wire(0x720005);
spi_24bit_3wire(0x7000B9);
spi_24bit_3wire(0x720000);
delayms(10);
////////////////////////////
spi_24bit_3wire(0x7000BA);
spi_24bit_3wire(0x728012);//27M OSC 500/27M=18=dex(12)
spi_24bit_3wire(0x7000BB);
spi_24bit_3wire(0x72000a);
spi_24bit_3wire(0x7000B9);
spi_24bit_3wire(0x720001);
delayms(200);
////////////////////////////
spi_24bit_3wire(0x7000B8);
spi_24bit_3wire(0x720000);
spi_24bit_3wire(0x7000B7);
spi_24bit_3wire(0x720342);
delayms(10);
delayms(10);
//while(1)
{
////////////////////////////
spi_24bit_3wire(0x7000Bc);
spi_24bit_3wire(0x720000);
spi_24bit_3wire(0x700011);
delayms(10);
}
spi_24bit_3wire(0x7000Bc);
spi_24bit_3wire(0x720002);
spi_24bit_3wire(0x7000BF);
spi_24bit_3wire(0x720BAE);
delayms(10);
spi_24bit_3wire(0x7000BF);
spi_24bit_3wire(0x7202BE);
delayms(10);
spi_24bit_3wire(0x7000BF);
spi_24bit_3wire(0x7290B5);
delayms(10);
spi_24bit_3wire(0x7000BF);
spi_24bit_3wire(0x7209B6);
delayms(10);
////////////////////////////
spi_24bit_3wire(0x7000Bc);
spi_24bit_3wire(0x720000);
spi_24bit_3wire(0x700010);
delayms(10);
delayms(50);
spi_24bit_3wire(0x7000B7);
spi_24bit_3wire(0x72024B);//0x72024B
delayms(50);
// spi_24bit_3wire(0x7000c0);
// spi_24bit_3wire(0x720100);
/*
spi_24bit_3wire(0x7000Bc);
spi_24bit_3wire(0x720000);
spi_24bit_3wire(0x700010);
delayms(10);
*/
/*
spi_24bit_3wire(0x7000Bc);
spi_24bit_3wire(0x720000);
spi_24bit_3wire(0x700029);
delayms(10);
*/
////////////////////////////
}
void lp079x01_init(__panel_para_t * info)
{
__u32 pll_config = 0;
if(info->lcd_xtal_freq == 12)
{
/* 12M xtal freq */
pll_config = 0xc02D;
} else if(info->lcd_xtal_freq == 27)
{
pll_config = 0xc014;
} else if(info->lcd_xtal_freq == 24)
{
pll_config = 0xc22d;
} else
{
/* default 12Mhz */
pll_config = 0xc02D;
}
spi_24bit_3wire(0x7000B7); //enter LP mode
spi_24bit_3wire(0x720340);
ssd2828_rst(0);
panel_rst(0);
LCD_delay_ms(10);
ssd2828_rst(1);
panel_rst(1);
LCD_delay_ms(10);
spi_24bit_3wire(0x7000B1); //VSA=50, HAS=64
spi_24bit_3wire(0x723240);
spi_24bit_3wire(0x7000B2); //VBP=30+50, HBP=56+64
spi_24bit_3wire(0x725078);
spi_24bit_3wire(0x7000B3); //VFP=36, HFP=60
spi_24bit_3wire(0x72243C);
spi_24bit_3wire(0x7000B4); //HACT=768
spi_24bit_3wire(0x720300);
spi_24bit_3wire(0x7000B5); //VACT=1240
spi_24bit_3wire(0x720400);
spi_24bit_3wire(0x7000B6);
if(info->lcd_ext_dsi_colordepth == 1) {
spi_24bit_3wire(0x720009); //0x720009:burst mode, 18bpp packed
} else {
spi_24bit_3wire(0x72000B); //0x72000B:burst mode, 24bpp
}
//0x72000A:burst mode, 18bpp loosely packed
spi_24bit_3wire(0x7000DE); //no of lane=4
spi_24bit_3wire(0x720003);
spi_24bit_3wire(0x7000D6); //RGB order and packet number in blanking period
spi_24bit_3wire(0x720005);
spi_24bit_3wire(0x7000B9); //disable PLL
spi_24bit_3wire(0x720000);
pll_config |= 0x720000;
pr_warn("[MINI]pll_config=0x%x\n", pll_config);
spi_24bit_3wire(0x7000BA); //lane speed=560
spi_24bit_3wire(pll_config); //may modify according to requirement, 500Mbps to 560Mbps, clk_in / (bit12-8) * (bit7-0)
spi_24bit_3wire(0x7000BB); //LP clock
spi_24bit_3wire(0x720008);
spi_24bit_3wire(0x7000B9); //enable PPL
spi_24bit_3wire(0x720001);
spi_24bit_3wire(0x7000c4); //enable BTA
spi_24bit_3wire(0x720001);
spi_24bit_3wire(0x7000B7); //enter LP mode
spi_24bit_3wire(0x720342);
spi_24bit_3wire(0x7000B8); //VC
spi_24bit_3wire(0x720000);
spi_24bit_3wire(0x7000BC); //set packet size
spi_24bit_3wire(0x720000);
spi_24bit_3wire(0x700011); //sleep out cmd
LCD_delay_ms(100);
spi_24bit_3wire(0x700029); //display on
LCD_delay_ms(200);
spi_24bit_3wire(0x7000B7); //video mode on
spi_24bit_3wire(0x72030b);
}
void vvx07h005a00_init(__panel_para_t * info)
{
__u32 pll_config = 0;
if(info->lcd_xtal_freq == 12)
{
/* 12M xtal freq */
pll_config = 0xc02D;
} else if(info->lcd_xtal_freq == 27)
{
pll_config = 0xc013;
} else if(info->lcd_xtal_freq == 24)
{
pll_config = 0xc22d;
} else
{
/* default 12Mhz */
pll_config = 0xc02D;
}
ssd2828_shutdown(1);
//spi_24bit_3wire(0x7000B7); //enter LP mode
//spi_24bit_3wire(0x720340);
ssd2828_rst(0);
LCD_delay_ms(10);
ssd2828_rst(1);
spi_24bit_3wire(0x7000B1);
spi_24bit_3wire(0x720110);
spi_24bit_3wire(0x7000B2);
spi_24bit_3wire(0x720330);
spi_24bit_3wire(0x7000B3);
spi_24bit_3wire(0x720510);
spi_24bit_3wire(0x7000B4);
spi_24bit_3wire(0x720320);
spi_24bit_3wire(0x7000B5);
spi_24bit_3wire(0x720500);
spi_24bit_3wire(0x7000B6);
//spi_24bit_3wire(0x720007);
spi_24bit_3wire(0x72000A); //Burst mode
//////////////////////////
spi_24bit_3wire(0x7000C9);
spi_24bit_3wire(0x721e04);
spi_24bit_3wire(0x7000CA);
spi_24bit_3wire(0x722f04);
spi_24bit_3wire(0x7000CB);
spi_24bit_3wire(0x720228);
spi_24bit_3wire(0x7000CC);
spi_24bit_3wire(0x720f0f);
delayms(10);
////////////////////////////
spi_24bit_3wire(0x7000DE);
spi_24bit_3wire(0x720003);
spi_24bit_3wire(0x7000D6);
spi_24bit_3wire(0x720005);
spi_24bit_3wire(0x7000B9);
spi_24bit_3wire(0x720000);
delayms(10);
////////////////////////////
spi_24bit_3wire(0x7000BA);
spi_24bit_3wire(0x728012);//27M OSC 500/27M=18=dex(12)
spi_24bit_3wire(0x7000BB);
spi_24bit_3wire(0x72000a);
spi_24bit_3wire(0x7000B9);
spi_24bit_3wire(0x720001);
delayms(200);
////////////////////////////
spi_24bit_3wire(0x7000B8);
spi_24bit_3wire(0x720000);
spi_24bit_3wire(0x7000B7);
spi_24bit_3wire(0x720342);
delayms(10);
delayms(10);
//while(1)
{
////////////////////////////
spi_24bit_3wire(0x7000Bc);
spi_24bit_3wire(0x720000);
spi_24bit_3wire(0x700011);
delayms(10);
}
spi_24bit_3wire(0x7000Bc);
spi_24bit_3wire(0x720002);
spi_24bit_3wire(0x7000BF);
spi_24bit_3wire(0x720BAE);
delayms(10);
spi_24bit_3wire(0x7000BF);
spi_24bit_3wire(0x7202BE);
delayms(10);
spi_24bit_3wire(0x7000BF);
spi_24bit_3wire(0x7290B5);
delayms(10);
spi_24bit_3wire(0x7000BF);
spi_24bit_3wire(0x7209B6);
delayms(10);
////////////////////////////
spi_24bit_3wire(0x7000Bc);
spi_24bit_3wire(0x720000);
spi_24bit_3wire(0x700010);
delayms(10);
delayms(50);
spi_24bit_3wire(0x7000B7);
spi_24bit_3wire(0x72024B);//0x72024B
delayms(50);
// spi_24bit_3wire(0x7000c0);
// spi_24bit_3wire(0x720100);
/*
spi_24bit_3wire(0x7000Bc);
spi_24bit_3wire(0x720000);
spi_24bit_3wire(0x700010);
delayms(10);
*/
/*
spi_24bit_3wire(0x7000Bc);
spi_24bit_3wire(0x720000);
spi_24bit_3wire(0x700029);
delayms(10);
*/
////////////////////////////
}
