예제 #1
0
파일: spi.c 프로젝트: grepz/STM32_bl
void spi_stop(void)
{
    spi_disable_tx_dma(SPI2);
    spi_disable_rx_dma(SPI2);
    spi_disable(SPI2);
//    spi_clean_disable(SPI2);
}
예제 #2
0
/// Processing done after rx completes.
void process_rx_dma_interrupt(struct spi_periph *periph) {
  struct spi_periph_dma *dma = periph->init_struct;
  struct spi_transaction *trans = periph->trans[periph->trans_extract_idx];

  /* Disable DMA Channel */
  dma_disable_transfer_complete_interrupt(dma->dma, dma->rx_chan);

  /* Disable SPI Rx request */
  spi_disable_rx_dma((uint32_t)periph->reg_addr);

  /* Disable DMA rx channel */
  dma_disable_channel(dma->dma, dma->rx_chan);


  if (dma->rx_extra_dummy_dma) {
    /*
     * We are finished the first part of the receive with real data,
     * but still need to run the dummy to get a transfer complete interrupt
     * after the complete transaction is done.
     */

    /* Reset the flag so this only happens once in a transaction */
    dma->rx_extra_dummy_dma = FALSE;

    /* Use the difference in length between rx and tx */
    uint16_t len_remaining = trans->output_length - trans->input_length;

    spi_configure_dma(dma->dma, dma->rx_chan, (uint32_t)dma->spidr,
                      (uint32_t)&(dma->rx_dummy_buf), len_remaining, trans->dss, FALSE);
    dma_set_read_from_peripheral(dma->dma, dma->rx_chan);
    dma_set_priority(dma->dma, dma->rx_chan, DMA_CCR_PL_HIGH);

    /* Enable DMA transfer complete interrupts. */
    dma_enable_transfer_complete_interrupt(dma->dma, dma->rx_chan);
    /* Enable DMA channels */
    dma_enable_channel(dma->dma, dma->rx_chan);
    /* Enable SPI transfers via DMA */
    spi_enable_rx_dma((uint32_t)periph->reg_addr);
  }
  else {
    /*
     * Since the receive DMA is always run until the very end
     * and this interrupt is triggered after the last data word was read,
     * we now know that this transaction is finished.
     */

    /* Run the callback */
    trans->status = SPITransSuccess;
    if (trans->after_cb != 0) {
      trans->after_cb(trans);
    }

    /* AFTER the callback, then unselect the slave if required */
    if (trans->select == SPISelectUnselect || trans->select == SPIUnselect) {
      SpiSlaveUnselect(trans->slave_idx);
    }

    spi_next_transaction(periph);
  }
}
예제 #3
0
파일: acq.c 프로젝트: atalax/spectrometer
void acq_pause()
{
	gpio_clear(BANK_LED, GPIO_LED);
	spi_disable(SPI_C1);
	spi_disable_rx_dma(SPI_C1);
	dma_disable_transfer_complete_interrupt(DMA1, DMA_CHANNEL2);
	dma_disable_half_transfer_interrupt(DMA1, DMA_CHANNEL2);
	dma_disable_channel(DMA1, DMA_CHANNEL2);
	nvic_disable_irq(NVIC_DMA1_CHANNEL2_IRQ);
}
예제 #4
0
/* SPI receive completed with DMA */
void dma1_channel2_isr(void)
{
	gpio_set(GPIOA,GPIO4);
	if ((DMA1_ISR &DMA_ISR_TCIF2) != 0) {
		DMA1_IFCR |= DMA_IFCR_CTCIF2;
	}

	dma_disable_transfer_complete_interrupt(DMA1, DMA_CHANNEL2);

	spi_disable_rx_dma(SPI1);

	dma_disable_channel(DMA1, DMA_CHANNEL2);

	/* Increment the status to indicate one of the transfers is complete */
	transceive_status++;
	gpio_clear(GPIOA,GPIO4);
}
예제 #5
0
/* Cleanup between DMA transfers. */
static void cleanup_dma_spi(void){
	/* Disable SPI without resetting the peripheral. */
	dma_disable_channel(DMA1, DMA_CHANNEL3);
	dma_disable_channel(DMA1, DMA_CHANNEL2);
	spi_disable(SPI3);
	if(TxSpi){
		/* After tx_spi() completes there will be several nonsense bytes
		 * in the RXFIFO. They must be cleared out so that they don't
		 * corrupt a subsequent SPI read. */
		uint8_t throwaway;
		throwaway = SPI_DR(SPI3);
		throwaway = SPI_DR(SPI3);
		throwaway = SPI_DR(SPI3);
		throwaway = SPI_DR(SPI3);
		throwaway = throwaway; /* Suppress compiler warnings. */
		TxSpi = false;
	}
	spi_disable_tx_dma(SPI3);
	spi_disable_rx_dma(SPI3);
	DmaCleanupNeeded = false;
}
예제 #6
0
파일: flash.c 프로젝트: konachan700/Mew
void mew_spi_flash_init(void) {
    gpio_mode_setup(MEW_FLASH_GPIO_PORT_WP, GPIO_MODE_OUTPUT, GPIO_PUPD_NONE, MEW_FLASH_GPIO_PIN_WP);
    gpio_set_output_options(MEW_FLASH_GPIO_PORT_WP, GPIO_OTYPE_PP, GPIO_OSPEED_100MHZ, MEW_FLASH_GPIO_PIN_WP);
    gpio_set(MEW_FLASH_GPIO_PORT_WP, MEW_FLASH_GPIO_PIN_WP);
    
    gpio_mode_setup(MEW_FLASH_GPIO_PORT_HOLD, GPIO_MODE_OUTPUT, GPIO_PUPD_NONE, MEW_FLASH_GPIO_PIN_HOLD);
    gpio_set_output_options(MEW_FLASH_GPIO_PORT_HOLD, GPIO_OTYPE_PP, GPIO_OSPEED_100MHZ, MEW_FLASH_GPIO_PIN_HOLD);
    gpio_set(MEW_FLASH_GPIO_PORT_HOLD, MEW_FLASH_GPIO_PIN_HOLD);
    
    gpio_mode_setup(MEW_FLASH_GPIO_PORT_CS, GPIO_MODE_OUTPUT, GPIO_PUPD_NONE, MEW_FLASH_GPIO_PIN_CS);
    gpio_set_output_options(MEW_FLASH_GPIO_PORT_CS, GPIO_OTYPE_PP, GPIO_OSPEED_100MHZ, MEW_FLASH_GPIO_PIN_CS);
    gpio_set(MEW_FLASH_GPIO_PORT_CS, MEW_FLASH_GPIO_PIN_CS);
    
    gpio_mode_setup(MEW_FLASH_SPI_GPIO_PORT, GPIO_MODE_AF, GPIO_PUPD_PULLDOWN, MEW_FLASH_SPI_GPIO_PINS);
    gpio_set_output_options(MEW_FLASH_SPI_GPIO_PORT, GPIO_OTYPE_PP, GPIO_OSPEED_100MHZ, MEW_FLASH_SPI_GPIO_PINS);
    gpio_set_af(MEW_FLASH_SPI_GPIO_PORT, MEW_FLASH_SPI_GPIO_AF_NUMBER, MEW_FLASH_SPI_GPIO_PINS);
    
    spi_disable(MEW_FLASH_SPI);
    spi_set_master_mode(MEW_FLASH_SPI);
    spi_set_baudrate_prescaler(MEW_FLASH_SPI, SPI_CR1_BR_FPCLK_DIV_2);
    spi_set_clock_polarity_0(MEW_FLASH_SPI);
    spi_set_clock_phase_0(MEW_FLASH_SPI);
    spi_set_unidirectional_mode(MEW_FLASH_SPI);
    spi_enable_software_slave_management(MEW_FLASH_SPI);
    spi_send_msb_first(MEW_FLASH_SPI);
    spi_set_nss_high(MEW_FLASH_SPI);
    SPI_I2SCFGR(MEW_FLASH_SPI) &= ~SPI_I2SCFGR_I2SMOD;
    spi_disable_tx_buffer_empty_interrupt(MEW_FLASH_SPI);
    spi_disable_rx_buffer_not_empty_interrupt(MEW_FLASH_SPI);
    spi_disable_error_interrupt(MEW_FLASH_SPI);
    spi_disable_tx_dma(MEW_FLASH_SPI);
    spi_disable_rx_dma(MEW_FLASH_SPI);
    spi_set_dff_8bit(MEW_FLASH_SPI);
    spi_send_msb_first(MEW_FLASH_SPI);
    spi_enable(MEW_FLASH_SPI);
}