/**
* Enable and configure a SPI bus for a device.
*/
static void spi_enable(struct spi_bus *bus, struct spi_device *dev)
{
/* Ensure the peripheral is disabled, then configure it. */
spi_cr1_clear(bus, SPI_CR1_SPE);
bus->dev->CR1 = 0;
bus->dev->CR2 = 0;
/* The SSM and SSI bits are necessary to prevent the SPI peripheral
* from disabling SPI if the NSS pin is not high. Since we are
* assuming all devices use GPIOs for slave selection, this should
* be the right thing. If that changes, we will need to make this
* configurable. */
spi_cr1_set(bus, SPI_CR1_MSTR | SPI_CR1_SSM | SPI_CR1_SSI);
spi_set_baud(bus, dev->baud);
spi_set_clock_polarity(bus, dev->clock_polarity);
spi_set_clock_phase(bus, dev->clock_phase);
spi_set_bit_order(bus, dev->bit_order);
spi_cr1_set(bus, SPI_CR1_SPE);
}
/**
* Initialize the ST7565
*/
void st7565_init(void)
{
io_set_pin_dir(ST7565_RST_PORT,ST7565_RST_PIN, IO_DIR_OUT);
io_set_pin_dir(ST7565_RS_PORT,ST7565_RS_PIN, IO_DIR_OUT);
io_set_pin(ST7565_RST_PORT,ST7565_RST_PIN, 1);
tick_wait_ms(10);
io_set_pin(ST7565_RST_PORT,ST7565_RST_PIN, 0);
tick_wait_ms(10);
io_set_pin(ST7565_RST_PORT,ST7565_RST_PIN, 1);
tick_wait_ms(10);
spi_set_baud(ST7565_DRV, ST7565_BAUD);
spi_cs_en(ST7565_DRV);
st7565_command(CMD_SET_BIAS_7);
st7565_command(CMD_SET_ADC_NORMAL);
st7565_command(CMD_SET_COM_NORMAL);
st7565_command(CMD_SET_DISP_START_LINE);
st7565_command(CMD_SET_POWER_CONTROL | 0x4);
tick_wait_ms(50);
st7565_command(CMD_SET_POWER_CONTROL | 0x6);
tick_wait_ms(50);
st7565_command(CMD_SET_POWER_CONTROL | 0x7);
tick_wait_ms(10);
st7565_command(CMD_SET_RESISTOR_RATIO | 0x6);
st7565_command(CMD_DISPLAY_ON);
st7565_command(CMD_SET_ALLPTS_NORMAL);
/*Set brightness*/
st7565_command(CMD_SET_VOLUME_FIRST);
st7565_command(CMD_SET_VOLUME_SECOND | (0x18 & 0x3f));
spi_cs_dis(ST7565_DRV);
memset(lcd_fb, 0x00, sizeof(lcd_fb));
}
