int main(int ac, char** av)
{
stlink_t* sl = NULL;
struct opts o;
int err = -1;
if (get_opts(&o, ac - 1, av + 1) == -1)
{
printf("invalid command line\n");
usage();
goto on_error;
}
if (o.devname != NULL) /* stlinkv1 */
{
sl = stlink_v1_open(100);
if (sl == NULL) goto on_error;
}
else /* stlinkv2 */
{
sl = stlink_open_usb(100);
if (sl == NULL) goto on_error;
}
if (stlink_current_mode(sl) == STLINK_DEV_DFU_MODE)
stlink_exit_dfu_mode(sl);
if (stlink_current_mode(sl) != STLINK_DEV_DEBUG_MODE)
stlink_enter_swd_mode(sl);
stlink_reset(sl);
if (o.do_read == 0) /* write */
{
err = stlink_fwrite_flash(sl, o.filename, o.addr);
if (err == -1)
{
printf("stlink_fwrite_flash() == -1\n");
goto on_error;
}
}
else /* read */
{
err = stlink_fread(sl, o.filename, o.addr, o.size);
if (err == -1)
{
printf("stlink_fread() == -1\n");
goto on_error;
}
}
/* success */
err = 0;
on_error:
if (sl != NULL) stlink_close(sl);
return err;
}
stlink_t* open_sl(void)
{
stlink_t* sl;
sl = stlink_v1_open(0, 1);
if (sl == NULL)
sl = stlink_open_usb(0, 1);
return sl;
}
static stlink_t *stlink_open_first(void)
{
stlink_t* sl = NULL;
sl = stlink_v1_open(0, 1);
if (sl == NULL)
sl = stlink_open_usb(0, 1, NULL);
return sl;
}
int main(int argc, char** argv) {
stlink_t *sl = NULL;
st_state_t state;
memset(&state, 0, sizeof(state));
// set defaults...
state.stlink_version = 2;
state.logging_level = DEFAULT_LOGGING_LEVEL;
state.listen_port = DEFAULT_GDB_LISTEN_PORT;
parse_options(argc, argv, &state);
switch (state.stlink_version) {
case 2:
sl = stlink_open_usb(state.logging_level);
if(sl == NULL) return 1;
break;
case 1:
sl = stlink_v1_open(state.logging_level);
if(sl == NULL) return 1;
break;
}
printf("Chip ID is %08x, Core ID is %08x.\n", sl->chip_id, sl->core_id);
sl->verbose=0;
current_memory_map = make_memory_map(sl);
#ifdef __MINGW32__
WSADATA wsadata;
if (WSAStartup(MAKEWORD(2,2),&wsadata) !=0 ) {
goto winsock_error;
}
#endif
while(serve(sl, state.listen_port, state.elf_filename) == 0);
#ifdef __MINGW32__
winsock_error:
WSACleanup();
#endif
/* Switch back to mass storage mode before closing. */
stlink_run(sl);
stlink_exit_debug_mode(sl);
stlink_close(sl);
return 0;
}
int main(int argc, char** argv) {
sl = NULL;
st_state_t state;
memset(&state, 0, sizeof(state));
// set defaults...
state.stlink_version = 2;
state.logging_level = DEFAULT_LOGGING_LEVEL;
state.listen_port = DEFAULT_GDB_LISTEN_PORT;
parse_options(argc, argv, &state);
switch (state.stlink_version) {
case 2:
sl = stlink_open_usb(state.logging_level);
if(sl == NULL) return 1;
break;
case 1:
sl = stlink_v1_open(state.logging_level);
if(sl == NULL) return 1;
break;
}
signal(SIGINT, catcher);
printf("Chip ID is %08x, Core ID is %08x.\n", sl->chip_id, sl->core_id);
sl->verbose=0;
current_memory_map = make_memory_map(sl);
while(serve(sl, state.listen_port) == state.perist_mode);
/* Switch back to mass storage mode before closing. */
stlink_reset(sl);
stlink_run(sl);
stlink_exit_debug_mode(sl);
stlink_close(sl);
return 0;
}
static void
connect_button_cb (GtkWidget *widget, gpointer data)
{
STlinkGUI *gui;
gint i;
gui = STLINK_GUI (data);
if (gui->sl != NULL)
return;
/* try version 1 then version 2 */
gui->sl = stlink_v1_open(0, 1);
if (gui->sl == NULL) {
gui->sl = stlink_open_usb(0, 1);
}
if (gui->sl == NULL) {
stlink_gui_set_info_error_message (gui, "Failed to connect to STLink."); return;
}
/* code below taken from flash/main.c, refactoring might be in order */
if (stlink_current_mode(gui->sl) == STLINK_DEV_DFU_MODE)
stlink_exit_dfu_mode(gui->sl);
if (stlink_current_mode(gui->sl) != STLINK_DEV_DEBUG_MODE)
stlink_enter_swd_mode(gui->sl);
/* Disable DMA - Set All DMA CCR Registers to zero. - AKS 1/7/2013 */
if (gui->sl->chip_id == STM32_CHIPID_F4) {
memset(gui->sl->q_buf, 0, 4);
for (i = 0; i < 8; i++) {
stlink_write_mem32(gui->sl, 0x40026000 + 0x10 + 0x18 * i, 4);
stlink_write_mem32(gui->sl, 0x40026400 + 0x10 + 0x18 * i, 4);
stlink_write_mem32(gui->sl, 0x40026000 + 0x24 + 0x18 * i, 4);
stlink_write_mem32(gui->sl, 0x40026400 + 0x24 + 0x18 * i, 4);
}
}
stlink_gui_set_connected (gui);
}
int main(int argc, char** argv) {
int32_t voltage;
stlink_t *sl = NULL;
st_state_t state;
memset(&state, 0, sizeof(state));
// set defaults...
state.stlink_version = 2;
state.logging_level = DEFAULT_LOGGING_LEVEL;
state.listen_port = DEFAULT_GDB_LISTEN_PORT;
state.reset = 1; /* By default, reset board */
parse_options(argc, argv, &state);
switch (state.stlink_version) {
case 2:
sl = stlink_open_usb(state.logging_level, 0);
if(sl == NULL) return 1;
break;
case 1:
sl = stlink_v1_open(state.logging_level, 0);
if(sl == NULL) return 1;
break;
}
connected_stlink = sl;
signal(SIGINT, &cleanup);
signal(SIGTERM, &cleanup);
if (state.reset) {
stlink_reset(sl);
}
ILOG("Chip ID is %08x, Core ID is %08x.\n", sl->chip_id, sl->core_id);
voltage = stlink_target_voltage(sl);
if (voltage != -1) {
ILOG("Target voltage is %d mV.\n", voltage);
}
sl->verbose=0;
current_memory_map = make_memory_map(sl);
#ifdef __MINGW32__
WSADATA wsadata;
if (WSAStartup(MAKEWORD(2,2),&wsadata) !=0 ) {
goto winsock_error;
}
#endif
do {
serve(sl, &state);
/* Continue */
stlink_run(sl);
} while (state.persistent);
#ifdef __MINGW32__
winsock_error:
WSACleanup();
#endif
/* Switch back to mass storage mode before closing. */
stlink_exit_debug_mode(sl);
stlink_close(sl);
return 0;
}
int main(int ac, char** av)
{
stlink_t* sl = NULL;
struct opts o;
char serial_buffer[13] = {0};
o.serial = serial_buffer;
int err = -1;
o.size = 0;
if (get_opts(&o, ac - 1, av + 1) == -1)
{
printf("invalid command line\n");
usage();
goto on_error;
}
if (o.devname != NULL) /* stlinkv1 */
{
sl = stlink_v1_open(o.log_level, 1);
if (sl == NULL) goto on_error;
sl->verbose = o.log_level;
}
else /* stlinkv2 */
{
sl = stlink_open_usb(o.log_level, 1, o.serial);
if (sl == NULL) goto on_error;
sl->verbose = o.log_level;
}
if (stlink_current_mode(sl) == STLINK_DEV_DFU_MODE)
stlink_exit_dfu_mode(sl);
if (stlink_current_mode(sl) != STLINK_DEV_DEBUG_MODE)
stlink_enter_swd_mode(sl);
if (o.reset) {
stlink_jtag_reset(sl,2);
stlink_reset(sl);
}
// Disable DMA - Set All DMA CCR Registers to zero. - AKS 1/7/2013
if (sl->chip_id == STM32_CHIPID_F4)
{
memset(sl->q_buf,0,4);
for (int i=0; i<8; i++) {
stlink_write_mem32(sl,0x40026000+0x10+0x18*i,4);
stlink_write_mem32(sl,0x40026400+0x10+0x18*i,4);
stlink_write_mem32(sl,0x40026000+0x24+0x18*i,4);
stlink_write_mem32(sl,0x40026400+0x24+0x18*i,4);
}
}
// Core must be halted to use RAM based flashloaders
stlink_force_debug(sl);
stlink_status(sl);
if (o.cmd == DO_WRITE) /* write */
{
if ((o.addr >= sl->flash_base) &&
(o.addr < sl->flash_base + sl->flash_size)) {
err = stlink_fwrite_flash(sl, o.filename, o.addr);
if (err == -1)
{
printf("stlink_fwrite_flash() == -1\n");
goto on_error;
}
}
else if ((o.addr >= sl->sram_base) &&
(o.addr < sl->sram_base + sl->sram_size)) {
err = stlink_fwrite_sram(sl, o.filename, o.addr);
if (err == -1)
{
printf("stlink_sram_flash() == -1\n");
goto on_error;
}
}
} else if (o.cmd == DO_ERASE)
{
err = stlink_erase_flash_mass(sl);
if (err == -1)
{
printf("stlink_fwrite_flash() == -1\n");
goto on_error;
}
}
else /* read */
{
if ((o.addr >= sl->flash_base) && (o.size == 0) &&
(o.addr < sl->flash_base + sl->flash_size))
o.size = sl->flash_size;
else if ((o.addr >= sl->sram_base) && (o.size == 0) &&
(o.addr < sl->sram_base + sl->sram_size))
o.size = sl->sram_size;
err = stlink_fread(sl, o.filename, o.addr, o.size);
if (err == -1)
{
printf("stlink_fread() == -1\n");
goto on_error;
}
}
if (o.reset) {
stlink_jtag_reset(sl,2);
stlink_reset(sl);
}
/* success */
err = 0;
on_error:
if (sl != NULL)
{
stlink_exit_debug_mode(sl);
stlink_close(sl);
}
return err;
}
int main(int ac, char** av)
{
sl = NULL;
struct opts o;
int err = -1;
signal(SIGINT, catcher);
o.size = 0;
if (get_opts(&o, ac - 1, av + 1) == -1)
{
printf("invalid command line\n");
usage();
goto on_error;
}
if (o.devname != NULL) /* stlinkv1 */
{
sl = stlink_v1_open(50);
sl->verbose = 50;
if (sl == NULL) goto on_error;
}
else /* stlinkv2 */
{
sl = stlink_open_usb(50);
sl->verbose = 50;
if (sl == NULL) goto on_error;
}
if (stlink_current_mode(sl) == STLINK_DEV_DFU_MODE)
stlink_exit_dfu_mode(sl);
if (stlink_current_mode(sl) != STLINK_DEV_DEBUG_MODE)
stlink_enter_swd_mode(sl);
stlink_reset(sl);
printf("Erasing chip entirely...");
stlink_erase_flash_mass(sl);
printf(" Done\n");
stlink_force_debug(sl);
stlink_reset(sl);
if (o.do_read == 0) /* write */
{
err = stlink_fwrite_flash(sl, o.filename, o.addr);
if (err == -1)
{
printf("stlink_fwrite_flash() == -1\n");
goto on_error;
}
}
else /* read */
{
err = stlink_fread(sl, o.filename, o.addr, o.size);
if (err == -1)
{
printf("stlink_fread() == -1\n");
goto on_error;
}
}
/* success */
err = 0;
on_error:
if (sl != NULL)
{
stlink_reset(sl);
stlink_run(sl);
stlink_close(sl);
}
return err;
}
int main(int ac, char** av) {
stlink_t* sl;
/* unused */
ac = ac;
av = av;
sl = stlink_open_usb(10, 1);
if (sl != NULL) {
printf("ST-Linky proof-of-concept terminal :: Created by Necromant for lulz\n");
stlink_version(sl);
stlink_enter_swd_mode(sl);
printf("chip id: %#x\n", sl->chip_id);
printf("core_id: %#x\n", sl->core_id);
cortex_m3_cpuid_t cpuid;
stlink_cpu_id(sl, &cpuid);
printf("cpuid:impl_id = %0#x, variant = %#x\n", cpuid.implementer_id, cpuid.variant);
printf("cpuid:part = %#x, rev = %#x\n", cpuid.part, cpuid.revision);
stlink_reset(sl);
stlink_force_debug(sl);
stlink_run(sl);
stlink_status(sl);
/* wait for device to boot */
/* TODO: Make timeout adjustable via command line */
sleep(1);
struct stlinky *st = stlinky_detect(sl);
if (st == NULL)
{
printf("stlinky magic not found in sram :(\n");
goto bailout;
}
char* rxbuf = malloc(st->bufsize);
char* txbuf = malloc(st->bufsize);
size_t tmp;
nonblock(1);
int fd = fileno(stdin);
int saved_flags = fcntl(fd, F_GETFL);
fcntl(fd, F_SETFL, saved_flags & ~O_NONBLOCK);
signal(SIGINT, cleanup);
printf("Entering interactive terminal. CTRL+C to exit\n\n\n");
while(1) {
if (stlinky_canrx(st)) {
tmp = stlinky_rx(st, rxbuf);
fwrite(rxbuf,tmp,1,stdout);
fflush(stdout);
}
if (kbhit()) {
tmp = read(fd, txbuf, st->bufsize);
stlinky_tx(st,txbuf,tmp);
}
if (!keep_running)
break;
}
bailout:
nonblock(0);
stlink_exit_debug_mode(sl);
stlink_close(sl);
}
return 0;
}
int main(int ac, char** av)
{
stlink_t* sl = NULL;
struct flash_opts o;
int err = -1;
uint8_t * mem = NULL;
o.size = 0;
if (flash_get_opts(&o, ac - 1, av + 1) == -1)
{
printf("invalid command line\n");
usage();
return -1;
}
printf("st-flash %s\n", STLINK_VERSION);
if (o.devname != NULL) /* stlinkv1 */
sl = stlink_v1_open(o.log_level, 1);
else /* stlinkv2 */
sl = stlink_open_usb(o.log_level, 1, (char *)o.serial);
if (sl == NULL)
return -1;
if ( o.flash_size != 0u && o.flash_size != sl->flash_size ) {
sl->flash_size = o.flash_size;
printf("Forcing flash size: --flash=0x%08X\n",(unsigned int)sl->flash_size);
}
sl->verbose = o.log_level;
connected_stlink = sl;
signal(SIGINT, &cleanup);
signal(SIGTERM, &cleanup);
signal(SIGSEGV, &cleanup);
if (stlink_current_mode(sl) == STLINK_DEV_DFU_MODE) {
if (stlink_exit_dfu_mode(sl)) {
printf("Failed to exit DFU mode\n");
goto on_error;
}
}
if (stlink_current_mode(sl) != STLINK_DEV_DEBUG_MODE) {
if (stlink_enter_swd_mode(sl)) {
printf("Failed to enter SWD mode\n");
goto on_error;
}
}
if (o.reset){
if (stlink_jtag_reset(sl, 2)) {
printf("Failed to reset JTAG\n");
goto on_error;
}
if (stlink_reset(sl)) {
printf("Failed to reset device\n");
goto on_error;
}
}
// Disable DMA - Set All DMA CCR Registers to zero. - AKS 1/7/2013
if (sl->chip_id == STLINK_CHIPID_STM32_F4)
{
memset(sl->q_buf,0,4);
for (int i=0;i<8;i++) {
stlink_write_mem32(sl,0x40026000+0x10+0x18*i,4);
stlink_write_mem32(sl,0x40026400+0x10+0x18*i,4);
stlink_write_mem32(sl,0x40026000+0x24+0x18*i,4);
stlink_write_mem32(sl,0x40026400+0x24+0x18*i,4);
}
}
// Core must be halted to use RAM based flashloaders
if (stlink_force_debug(sl)) {
printf("Failed to halt the core\n");
goto on_error;
}
if (stlink_status(sl)) {
printf("Failed to get Core's status\n");
goto on_error;
}
if (o.cmd == FLASH_CMD_WRITE) /* write */
{
size_t size = 0;
if(o.format == FLASH_FORMAT_IHEX) {
err = stlink_parse_ihex(o.filename, stlink_get_erased_pattern(sl), &mem, &size, &o.addr);
if (err == -1) {
printf("Cannot parse %s as Intel-HEX file\n", o.filename);
goto on_error;
}
}
if ((o.addr >= sl->flash_base) &&
(o.addr < sl->flash_base + sl->flash_size)) {
if(o.format == FLASH_FORMAT_IHEX)
err = stlink_mwrite_flash(sl, mem, (uint32_t)size, o.addr);
else
err = stlink_fwrite_flash(sl, o.filename, o.addr);
if (err == -1)
{
printf("stlink_fwrite_flash() == -1\n");
goto on_error;
}
}
else if ((o.addr >= sl->sram_base) &&
(o.addr < sl->sram_base + sl->sram_size)) {
if(o.format == FLASH_FORMAT_IHEX)
err = stlink_mwrite_sram(sl, mem, (uint32_t)size, o.addr);
else
err = stlink_fwrite_sram(sl, o.filename, o.addr);
if (err == -1)
{
printf("stlink_fwrite_sram() == -1\n");
goto on_error;
}
}
else {
err = -1;
printf("Unknown memory region\n");
goto on_error;
}
} else if (o.cmd == FLASH_CMD_LOCK)
{
err = stlink_set_read_protection(sl, true);
if(err != 0)
{
printf("stlink_set_read_protection(true) != 0\n");
goto on_error;
}
} else if (o.cmd == FLASH_CMD_UNLOCK)
{
err = stlink_set_read_protection(sl, false);
if(err != 0)
{
printf("stlink_set_read_protection(false) != 0\n");
goto on_error;
}
} else if (o.cmd == FLASH_CMD_ERASE)
{
err = stlink_erase_flash_mass(sl);
if (err == -1)
{
printf("stlink_erase_flash_mass() == -1\n");
goto on_error;
}
} else if (o.cmd == CMD_RESET)
{
if (stlink_jtag_reset(sl, 2)) {
printf("Failed to reset JTAG\n");
goto on_error;
}
if (stlink_reset(sl)) {
printf("Failed to reset device\n");
goto on_error;
}
}
else /* read */
{
if ((o.addr >= sl->flash_base) && (o.size == 0) &&
(o.addr < sl->flash_base + sl->flash_size))
o.size = sl->flash_size;
else if ((o.addr >= sl->sram_base) && (o.size == 0) &&
(o.addr < sl->sram_base + sl->sram_size))
o.size = sl->sram_size;
err = stlink_fread(sl, o.filename, o.format == FLASH_FORMAT_IHEX, o.addr, o.size);
if (err == -1)
{
printf("stlink_fread() == -1\n");
goto on_error;
}
}
if (o.reset){
stlink_jtag_reset(sl,2);
stlink_reset(sl);
}
/* success */
err = 0;
on_error:
stlink_exit_debug_mode(sl);
stlink_close(sl);
free(mem);
return err;
}
int main(int ac, char** av) {
struct stlinky *st;
sig_init();
sl = stlink_open_usb(10, 1);
if (sl != NULL) {
printf("ST-Linky proof-of-concept terminal :: Created by Necromant for lulz\n");
stlink_version(sl);
stlink_enter_swd_mode(sl);
printf("chip id: %#x\n", sl->chip_id);
printf("core_id: %#x\n", sl->core_id);
cortex_m3_cpuid_t cpuid;
stlink_cpu_id(sl, &cpuid);
printf("cpuid:impl_id = %0#x, variant = %#x\n", cpuid.implementer_id, cpuid.variant);
printf("cpuid:part = %#x, rev = %#x\n", cpuid.part, cpuid.revision);
stlink_reset(sl);
stlink_force_debug(sl);
stlink_run(sl);
stlink_status(sl);
/* wait for device to boot */
/* TODO: Make timeout adjustable via command line */
sleep(1);
if(ac == 1){
st = stlinky_detect(sl);
}else if(ac == 2){
st = malloc(sizeof(struct stlinky));
st->sl = sl;
st->off = (int)strtol(av[1], NULL, 16);
printf("using stlinky at 0x%x\n", st->off);
stlink_read_mem32(sl, st->off + 4, 4);
st->bufsize = (size_t) *(unsigned char*) sl->q_buf;
printf("stlinky buffer size 0x%zu \n", st->bufsize);
}else{
cleanup(0);
}
if (st == NULL)
{
printf("stlinky magic not found in sram :(\n");
cleanup(0);
}
char* rxbuf = malloc(st->bufsize);
char* txbuf = malloc(st->bufsize);
size_t tmp;
nonblock(1);
int fd = fileno(stdin);
int saved_flags = fcntl(fd, F_GETFL);
fcntl(fd, F_SETFL, saved_flags & ~O_NONBLOCK);
printf("Entering interactive terminal. CTRL+C to exit\n\n\n");
while(1) {
sig_process();
if (stlinky_canrx(st)) {
tmp = stlinky_rx(st, rxbuf);
fwrite(rxbuf,tmp,1,stdout);
fflush(stdout);
}
if (kbhit()) {
tmp = read(fd, txbuf, st->bufsize);
stlinky_tx(st,txbuf,tmp);
}
}
}
return 0;
}
int main ( int argc, char *argv[] )
{
stlink_t* sl;
unsigned int ra;
unsigned int rb;
unsigned int flen;
int ret;
if(argc<2)
{
printf(".bin file not specified\n");
return(1);
}
fp=fopen(argv[1],"rb");
if(fp==NULL)
{
printf("Error opening file [%s]\n",argv[1]);
return(1);
}
memset(pdata,0xFF,sizeof(pdata));
flen=fread(pdata,1,sizeof(pdata),fp);
flen+=3;
flen>>=2;
fclose(fp);
sl = stlink_open_usb(10);
if(sl==NULL)
{
printf("stlink_open_usb failed\n");
return(1);
}
printf("-- version\n");
stlink_version(sl);
printf("mode before doing anything: %d\n", stlink_current_mode(sl));
if (stlink_current_mode(sl) == STLINK_DEV_DFU_MODE) {
printf("-- exit_dfu_mode\n");
stlink_exit_dfu_mode(sl);
}
printf("-- enter_swd_mode\n");
stlink_enter_swd_mode(sl);
printf("-- mode after entering swd mode: %d\n", stlink_current_mode(sl));
printf("-- chip id: %#x\n", sl->chip_id);
printf("-- core_id: %#x\n", sl->core_id);
cortex_m3_cpuid_t cpuid;
stlink_cpu_id(sl, &cpuid);
printf("cpuid:impl_id = %0#x, variant = %#x\n", cpuid.implementer_id, cpuid.variant);
printf("cpuid:part = %#x, rev = %#x\n", cpuid.part, cpuid.revision);
// printf("-- status\n");
//stlink_status(sl);
printf("-- reset\n");
stlink_reset(sl);
stlink_force_debug(sl);
// printf("-- status\n");
// stlink_status(sl);
#ifdef LOAD_RAM
printf("-- load\n");
for(ra=0;ra<flen;ra++)
{
write_uint32(sl->q_buf,pdata[ra]);
stlink_write_mem32(sl, 0x20000000+(ra<<2), 4);
}
for(ra=0;ra<8;ra++)
{
stlink_read_mem32(sl, 0x20000000+(ra<<2), 4);
rb=read_uint32(sl->q_buf,0);
printf("[0x%08X] 0x%08X 0x%08X\n",ra,rb,pdata[ra]);
}
printf("-- run\n");
stlink_write_reg(sl, 0x20020000, 13); /* pc register */
stlink_write_reg(sl, 0x20000000, 15); /* pc register */
stlink_run(sl);
ret =0;
#endif //LOAD_RAM
#ifdef LOAD_FLASH
ra=0;
rb=0;
ret=stlink_write_flash(sl,0x08000000,(unsigned char *)pdata,0x4000);
if(ret)
{
printf("stlink_write_flasin error\n");
}
#endif //LOAD_FLASH
printf("-- exit_debug_mode\n");
stlink_exit_debug_mode(sl);
stlink_close(sl);
return 0;
}
int main(int argc, char** argv) {
stlink_t *sl = NULL;
st_state_t state;
memset(&state, 0, sizeof(state));
// set defaults...
state.stlink_version = 2;
state.logging_level = DEFAULT_LOGGING_LEVEL;
state.listen_port = DEFAULT_GDB_LISTEN_PORT;
parse_options(argc, argv, &state);
switch (state.stlink_version) {
case 2:
sl = stlink_open_usb(state.logging_level);
if(sl == NULL) return 1;
break;
case 1:
sl = stlink_v1_open(state.logging_level);
if(sl == NULL) return 1;
break;
}
if (stlink_current_mode(sl) != STLINK_DEV_DEBUG_MODE) {
if (stlink_current_mode(sl) == STLINK_DEV_DFU_MODE) {
stlink_exit_dfu_mode(sl);
}
stlink_enter_swd_mode(sl);
}
uint32_t chip_id = stlink_chip_id(sl);
uint32_t core_id = stlink_core_id(sl);
/* Fix chip_id for F4 */
if (((chip_id & 0xFFF) == 0x411) && (core_id == CORE_M4_R0)) {
printf("Fixing wrong chip_id for STM32F4 Rev A errata\n");
chip_id = 0x413;
}
printf("Chip ID is %08x, Core ID is %08x.\n", chip_id, core_id);
const struct chip_params* params = NULL;
for(int i = 0; i < sizeof(devices) / sizeof(devices[0]); i++) {
if(devices[i].chip_id == (chip_id & 0xFFF)) {
params = &devices[i];
break;
}
}
if(params == NULL) {
fprintf(stderr, "Cannot recognize the connected device!\n");
return 0;
}
printf("Device connected: %s\n", params->description);
printf("Device parameters: SRAM: 0x%x bytes, Flash: up to 0x%x bytes in pages of 0x%x bytes\n",
params->sram_size, params->max_flash_size, params->flash_pagesize);
FLASH_PAGE = params->flash_pagesize;
uint32_t flash_size;
stlink_read_mem32(sl, params->flash_size_reg, 4);
flash_size = sl->q_buf[0] | (sl->q_buf[1] << 8);
printf("Flash size is %d KiB.\n", flash_size);
// memory map is in 1k blocks.
current_memory_map = make_memory_map(params, flash_size * 0x400);
while(serve(sl, state.listen_port) == 0);
/* Switch back to mass storage mode before closing. */
stlink_run(sl);
stlink_exit_debug_mode(sl);
stlink_close(sl);
return 0;
}
int main(int ac, char** av)
{
(void)ac;
(void)av;
stlink_t* sl;
reg regs;
sl = stlink_open_usb(10, 1, NULL);
if (sl != NULL) {
printf("-- version\n");
stlink_version(sl);
printf("mode before doing anything: %d\n", stlink_current_mode(sl));
if (stlink_current_mode(sl) == STLINK_DEV_DFU_MODE) {
printf("-- exit_dfu_mode\n");
stlink_exit_dfu_mode(sl);
}
printf("-- enter_swd_mode\n");
stlink_enter_swd_mode(sl);
printf("-- mode after entering swd mode: %d\n", stlink_current_mode(sl));
printf("-- chip id: %#x\n", sl->chip_id);
printf("-- core_id: %#x\n", sl->core_id);
cortex_m3_cpuid_t cpuid;
stlink_cpu_id(sl, &cpuid);
printf("cpuid:impl_id = %0#x, variant = %#x\n", cpuid.implementer_id, cpuid.variant);
printf("cpuid:part = %#x, rev = %#x\n", cpuid.part, cpuid.revision);
printf("-- read_sram\n");
static const uint32_t sram_base = STM32_SRAM_BASE;
uint32_t off;
for (off = 0; off < 16; off += 4)
stlink_read_mem32(sl, sram_base + off, 4);
printf("FP_CTRL\n");
stlink_read_mem32(sl, STLINK_REG_CM3_FP_CTRL, 4);
// no idea what reg this is.. */
// stlink_read_mem32(sl, 0xe000ed90, 4);
// no idea what register this is...
// stlink_read_mem32(sl, 0xe000edf0, 4);
// offset 0xC into TIM11 register? TIMx_DIER?
// stlink_read_mem32(sl, 0x4001100c, 4); */
/* Test 32 bit Write */
write_uint32(sl->q_buf,0x01234567);
stlink_write_mem32(sl,0x200000a8,4);
write_uint32(sl->q_buf,0x89abcdef);
stlink_write_mem32(sl,0x200000ac, 4);
stlink_read_mem32(sl, 0x200000a8, 4);
stlink_read_mem32(sl, 0x200000ac, 4);
/* Test 8 bit write */
write_uint32(sl->q_buf,0x01234567);
stlink_write_mem8(sl,0x200001a8,3);
write_uint32(sl->q_buf,0x89abcdef);
stlink_write_mem8(sl, 0x200001ac, 3);
stlink_read_mem32(sl, 0x200001a8, 4);
stlink_read_mem32(sl, 0x200001ac, 4);
printf("-- status\n");
stlink_status(sl);
printf("-- reset\n");
stlink_reset(sl);
stlink_force_debug(sl);
/* Test reg write*/
stlink_write_reg(sl, 0x01234567, 3);
stlink_write_reg(sl, 0x89abcdef, 4);
stlink_write_reg(sl, 0x12345678, 15);
for (off = 0; off < 21; off += 1)
stlink_read_reg(sl, off, ®s);
stlink_read_all_regs(sl, ®s);
printf("-- status\n");
stlink_status(sl);
printf("-- step\n");
stlink_step(sl);
printf("-- run\n");
stlink_run(sl);
printf("-- exit_debug_mode\n");
stlink_exit_debug_mode(sl);
stlink_close(sl);
}
return 0;
}
