int main(int argc, char** argv) {
int32_t voltage;
stlink_t *sl = NULL;
st_state_t state;
memset(&state, 0, sizeof(state));
// set defaults...
state.stlink_version = 2;
state.logging_level = DEFAULT_LOGGING_LEVEL;
state.listen_port = DEFAULT_GDB_LISTEN_PORT;
state.reset = 1; /* By default, reset board */
parse_options(argc, argv, &state);
switch (state.stlink_version) {
case 2:
sl = stlink_open_usb(state.logging_level, 0);
if(sl == NULL) return 1;
break;
case 1:
sl = stlink_v1_open(state.logging_level, 0);
if(sl == NULL) return 1;
break;
}
connected_stlink = sl;
signal(SIGINT, &cleanup);
signal(SIGTERM, &cleanup);
if (state.reset) {
stlink_reset(sl);
}
ILOG("Chip ID is %08x, Core ID is %08x.\n", sl->chip_id, sl->core_id);
voltage = stlink_target_voltage(sl);
if (voltage != -1) {
ILOG("Target voltage is %d mV.\n", voltage);
}
sl->verbose=0;
current_memory_map = make_memory_map(sl);
#ifdef __MINGW32__
WSADATA wsadata;
if (WSAStartup(MAKEWORD(2,2),&wsadata) !=0 ) {
goto winsock_error;
}
#endif
do {
serve(sl, &state);
/* Continue */
stlink_run(sl);
} while (state.persistent);
#ifdef __MINGW32__
winsock_error:
WSACleanup();
#endif
/* Switch back to mass storage mode before closing. */
stlink_exit_debug_mode(sl);
stlink_close(sl);
return 0;
}
int stlink_flash_loader_write_to_sram(stlink_t *sl, stm32_addr_t* addr, size_t* size)
{
const uint8_t* loader_code;
size_t loader_size;
if (sl->chip_id == STLINK_CHIPID_STM32_L1_MEDIUM || sl->chip_id == STLINK_CHIPID_STM32_L1_CAT2
|| sl->chip_id == STLINK_CHIPID_STM32_L1_MEDIUM_PLUS || sl->chip_id == STLINK_CHIPID_STM32_L1_HIGH
|| sl->chip_id == STLINK_CHIPID_STM32_L152_RE
|| sl->chip_id == STLINK_CHIPID_STM32_L0 || sl->chip_id == STLINK_CHIPID_STM32_L0_CAT5 || sl->chip_id == STLINK_CHIPID_STM32_L0_CAT2) { /* stm32l */
loader_code = loader_code_stm32l;
loader_size = sizeof(loader_code_stm32l);
} else if (sl->core_id == STM32VL_CORE_ID
|| sl->chip_id == STLINK_CHIPID_STM32_F3
|| sl->chip_id == STLINK_CHIPID_STM32_F3_SMALL
|| sl->chip_id == STLINK_CHIPID_STM32_F303_HIGH
|| sl->chip_id == STLINK_CHIPID_STM32_F37x
|| sl->chip_id == STLINK_CHIPID_STM32_F334) {
loader_code = loader_code_stm32vl;
loader_size = sizeof(loader_code_stm32vl);
} else if (sl->chip_id == STLINK_CHIPID_STM32_F2 ||
sl->chip_id == STLINK_CHIPID_STM32_F4 ||
sl->chip_id == STLINK_CHIPID_STM32_F4_DE ||
sl->chip_id == STLINK_CHIPID_STM32_F4_LP ||
sl->chip_id == STLINK_CHIPID_STM32_F4_HD ||
sl->chip_id == STLINK_CHIPID_STM32_F4_DSI ||
sl->chip_id == STLINK_CHIPID_STM32_F410 ||
sl->chip_id == STLINK_CHIPID_STM32_F411RE ||
sl->chip_id == STLINK_CHIPID_STM32_F446
) {
if( sl->version.stlink_v == 1 ) {
printf("STLINK V1 cannot read voltage, defaulting to 32-bit writes on F4 devices\n");
loader_code = loader_code_stm32f4;
loader_size = sizeof(loader_code_stm32f4);
}
else {
int voltage = stlink_target_voltage(sl);
if (voltage == -1) {
printf("Failed to read Target voltage\n");
return voltage;
} else if (voltage > 2700) {
loader_code = loader_code_stm32f4;
loader_size = sizeof(loader_code_stm32f4);
} else {
loader_code = loader_code_stm32f4_lv;
loader_size = sizeof(loader_code_stm32f4_lv);
}
}
} else if (sl->core_id == STM32F7_CORE_ID ||
sl->chip_id == STLINK_CHIPID_STM32_F7 ||
sl->chip_id == STLINK_CHIPID_STM32_F7XXXX) {
loader_code = loader_code_stm32f7;
loader_size = sizeof(loader_code_stm32f7);
} else if (sl->chip_id == STLINK_CHIPID_STM32_F0 || sl->chip_id == STLINK_CHIPID_STM32_F04 || sl->chip_id == STLINK_CHIPID_STM32_F0_CAN || sl->chip_id == STLINK_CHIPID_STM32_F0_SMALL || sl->chip_id == STLINK_CHIPID_STM32_F09X) {
loader_code = loader_code_stm32f0;
loader_size = sizeof(loader_code_stm32f0);
} else if (sl->chip_id == STLINK_CHIPID_STM32_L4) {
loader_code = loader_code_stm32l4;
loader_size = sizeof(loader_code_stm32l4);
} else {
ELOG("unknown coreid, not sure what flash loader to use, aborting! coreid: %x, chipid: %x\n", sl->core_id, sl->chip_id);
return -1;
}
memcpy(sl->q_buf, loader_code, loader_size);
stlink_write_mem32(sl, sl->sram_base, loader_size);
*addr = sl->sram_base;
*size = loader_size;
/* success */
return 0;
}
