static int stm32_tim_setclock(FAR struct stm32_tim_dev_s *dev, uint32_t freq)
{
int prescaler;
ASSERT(dev);
/* Disable Timer? */
if (freq == 0) {
stm32_tim_disable(dev);
return 0;
}
#if STM32_NATIM > 0
if (((struct stm32_tim_priv_s *)dev)->base == STM32_TIM1_BASE ||
((struct stm32_tim_priv_s *)dev)->base == STM32_TIM8_BASE)
prescaler = STM32_TIM18_FREQUENCY / freq;
else
#endif
prescaler = STM32_TIM27_FREQUENCY / freq;
/* we need to decrement value for '1', but only, if we are allowed to
* not to cause underflow. Check for overflow.
*/
if (prescaler > 0) prescaler--;
if (prescaler > 0xFFFF) prescaler = 0xFFFF;
stm32_tim_putreg(dev, STM32_BTIM_PSC_OFFSET, prescaler);
stm32_tim_enable(dev);
return prescaler;
}
static int stm32_tim_setclock(FAR struct stm32_tim_dev_s *dev, uint32_t freq)
{
uint32_t freqin;
int prescaler;
DEBUGASSERT(dev != NULL);
/* Disable Timer? */
if (freq == 0)
{
stm32_tim_disable(dev);
return 0;
}
/* Get the input clock frequency for this timer. These vary with
* different timer clock sources, MCU-specific timer configuration, and
* board-specific clock configuration. The correct input clock frequency
* must be defined in the board.h header file.
*/
switch (((struct stm32_tim_priv_s *)dev)->base)
{
#ifdef CONFIG_STM32F7_TIM1
case STM32_TIM1_BASE:
freqin = STM32_APB2_TIM1_CLKIN;
break;
#endif
#ifdef CONFIG_STM32F7_TIM2
case STM32_TIM2_BASE:
freqin = STM32_APB1_TIM2_CLKIN;
break;
#endif
#ifdef CONFIG_STM32F7_TIM3
case STM32_TIM3_BASE:
freqin = STM32_APB1_TIM3_CLKIN;
break;
#endif
#ifdef CONFIG_STM32F7_TIM4
case STM32_TIM4_BASE:
freqin = STM32_APB1_TIM4_CLKIN;
break;
#endif
#ifdef CONFIG_STM32F7_TIM5
case STM32_TIM5_BASE:
freqin = STM32_APB1_TIM5_CLKIN;
break;
#endif
#ifdef CONFIG_STM32F7_TIM6
case STM32_TIM6_BASE:
freqin = STM32_APB1_TIM6_CLKIN;
break;
#endif
#ifdef CONFIG_STM32F7_TIM7
case STM32_TIM7_BASE:
freqin = STM32_APB1_TIM7_CLKIN;
break;
#endif
#ifdef CONFIG_STM32F7_TIM8
case STM32_TIM8_BASE:
freqin = STM32_APB2_TIM8_CLKIN;
break;
#endif
#ifdef CONFIG_STM32F7_TIM9
case STM32_TIM9_BASE:
freqin = STM32_APB2_TIM9_CLKIN;
break;
#endif
#ifdef CONFIG_STM32F7_TIM10
case STM32_TIM10_BASE:
freqin = STM32_APB2_TIM10_CLKIN;
break;
#endif
#ifdef CONFIG_STM32F7_TIM11
case STM32_TIM11_BASE:
freqin = STM32_APB2_TIM11_CLKIN;
break;
#endif
#ifdef CONFIG_STM32F7_TIM12
case STM32_TIM12_BASE:
freqin = STM32_APB1_TIM12_CLKIN;
break;
#endif
#ifdef CONFIG_STM32F7_TIM13
case STM32_TIM13_BASE:
freqin = STM32_APB1_TIM13_CLKIN;
break;
#endif
#ifdef CONFIG_STM32F7_TIM14
case STM32_TIM14_BASE:
freqin = STM32_APB1_TIM14_CLKIN;
break;
#endif
default:
return -EINVAL;
}
/* Select a pre-scaler value for this timer using the input clock
* frequency.
*/
prescaler = freqin / freq;
/* We need to decrement value for '1', but only, if that will not to
* cause underflow.
*/
if (prescaler > 0)
{
prescaler--;
}
/* Check for overflow as well. */
if (prescaler > 0xffff)
{
prescaler = 0xffff;
}
stm32_putreg16(dev, STM32_BTIM_PSC_OFFSET, prescaler);
stm32_tim_enable(dev);
return prescaler;
}
