static int stm32x_wait_status_busy(struct flash_bank *bank, int timeout)
{
struct target *target = bank->target;
uint32_t status;
int retval = ERROR_OK;
/* wait for busy to clear */
for (;;)
{
retval = stm32x_get_flash_status(bank, &status);
if (retval != ERROR_OK)
return retval;
LOG_DEBUG("status: 0x%" PRIx32 "", status);
if ((status & FLASH_BSY) == 0)
break;
if (timeout-- <= 0)
{
LOG_ERROR("timed out waiting for flash");
return ERROR_FAIL;
}
alive_sleep(1);
}
if (status & FLASH_WRPRTERR)
{
LOG_ERROR("stm32x device protected");
retval = ERROR_FAIL;
}
if (status & FLASH_PGERR)
{
LOG_ERROR("stm32x device programming failed");
retval = ERROR_FAIL;
}
/* Clear but report errors */
if (status & (FLASH_WRPRTERR | FLASH_PGERR))
{
/* If this operation fails, we ignore it and report the original
* retval
*/
target_write_u32(target, stm32x_get_flash_reg(bank, STM32_FLASH_SR),
FLASH_WRPRTERR | FLASH_PGERR);
}
return retval;
}
static uint32_t stm32x_wait_status_busy(struct flash_bank *bank, int timeout)
{
struct target *target = bank->target;
uint32_t status;
/* wait for busy to clear */
while (((status = stm32x_get_flash_status(bank)) & FLASH_BSY) && (timeout-- > 0))
{
LOG_DEBUG("status: 0x%" PRIx32 "", status);
alive_sleep(1);
}
/* Clear but report errors */
if (status & (FLASH_WRPRTERR | FLASH_PGERR))
{
target_write_u32(target, STM32_FLASH_SR, FLASH_WRPRTERR | FLASH_PGERR);
}
return status;
}
