/* * Send a control event to the guest. */ static size_t send_control_event(VirtIOCrypto *crdev, uint16_t event, uint16_t value) { struct virtio_crypto_control cpkt; VirtQueueElement elem; VirtQueue *vq; FUNC_IN; stw_p(&cpkt.event, event); stw_p(&cpkt.value, value); vq = crdev->c_ivq; if (!virtio_queue_ready(vq)) { return 0; } if (!virtqueue_pop(vq, &elem)) { return 0; } memcpy(elem.in_sg[0].iov_base, &cpkt, sizeof(cpkt)); virtqueue_push(vq, &elem, sizeof(cpkt)); virtio_notify(&crdev->vdev, vq); FUNC_OUT; return sizeof(cpkt); }
static void virtio_net_get_config(VirtIODevice *vdev, uint8_t *config) { VirtIONet *n = to_virtio_net(vdev); struct virtio_net_config netcfg; stw_p(&netcfg.status, n->status); memcpy(netcfg.mac, n->mac, ETH_ALEN); memcpy(config, &netcfg, sizeof(netcfg)); }
void cpu_outw(pio_addr_t addr, uint16_t val) { uint8_t buf[2]; trace_cpu_out(addr, 'w', val); stw_p(buf, val); address_space_write(&address_space_io, addr, MEMTXATTRS_UNSPECIFIED, buf, 2); }
/* warning: addr must be aligned */ static inline void glue(address_space_stw_internal, SUFFIX)(ARG1_DECL, hwaddr addr, uint32_t val, MemTxAttrs attrs, MemTxResult *result, enum device_endian endian) { uint8_t *ptr; MemoryRegion *mr; hwaddr l = 2; hwaddr addr1; MemTxResult r; bool release_lock = false; RCU_READ_LOCK(); mr = TRANSLATE(addr, &addr1, &l, true); if (l < 2 || !IS_DIRECT(mr, true)) { release_lock |= prepare_mmio_access(mr); #if defined(TARGET_WORDS_BIGENDIAN) if (endian == DEVICE_LITTLE_ENDIAN) { val = bswap16(val); } #else if (endian == DEVICE_BIG_ENDIAN) { val = bswap16(val); } #endif r = memory_region_dispatch_write(mr, addr1, val, 2, attrs); } else { /* RAM case */ ptr = MAP_RAM(mr, addr1); switch (endian) { case DEVICE_LITTLE_ENDIAN: stw_le_p(ptr, val); break; case DEVICE_BIG_ENDIAN: stw_be_p(ptr, val); break; default: stw_p(ptr, val); break; } INVALIDATE(mr, addr1, 2); r = MEMTX_OK; } if (result) { *result = r; } if (release_lock) { qemu_mutex_unlock_iothread(); } RCU_READ_UNLOCK(); }
static void virtio_9p_get_config(VirtIODevice *vdev, uint8_t *config) { int len; struct virtio_9p_config *cfg; V9fsState *s = VIRTIO_9P(vdev); len = strlen(s->tag); cfg = g_malloc0(sizeof(struct virtio_9p_config) + len); stw_p(&cfg->tag_len, len); /* We don't copy the terminating null to config space */ memcpy(cfg->tag, s->tag, len); memcpy(config, cfg, s->config_size); g_free(cfg); }
static void spin_write(void *opaque, hwaddr addr, uint64_t value, unsigned len) { SpinState *s = opaque; int env_idx = addr / sizeof(SpinInfo); CPUPPCState *env; SpinInfo *curspin = &s->spin[env_idx]; uint8_t *curspin_p = (uint8_t*)curspin; for (env = first_cpu; env != NULL; env = env->next_cpu) { if (env->cpu_index == env_idx) { break; } } if (!env) { /* Unknown CPU */ return; } if (!env->cpu_index) { /* primary CPU doesn't spin */ return; } curspin_p = &curspin_p[addr % sizeof(SpinInfo)]; switch (len) { case 1: stb_p(curspin_p, value); break; case 2: stw_p(curspin_p, value); break; case 4: stl_p(curspin_p, value); break; } if (!(ldq_p(&curspin->addr) & 1)) { /* run CPU */ SpinKick kick = { .cpu = ppc_env_get_cpu(env), .spin = curspin, }; run_on_cpu(CPU(kick.cpu), spin_kick, &kick); }
static void spin_write(void *opaque, hwaddr addr, uint64_t value, unsigned len) { SpinState *s = opaque; int env_idx = addr / sizeof(SpinInfo); CPUState *cpu; SpinInfo *curspin = &s->spin[env_idx]; uint8_t *curspin_p = (uint8_t*)curspin; cpu = qemu_get_cpu(env_idx); if (cpu == NULL) { /* Unknown CPU */ return; } if (cpu->cpu_index == 0) { /* primary CPU doesn't spin */ return; } curspin_p = &curspin_p[addr % sizeof(SpinInfo)]; switch (len) { case 1: stb_p(curspin_p, value); break; case 2: stw_p(curspin_p, value); break; case 4: stl_p(curspin_p, value); break; } if (!(ldq_p(&curspin->addr) & 1)) { /* run CPU */ SpinKick kick = { .cpu = POWERPC_CPU(cpu), .spin = curspin, }; run_on_cpu(cpu, spin_kick, &kick); }
/* Store System Information */ uint32_t HELPER(stsi)(CPUS390XState *env, uint64_t a0, uint32_t r0, uint32_t r1) { int cc = 0; int sel1, sel2; if ((r0 & STSI_LEVEL_MASK) <= STSI_LEVEL_3 && ((r0 & STSI_R0_RESERVED_MASK) || (r1 & STSI_R1_RESERVED_MASK))) { /* valid function code, invalid reserved bits */ program_interrupt(env, PGM_SPECIFICATION, 2); } sel1 = r0 & STSI_R0_SEL1_MASK; sel2 = r1 & STSI_R1_SEL2_MASK; /* XXX: spec exception if sysib is not 4k-aligned */ switch (r0 & STSI_LEVEL_MASK) { case STSI_LEVEL_1: if ((sel1 == 1) && (sel2 == 1)) { /* Basic Machine Configuration */ struct sysib_111 sysib; memset(&sysib, 0, sizeof(sysib)); ebcdic_put(sysib.manuf, "QEMU ", 16); /* same as machine type number in STORE CPU ID */ ebcdic_put(sysib.type, "QEMU", 4); /* same as model number in STORE CPU ID */ ebcdic_put(sysib.model, "QEMU ", 16); ebcdic_put(sysib.sequence, "QEMU ", 16); ebcdic_put(sysib.plant, "QEMU", 4); cpu_physical_memory_rw(a0, (uint8_t *)&sysib, sizeof(sysib), 1); } else if ((sel1 == 2) && (sel2 == 1)) { /* Basic Machine CPU */ struct sysib_121 sysib; memset(&sysib, 0, sizeof(sysib)); /* XXX make different for different CPUs? */ ebcdic_put(sysib.sequence, "QEMUQEMUQEMUQEMU", 16); ebcdic_put(sysib.plant, "QEMU", 4); stw_p(&sysib.cpu_addr, env->cpu_num); cpu_physical_memory_rw(a0, (uint8_t *)&sysib, sizeof(sysib), 1); } else if ((sel1 == 2) && (sel2 == 2)) { /* Basic Machine CPUs */ struct sysib_122 sysib; memset(&sysib, 0, sizeof(sysib)); stl_p(&sysib.capability, 0x443afc29); /* XXX change when SMP comes */ stw_p(&sysib.total_cpus, 1); stw_p(&sysib.active_cpus, 1); stw_p(&sysib.standby_cpus, 0); stw_p(&sysib.reserved_cpus, 0); cpu_physical_memory_rw(a0, (uint8_t *)&sysib, sizeof(sysib), 1); } else { cc = 3; } break; case STSI_LEVEL_2: { if ((sel1 == 2) && (sel2 == 1)) { /* LPAR CPU */ struct sysib_221 sysib; memset(&sysib, 0, sizeof(sysib)); /* XXX make different for different CPUs? */ ebcdic_put(sysib.sequence, "QEMUQEMUQEMUQEMU", 16); ebcdic_put(sysib.plant, "QEMU", 4); stw_p(&sysib.cpu_addr, env->cpu_num); stw_p(&sysib.cpu_id, 0); cpu_physical_memory_rw(a0, (uint8_t *)&sysib, sizeof(sysib), 1); } else if ((sel1 == 2) && (sel2 == 2)) { /* LPAR CPUs */ struct sysib_222 sysib; memset(&sysib, 0, sizeof(sysib)); stw_p(&sysib.lpar_num, 0); sysib.lcpuc = 0; /* XXX change when SMP comes */ stw_p(&sysib.total_cpus, 1); stw_p(&sysib.conf_cpus, 1); stw_p(&sysib.standby_cpus, 0); stw_p(&sysib.reserved_cpus, 0); ebcdic_put(sysib.name, "QEMU ", 8); stl_p(&sysib.caf, 1000); stw_p(&sysib.dedicated_cpus, 0); stw_p(&sysib.shared_cpus, 0); cpu_physical_memory_rw(a0, (uint8_t *)&sysib, sizeof(sysib), 1); } else { cc = 3; } break; } case STSI_LEVEL_3: { if ((sel1 == 2) && (sel2 == 2)) { /* VM CPUs */ struct sysib_322 sysib; memset(&sysib, 0, sizeof(sysib)); sysib.count = 1; /* XXX change when SMP comes */ stw_p(&sysib.vm[0].total_cpus, 1); stw_p(&sysib.vm[0].conf_cpus, 1); stw_p(&sysib.vm[0].standby_cpus, 0); stw_p(&sysib.vm[0].reserved_cpus, 0); ebcdic_put(sysib.vm[0].name, "KVMguest", 8); stl_p(&sysib.vm[0].caf, 1000); ebcdic_put(sysib.vm[0].cpi, "KVM/Linux ", 16); cpu_physical_memory_rw(a0, (uint8_t *)&sysib, sizeof(sysib), 1); } else { cc = 3; } break; } case STSI_LEVEL_CURRENT: env->regs[0] = STSI_LEVEL_3; break; default: cc = 3; break; } return cc; }
static void load_linux(void *fw_cfg, const char *kernel_filename, const char *initrd_filename, const char *kernel_cmdline, target_phys_addr_t max_ram_size) { uint16_t protocol; int setup_size, kernel_size, initrd_size = 0, cmdline_size; uint32_t initrd_max; uint8_t header[8192], *setup, *kernel, *initrd_data; target_phys_addr_t real_addr, prot_addr, cmdline_addr, initrd_addr = 0; FILE *f; char *vmode; /* Align to 16 bytes as a paranoia measure */ cmdline_size = (strlen(kernel_cmdline)+16) & ~15; /* load the kernel header */ f = fopen(kernel_filename, "rb"); if (!f || !(kernel_size = get_file_size(f)) || fread(header, 1, MIN(ARRAY_SIZE(header), kernel_size), f) != MIN(ARRAY_SIZE(header), kernel_size)) { fprintf(stderr, "qemu: could not load kernel '%s': %s\n", kernel_filename, strerror(errno)); exit(1); } /* kernel protocol version */ #if 0 fprintf(stderr, "header magic: %#x\n", ldl_p(header+0x202)); #endif if (ldl_p(header+0x202) == 0x53726448) protocol = lduw_p(header+0x206); else { /* This looks like a multiboot kernel. If it is, let's stop treating it like a Linux kernel. */ if (load_multiboot(fw_cfg, f, kernel_filename, initrd_filename, kernel_cmdline, kernel_size, header)) return; protocol = 0; } if (protocol < 0x200 || !(header[0x211] & 0x01)) { /* Low kernel */ real_addr = 0x90000; cmdline_addr = 0x9a000 - cmdline_size; prot_addr = 0x10000; } else if (protocol < 0x202) { /* High but ancient kernel */ real_addr = 0x90000; cmdline_addr = 0x9a000 - cmdline_size; prot_addr = 0x100000; } else { /* High and recent kernel */ real_addr = 0x10000; cmdline_addr = 0x20000; prot_addr = 0x100000; } #if 0 fprintf(stderr, "qemu: real_addr = 0x" TARGET_FMT_plx "\n" "qemu: cmdline_addr = 0x" TARGET_FMT_plx "\n" "qemu: prot_addr = 0x" TARGET_FMT_plx "\n", real_addr, cmdline_addr, prot_addr); #endif /* highest address for loading the initrd */ if (protocol >= 0x203) initrd_max = ldl_p(header+0x22c); else initrd_max = 0x37ffffff; if (initrd_max >= max_ram_size-ACPI_DATA_SIZE) initrd_max = max_ram_size-ACPI_DATA_SIZE-1; fw_cfg_add_i32(fw_cfg, FW_CFG_CMDLINE_ADDR, cmdline_addr); fw_cfg_add_i32(fw_cfg, FW_CFG_CMDLINE_SIZE, strlen(kernel_cmdline)+1); fw_cfg_add_bytes(fw_cfg, FW_CFG_CMDLINE_DATA, (uint8_t*)strdup(kernel_cmdline), strlen(kernel_cmdline)+1); if (protocol >= 0x202) { stl_p(header+0x228, cmdline_addr); } else { stw_p(header+0x20, 0xA33F); stw_p(header+0x22, cmdline_addr-real_addr); } /* handle vga= parameter */ vmode = strstr(kernel_cmdline, "vga="); if (vmode) { unsigned int video_mode; /* skip "vga=" */ vmode += 4; if (!strncmp(vmode, "normal", 6)) { video_mode = 0xffff; } else if (!strncmp(vmode, "ext", 3)) { video_mode = 0xfffe; } else if (!strncmp(vmode, "ask", 3)) { video_mode = 0xfffd; } else { video_mode = strtol(vmode, NULL, 0); } stw_p(header+0x1fa, video_mode); } /* loader type */ /* High nybble = B reserved for Qemu; low nybble is revision number. If this code is substantially changed, you may want to consider incrementing the revision. */ if (protocol >= 0x200) header[0x210] = 0xB0; /* heap */ if (protocol >= 0x201) { header[0x211] |= 0x80; /* CAN_USE_HEAP */ stw_p(header+0x224, cmdline_addr-real_addr-0x200); } /* load initrd */ if (initrd_filename) { if (protocol < 0x200) { fprintf(stderr, "qemu: linux kernel too old to load a ram disk\n"); exit(1); } initrd_size = get_image_size(initrd_filename); if (initrd_size < 0) { fprintf(stderr, "qemu: error reading initrd %s\n", initrd_filename); exit(1); } initrd_addr = (initrd_max-initrd_size) & ~4095; initrd_data = qemu_malloc(initrd_size); load_image(initrd_filename, initrd_data); fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_ADDR, initrd_addr); fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_SIZE, initrd_size); fw_cfg_add_bytes(fw_cfg, FW_CFG_INITRD_DATA, initrd_data, initrd_size); stl_p(header+0x218, initrd_addr); stl_p(header+0x21c, initrd_size); } /* load kernel and setup */ setup_size = header[0x1f1]; if (setup_size == 0) setup_size = 4; setup_size = (setup_size+1)*512; kernel_size -= setup_size; setup = qemu_malloc(setup_size); kernel = qemu_malloc(kernel_size); fseek(f, 0, SEEK_SET); if (fread(setup, 1, setup_size, f) != setup_size) { fprintf(stderr, "fread() failed\n"); exit(1); } if (fread(kernel, 1, kernel_size, f) != kernel_size) { fprintf(stderr, "fread() failed\n"); exit(1); } fclose(f); memcpy(setup, header, MIN(sizeof(header), setup_size)); fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_ADDR, prot_addr); fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_SIZE, kernel_size); fw_cfg_add_bytes(fw_cfg, FW_CFG_KERNEL_DATA, kernel, kernel_size); fw_cfg_add_i32(fw_cfg, FW_CFG_SETUP_ADDR, real_addr); fw_cfg_add_i32(fw_cfg, FW_CFG_SETUP_SIZE, setup_size); fw_cfg_add_bytes(fw_cfg, FW_CFG_SETUP_DATA, setup, setup_size); option_rom[nb_option_roms] = "linuxboot.bin"; nb_option_roms++; }