int amdgpu_map_static_csa(struct amdgpu_device *adev, struct amdgpu_vm *vm) { int r; struct amdgpu_bo_va *bo_va; struct ww_acquire_ctx ticket; struct list_head list; struct amdgpu_bo_list_entry pd; struct ttm_validate_buffer csa_tv; INIT_LIST_HEAD(&list); INIT_LIST_HEAD(&csa_tv.head); csa_tv.bo = &adev->virt.csa_obj->tbo; csa_tv.shared = true; list_add(&csa_tv.head, &list); amdgpu_vm_get_pd_bo(vm, &list, &pd); r = ttm_eu_reserve_buffers(&ticket, &list, true, NULL); if (r) { DRM_ERROR("failed to reserve CSA,PD BOs: err=%d\n", r); return r; } bo_va = amdgpu_vm_bo_add(adev, vm, adev->virt.csa_obj); if (!bo_va) { ttm_eu_backoff_reservation(&ticket, &list); DRM_ERROR("failed to create bo_va for static CSA\n"); return -ENOMEM; } r = amdgpu_vm_alloc_pts(adev, bo_va->vm, AMDGPU_CSA_VADDR, AMDGPU_CSA_SIZE); if (r) { DRM_ERROR("failed to allocate pts for static CSA, err=%d\n", r); amdgpu_vm_bo_rmv(adev, bo_va); ttm_eu_backoff_reservation(&ticket, &list); return r; } r = amdgpu_vm_bo_map(adev, bo_va, AMDGPU_CSA_VADDR, 0,AMDGPU_CSA_SIZE, AMDGPU_PTE_READABLE | AMDGPU_PTE_WRITEABLE | AMDGPU_PTE_EXECUTABLE); if (r) { DRM_ERROR("failed to do bo_map on static CSA, err=%d\n", r); amdgpu_vm_bo_rmv(adev, bo_va); ttm_eu_backoff_reservation(&ticket, &list); return r; } vm->csa_bo_va = bo_va; ttm_eu_backoff_reservation(&ticket, &list); return 0; }
static int virtio_gpu_object_list_validate(struct ww_acquire_ctx *ticket, struct list_head *head) { struct ttm_validate_buffer *buf; struct ttm_buffer_object *bo; struct virtio_gpu_object *qobj; int ret; ret = ttm_eu_reserve_buffers(ticket, head, true, NULL); if (ret != 0) return ret; list_for_each_entry(buf, head, head) { bo = buf->bo; qobj = container_of(bo, struct virtio_gpu_object, tbo); ret = ttm_bo_validate(bo, &qobj->placement, false, false); if (ret) { ttm_eu_backoff_reservation(ticket, head); return ret; } }