static int usb_phy_init_internal(void __iomem *base) { int loops; pr_info("Init usb phy!!!\n"); /* Initialize the USB PHY power */ if (cpu_is_pxa910()) { u2o_set(base, UTMI_CTRL, (1<<UTMI_CTRL_INPKT_DELAY_SOF_SHIFT) | (1<<UTMI_CTRL_PU_REF_SHIFT)); } u2o_set(base, UTMI_CTRL, 1<<UTMI_CTRL_PLL_PWR_UP_SHIFT); u2o_set(base, UTMI_CTRL, 1<<UTMI_CTRL_PWR_UP_SHIFT); /* UTMI_PLL settings */ u2o_clear(base, UTMI_PLL, UTMI_PLL_PLLVDD18_MASK | UTMI_PLL_PLLVDD12_MASK | UTMI_PLL_PLLCALI12_MASK | UTMI_PLL_FBDIV_MASK | UTMI_PLL_REFDIV_MASK | UTMI_PLL_ICP_MASK | UTMI_PLL_KVCO_MASK); u2o_set(base, UTMI_PLL, 0xee<<UTMI_PLL_FBDIV_SHIFT | 0xb<<UTMI_PLL_REFDIV_SHIFT | 3<<UTMI_PLL_PLLVDD18_SHIFT | 3<<UTMI_PLL_PLLVDD12_SHIFT | 3<<UTMI_PLL_PLLCALI12_SHIFT | 1<<UTMI_PLL_ICP_SHIFT | 3<<UTMI_PLL_KVCO_SHIFT); /* UTMI_TX */ u2o_clear(base, UTMI_TX, UTMI_TX_REG_EXT_FS_RCAL_EN_MASK | UTMI_TX_TXVDD12_MASK | UTMI_TX_CK60_PHSEL_MASK | UTMI_TX_IMPCAL_VTH_MASK | UTMI_TX_REG_EXT_FS_RCAL_MASK | UTMI_TX_AMP_MASK); u2o_set(base, UTMI_TX, 3<<UTMI_TX_TXVDD12_SHIFT | 4<<UTMI_TX_CK60_PHSEL_SHIFT | 4<<UTMI_TX_IMPCAL_VTH_SHIFT | 8<<UTMI_TX_REG_EXT_FS_RCAL_SHIFT | 3<<UTMI_TX_AMP_SHIFT); /* UTMI_RX */ u2o_clear(base, UTMI_RX, UTMI_RX_SQ_THRESH_MASK | UTMI_REG_SQ_LENGTH_MASK); u2o_set(base, UTMI_RX, 7<<UTMI_RX_SQ_THRESH_SHIFT | 2<<UTMI_REG_SQ_LENGTH_SHIFT); /* UTMI_IVREF */ if (cpu_is_pxa168()) /* fixing Microsoft Altair board interface with NEC hub issue - * Set UTMI_IVREF from 0x4a3 to 0x4bf */ u2o_write(base, UTMI_IVREF, 0x4bf); /* toggle VCOCAL_START bit of UTMI_PLL */ udelay(200); u2o_set(base, UTMI_PLL, VCOCAL_START); udelay(40); u2o_clear(base, UTMI_PLL, VCOCAL_START); /* toggle REG_RCAL_START bit of UTMI_TX */ udelay(400); u2o_set(base, UTMI_TX, REG_RCAL_START); udelay(40); u2o_clear(base, UTMI_TX, REG_RCAL_START); udelay(400); /* Make sure PHY PLL is ready */ loops = 0; while ((u2o_get(base, UTMI_PLL) & PLL_READY) == 0) { mdelay(1); loops++; if (loops > 100) { printk(KERN_WARNING "calibrate timeout, UTMI_PLL %x\n", u2o_get(base, UTMI_PLL)); break; } } if (cpu_is_pxa168()) { u2o_set(base, UTMI_RESERVE, 1 << 5); /* Turn on UTMI PHY OTG extension */ u2o_write(base, UTMI_OTG_ADDON, 1); } return 0; }
/******************************************************************** * USB 2.0 OTG controller */ int pxa168_usb_phy_init(unsigned base) { static int init_done; int count; if (init_done) { printk(KERN_DEBUG "re-init phy\n\n"); /* return; */ } /* enable the pull up */ if (cpu_is_pxa910_z0()) { if (cpu_is_pxa910()) { u32 U2H_UTMI_CTRL = (u32)ioremap_nocache(0xc0000004, 4); writel(1<<20, U2H_UTMI_CTRL); } } /* Initialize the USB PHY power */ if (cpu_is_pxa910()) { u2o_set(base, UTMI_CTRL, (1<<UTMI_CTRL_INPKT_DELAY_SOF_SHIFT) | (1<<UTMI_CTRL_PU_REF_SHIFT)); } u2o_set(base, UTMI_CTRL, 1<<UTMI_CTRL_PLL_PWR_UP_SHIFT); u2o_set(base, UTMI_CTRL, 1<<UTMI_CTRL_PWR_UP_SHIFT); /* UTMI_PLL settings */ u2o_clear(base, UTMI_PLL, UTMI_PLL_PLLVDD18_MASK | UTMI_PLL_PLLVDD12_MASK | UTMI_PLL_PLLCALI12_MASK | UTMI_PLL_FBDIV_MASK | UTMI_PLL_REFDIV_MASK | UTMI_PLL_ICP_MASK | UTMI_PLL_KVCO_MASK); u2o_set(base, UTMI_PLL, 0xee<<UTMI_PLL_FBDIV_SHIFT | 0xb<<UTMI_PLL_REFDIV_SHIFT | 3<<UTMI_PLL_PLLVDD18_SHIFT | 3<<UTMI_PLL_PLLVDD12_SHIFT | 3<<UTMI_PLL_PLLCALI12_SHIFT | 2<<UTMI_PLL_ICP_SHIFT | 3<<UTMI_PLL_KVCO_SHIFT); /* UTMI_TX */ u2o_clear(base, UTMI_TX, UTMI_TX_TXVDD12_MASK | UTMI_TX_CK60_PHSEL_MASK | UTMI_TX_IMPCAL_VTH_MASK); u2o_set(base, UTMI_TX, 3<<UTMI_TX_TXVDD12_SHIFT | 4<<UTMI_TX_CK60_PHSEL_SHIFT | 5<<UTMI_TX_IMPCAL_VTH_SHIFT); /* UTMI_RX */ u2o_clear(base, UTMI_RX, UTMI_RX_SQ_THRESH_MASK | UTMI_REG_SQ_LENGTH_MASK); if (cpu_is_pxa168()) u2o_set(base, UTMI_RX, 7<<UTMI_RX_SQ_THRESH_SHIFT | 2<<UTMI_REG_SQ_LENGTH_SHIFT); else u2o_set(base, UTMI_RX, 0xa<<UTMI_RX_SQ_THRESH_SHIFT | 2<<UTMI_REG_SQ_LENGTH_SHIFT); /* UTMI_IVREF */ if (cpu_is_pxa168()) /* fixing Microsoft Altair board interface with NEC hub issue - * Set UTMI_IVREF from 0x4a3 to 0x4bf */ u2o_write(base, UTMI_IVREF, 0x4bf); /* calibrate */ count = 10000; while(((u2o_get(base, UTMI_PLL) & PLL_READY)==0) && count--); if (count <= 0) printk("%s %d: calibrate timeout, UTMI_PLL %x\n", __func__, __LINE__, u2o_get(base, UTMI_PLL)); /* toggle VCOCAL_START bit of UTMI_PLL */ udelay(200); u2o_set(base, UTMI_PLL, VCOCAL_START); udelay(40); u2o_clear(base, UTMI_PLL, VCOCAL_START); /* toggle REG_RCAL_START bit of UTMI_TX */ udelay(200); u2o_set(base, UTMI_TX, REG_RCAL_START); udelay(40); u2o_clear(base, UTMI_TX, REG_RCAL_START); udelay(200); /* make sure phy is ready */ count = 1000; while(((u2o_get(base, UTMI_PLL) & PLL_READY)==0) && count--); if (count <= 0) printk("%s %d: calibrate timeout, UTMI_PLL %x\n", __func__, __LINE__, u2o_get(base, UTMI_PLL)); if (cpu_is_pxa168()) { u2o_set(base, UTMI_RESERVE, 1<<5); u2o_write(base, UTMI_OTG_ADDON, 1); /* Turn on UTMI PHY OTG extension */ } init_done = 1; return 0; }