/**
* \brief Test the uart sleepwalking in active mode.
*/
static void uart_sleepwalking_test_active(void)
{
puts("Test in active mode, press 's' to continue.\r");
/* Wait for the puts operation to finish. */
delay_ms(50);
/* Enable UART IRQ */
uart_enable_interrupt(CONSOLE_UART, UART_IER_CMP);
/* Enable UART interrupt */
NVIC_EnableIRQ(CONSOLE_UART_IRQn);
/* Set the match condition */
uart_set_sleepwalking(CONSOLE_UART, 's', true, true, 's');
/* Enable the sleepwalking in PMC */
pmc_enable_sleepwalking(CONSOLE_UART_ID);
/* Wait for the match interrupt */
while (!cmp_flag) {
}
puts("'s' character is received.\r\n\r");
}
/**
* \brief Application entry point for pdc_uart example.
*
* \return Unused (ANSI-C compatibility).
*/
int main(void)
{
/* Initialize the SAM system */
sysclk_init();
board_init();
/* Initialize the UART console */
configure_console();
/* Output example information */
puts(STRING_HEADER);
/* Get pointer to UART PDC register base */
g_p_uart_pdc = uart_get_pdc_base(CONSOLE_UART);
/* Initialize PDC data packet for transfer */
g_pdc_uart_packet.ul_addr = (uint32_t) g_uc_pdc_buffer;
g_pdc_uart_packet.ul_size = BUFFER_SIZE;
/* Configure PDC for data receive */
pdc_rx_init(g_p_uart_pdc, &g_pdc_uart_packet, NULL);
/* Enable PDC transfers */
pdc_enable_transfer(g_p_uart_pdc, PERIPH_PTCR_RXTEN | PERIPH_PTCR_TXTEN);
/* Enable UART IRQ */
uart_enable_interrupt(CONSOLE_UART, UART_IER_RXBUFF);
/* Enable UART interrupt */
NVIC_EnableIRQ(CONSOLE_UART_IRQn);
while (1) {
}
}
void uart_init(void)
{
long long setting = (16 * (1 << UART_NCO_WIDTH) *
(long long)CONFIG_UART_BAUD_RATE / PCLK_FREQ);
/* turn on uart clock */
clock_enable_module(MODULE_UART, 1);
/* set up pinmux */
gpio_config_module(MODULE_UART, 1);
/* set frequency */
GR_UART_NCO(0) = setting;
/* Interrupt when RX fifo has anything, when TX fifo <= half empty */
/* Also reset (clear) both FIFOs */
GR_UART_FIFO(0) = 0x63;
/* TX enable, RX enable, HW flow control disabled, no loopback */
GR_UART_CTRL(0) = 0x03;
/* enable RX interrupts in block */
/* Note: doesn't do anything unless turned on in NVIC */
GR_UART_ICTRL(0) = 0x02;
/* Enable interrupts for UART0 only */
uart_enable_interrupt();
done_uart_init_yet = 1;
}
void config_uart(void){
/* configura pinos */
gpio_configure_group(PINS_UART0_PIO, PINS_UART0, PINS_UART0_FLAGS);
/* ativa clock */
sysclk_enable_peripheral_clock(CONSOLE_UART_ID);
/* Configuração UART */
const usart_serial_options_t uart_serial_options = {
.baudrate = CONF_UART_BAUDRATE,
.paritytype = UART_MR_PAR_NO,
.stopbits = 0
};
stdio_serial_init((Usart *)CONF_UART, &uart_serial_options);
uint32_t uart_interrupt_options = IMPLEMENTAR;
uart_enable_interrupt(UART0, &uart_serial_options);
}
/************************************************************************/
/* Display Menu */
/************************************************************************/
static void display_menu(void)
{
puts(" 1 : exibe novamente esse menu \n\r"
" 2 : Ativa o LED \n\r"
" 3 : Desliga o LED \n\r "
" 4 : Pisca o LED \n\r "
" 5 : Definir frequência do LED \n\r ");
}
void UART_Handler(void)
{
tUartControl *pControl;
uint32_t ul_status;
uint8_t c;
pControl = uart_control[0];
/* Read UART Status. */
ul_status = uart_get_status(UART);
if (ul_status & UART_SR_RXRDY)
{
uart_read(UART, &c);
/* Check if buffer has more space
* If no space, data will be discarded
*/
if (str_buf_is_full (&pControl->rx_buffer))
{
pControl->rx_buffer.header.err_overflow = 1;
}
else
{
str_buf_putc (&pControl->rx_buffer, c);
}
}
if (ul_status & UART_SR_TXRDY)
{
uart_disable_interrupt (UART, UART_IER_TXRDY);
while (!str_buf_is_empty (&pControl->tx_buffer))
{
c = str_buf_getc (&pControl->tx_buffer);
uart_write (pControl->uart_def_p, c);
if ( !uart_is_tx_ready (pControl->uart_def_p) )
break;
}
/* If there is no more data to send, disable the transmit
interrupt - else enable it or keep it enabled */
if (str_buf_is_empty (&pControl->tx_buffer))
{
uart_disable_interrupt (UART, UART_IER_TXRDY);
pControl->TxIntEnabled = false;
}
else
{
// Set Tx Interrupt state
pControl->TxIntEnabled = true;
uart_enable_interrupt (UART, UART_IER_TXRDY);
}
} //
}
void uartInit() {
pio_configure(PINS_UART0_PIO, PINS_UART0_TYPE, PINS_UART0_MASK, PINS_UART0_ATTR);
pmc_enable_periph_clk(ID_UART0);
const sam_uart_opt_t uart1_settings =
{ 120000000, UART_SERIAL_BAUDRATE, UART_SERIAL_MODE };
uart_init(UART0,&uart1_settings);
uart_enable_interrupt(UART0,UART_IER_RXRDY);
uart_enable_rx(UART0);
}
/**
* \ingroup freertos_uart_peripheral_control_group
* \brief Initiate a completely asynchronous multi-byte write operation on a
* UART peripheral.
*
* freertos_uart_write_packet_async() is an ASF specific FreeRTOS driver
* function. It configures the UART peripheral DMA controller (PDC) to
* transmit data on the UART port, then returns.
* freertos_uart_write_packet_async() does not wait for the transmission to
* complete before returning.
*
* The FreeRTOS UART driver is initialized using a call to
* freertos_uart_serial_init(). The freertos_driver_parameters.options_flags
* parameter passed into the initialization function defines the driver behavior.
* freertos_uart_write_packet_async() can only be used if the
* freertos_driver_parameters.options_flags parameter passed to the initialization
* function had the WAIT_TX_COMPLETE bit clear.
*
* freertos_uart_write_packet_async() is an advanced function and readers are
* recommended to also reference the application note and examples that
* accompany the FreeRTOS ASF drivers. freertos_uart_write_packet() is a
* version that does not exit until the PDC transfer is complete, but still
* allows other RTOS tasks to execute while the transmission is in progress.
*
* The FreeRTOS ASF driver both installs and handles the UART PDC interrupts.
* Users do not need to concern themselves with interrupt handling, and must
* not install their own interrupt handler.
*
* \param p_uart The handle to the UART peripheral returned by the
* freertos_uart_serial_init() call used to initialise the peripheral.
* \param data A pointer to the data to be transmitted.
* \param len The number of bytes to transmit.
* \param block_time_ticks The FreeRTOS ASF UART driver is initialized using
* a call to freertos_uart_serial_init(). The
* freertos_driver_parameters.options_flags parameter passed to the
* initialization function defines the driver behavior. If
* freertos_driver_parameters.options_flags had the USE_TX_ACCESS_MUTEX bit
* set, then the driver will only write to the UART peripheral if it has
* first gained exclusive access to it. block_time_ticks specifies the
* maximum amount of time the driver will wait to get exclusive access
* before aborting the write operation. Other tasks will execute during any
* waiting time. block_time_ticks is specified in RTOS tick periods. To
* specify a block time in milliseconds, divide the milliseconds value by
* portTICK_RATE_MS, and pass the result in block_time_ticks.
* portTICK_RATE_MS is defined by FreeRTOS.
* \param notification_semaphore The RTOS task that calls the transmit
* function exits the transmit function as soon as the transmission starts.
* The data being transmitted by the PDC must not be modified until after
* the transmission has completed. The PDC interrupt (handled internally by
* the FreeRTOS ASF driver) 'gives' the semaphore when the PDC transfer
* completes. The notification_semaphore therefore provides a mechanism for
* the calling task to know when the PDC has finished accessing the data.
* The calling task can call standard FreeRTOS functions to block on the
* semaphore until the PDC interrupt occurs. Other RTOS tasks will execute
* while the the calling task is in the Blocked state. The semaphore must
* be created using the FreeRTOS vSemaphoreCreateBinary() API function
* before it is used as a parameter.
*
* \return ERR_INVALID_ARG is returned if an input parameter is invalid.
* ERR_TIMEOUT is returned if block_time_ticks passed before exclusive
* access to the UART peripheral could be obtained. STATUS_OK is returned
* if the PDC was successfully configured to perform the UART write
* operation.
*/
status_code_t freertos_uart_write_packet_async(freertos_uart_if p_uart,
const uint8_t *data, size_t len, portTickType block_time_ticks,
xSemaphoreHandle notification_semaphore)
{
status_code_t return_value;
portBASE_TYPE uart_index;
Uart *uart_base;
uart_base = (Uart *) p_uart;
uart_index = get_pdc_peripheral_details(all_uart_definitions,
MAX_UARTS,
(void *) uart_base);
/* Don't do anything unless a valid UART pointer was used. */
if (uart_index < MAX_UARTS) {
return_value = freertos_obtain_peripheral_access_mutex(
&(tx_dma_control[uart_index]),
&block_time_ticks);
if (return_value == STATUS_OK) {
freertos_start_pdc_tx(&(tx_dma_control[uart_index]),
data, len,
all_uart_definitions[uart_index].pdc_base_address,
notification_semaphore);
/* Catch the end of transmission so the access mutex can be
returned, and the task notified (if it supplied a notification
semaphore). The interrupt can be enabled here because the ENDTX
signal from the PDC to the UART will have been de-asserted when
the next transfer was configured. */
uart_enable_interrupt(uart_base, UART_IER_ENDTX);
return_value = freertos_optionally_wait_transfer_completion(
&(tx_dma_control[uart_index]),
notification_semaphore,
block_time_ticks);
}
} else {
return_value = ERR_INVALID_ARG;
}
return return_value;
}
/**
* \brief Configure the console UART.
*/
void configure_console(void){
const usart_serial_options_t uart_serial_options = {
.baudrate = CONF_UART_BAUDRATE,
.charlength = CHAR_LENGHT,
.stopbits = STOPBITS,
.paritytype = PARITY,
};
/* Configure console UART. */
sysclk_enable_peripheral_clock(CONSOLE_UART_ID);
stdio_serial_init(UART0, &uart_serial_options);
NVIC_DisableIRQ(UART0_IRQn);
NVIC_ClearPendingIRQ(UART0_IRQn);
NVIC_SetPriority(UART0_IRQn, PRIORITY_COMM);
NVIC_EnableIRQ(UART0_IRQn);
uart_enable_interrupt(UART0, UART_IER_RXRDY);
}
void hal_uart_send(int uart_num, char byte)
{
tUartControl *pControl;
pControl = _get_uart_control (uart_num);
if (pControl == NULL)
return;
#ifdef USE_INTERRUPT
// put byte into buffer
str_buf_putc (&pControl->tx_buffer, byte);
// re-enable Tx Interrupt
uart_enable_interrupt (UART, UART_IER_TXRDY);
#else
//todo:
while ( (pUart->LSR & UART_LSR_THRE) == 0) ;
UART_SendByte(pUart, byte);
#endif
}
static void _uart_init (void)
{
tUartControl *pControl;
sam_uart_opt_t config;
int result;
pControl = uart_control[0];
//
pmc_enable_periph_clk (ID_UART);
//
pio_configure (PIOA, PIO_PERIPH_A | PIO_PULLUP, PIO_PA8A_URXD, PIO_DEFAULT);
pio_configure (PIOA, PIO_PERIPH_A, PIO_PA9A_UTXD, PIO_DEFAULT);
//
config.ul_mck = sysclk_get_cpu_hz();
//config.ul_baudrate = BAUD;
config.ul_baudrate = 115200;
config.ul_mode = UART_MR_PAR_NO;
config.ul_chmode = 0;
str_buf_init_std (&pControl->rx_buffer);
str_buf_init_std (&pControl->tx_buffer);
result = uart_init (UART, &config);
uart_reset_tx(UART);
uart_reset_rx(UART);
UART->UART_CR = UART_CR_RSTSTA;
uart_enable_rx(UART);
uart_enable_tx(UART);
uart_enable_interrupt (UART, US_IER_RXRDY);
NVIC_EnableIRQ(UART_IRQn);
}
void sam_debug_init(void)
{
cbuf_initialize(&debug_rx_buf, 16);
NVIC_EnableIRQ(UART_IRQn);
uart_enable_interrupt(UART, UART_IER_RXRDY);
}
/*
* For internal use only.
* Configures the Rx DMA to receive data into free space within the Rx buffer.
*/
static void configure_rx_dma(uint32_t uart_index,
enum buffer_operations operation_performed)
{
freertos_pdc_rx_control_t *rx_buffer_definition;
rx_buffer_definition = &(rx_buffer_definitions[uart_index]);
/* How much space is there between the start of the DMA buffer and the
current read pointer? */
if (((uint32_t)rx_buffer_definition->next_byte_to_read) ==
rx_buffer_definition->rx_pdc_parameters.ul_addr) {
/* The read pointer and the write pointer are equal. If this function
was called because data was added to the buffer, then there is no free
space in the buffer remaining. If this function was called because data
was removed from the buffer, then the space remaining is from the write
pointer up to the end of the buffer. */
if (operation_performed == data_added) {
rx_buffer_definition->rx_pdc_parameters.ul_size = 0UL;
} else {
rx_buffer_definition->rx_pdc_parameters.ul_size =
rx_buffer_definition->past_rx_buffer_end_address - rx_buffer_definition->rx_pdc_parameters.ul_addr;
}
} else if (((uint32_t)rx_buffer_definition->next_byte_to_read) >
rx_buffer_definition->rx_pdc_parameters.ul_addr) {
/* The read pointer is ahead of the write pointer. The space available
is up to the write pointer to ensure unread data is not overwritten. */
rx_buffer_definition->rx_pdc_parameters.ul_size =
((uint32_t) rx_buffer_definition->next_byte_to_read) - rx_buffer_definition->rx_pdc_parameters.ul_addr;
} else {
/* The write pointer is ahead of the read pointer so the space
available is up to the end of the buffer. */
rx_buffer_definition->rx_pdc_parameters.ul_size =
rx_buffer_definition->past_rx_buffer_end_address - rx_buffer_definition->rx_pdc_parameters.ul_addr;
}
configASSERT((rx_buffer_definition->rx_pdc_parameters.ul_addr+
rx_buffer_definition->rx_pdc_parameters.ul_size) <=
rx_buffer_definition->past_rx_buffer_end_address);
if (rx_buffer_definition->rx_pdc_parameters.ul_size > 0) {
/* Restart the DMA to receive into whichever space was calculated
as remaining. First clear any characters that might already be in the
registers. */
pdc_rx_init(
all_uart_definitions[uart_index].pdc_base_address, &rx_buffer_definition->rx_pdc_parameters,
NULL);
pdc_enable_transfer(
all_uart_definitions[uart_index].pdc_base_address,
PERIPH_PTCR_RXTEN);
uart_enable_interrupt(
all_uart_definitions[uart_index].peripheral_base_address,
UART_IER_ENDRX | UART_IER_RXRDY);
} else {
/* The write pointer has reached the read pointer. There is no
more room so the DMA is not re-enabled until a read has created
space. */
uart_disable_interrupt(
all_uart_definitions[uart_index].peripheral_base_address,
UART_IDR_ENDRX | UART_IDR_RXRDY);
}
}
/**
* \ingroup freertos_uart_peripheral_control_group
* \brief Initializes the FreeRTOS ASF UART driver for the specified UART
* port.
*
* freertos_uart_serial_init() is an ASF specific FreeRTOS driver function. It
* must be called before any other ASF specific FreeRTOS driver functions
* attempt to access the same UART port.
*
* If freertos_driver_parameters->operation_mode equals UART_RS232 then
* freertos_uart_serial_init() will configure the UART port for standard RS232
* operation. If freertos_driver_parameters->operation_mode equals any other
* value then freertos_uart_serial_init() will not take any action.
*
* Other ASF UART functions can be called after freertos_uart_serial_init()
* has completed successfully.
*
* The FreeRTOS ASF driver both installs and handles the UART PDC interrupts.
* Users do not need to concern themselves with interrupt handling, and must
* not install their own interrupt handler.
*
* This driver is provided with an application note, and an example project that
* demonstrates the use of this function.
*
* \param p_uart The UART peripheral being initialized.
* \param uart_parameters Structure that defines the UART bus and transfer
* parameters, such the baud rate and the number of data bits.
* sam_uart_opt_t is a standard ASF type (it is not FreeRTOS specific).
* \param freertos_driver_parameters Defines the driver behavior. See the
* freertos_peripheral_options_t documentation, and the application note that
* accompanies the ASF specific FreeRTOS functions.
*
* \return If the initialization completes successfully then a handle that can
* be used with FreeRTOS UART read and write functions is returned. If
* the initialisation fails then NULL is returned.
*/
freertos_uart_if freertos_uart_serial_init(Uart *p_uart,
const sam_uart_opt_t *const uart_parameters,
const freertos_peripheral_options_t *const freertos_driver_parameters)
{
portBASE_TYPE uart_index;
bool is_valid_operating_mode;
freertos_uart_if return_value;
const enum peripheral_operation_mode valid_operating_modes[] = {UART_RS232};
/* Find the index into the all_uart_definitions array that holds details of
the p_uart peripheral. */
uart_index = get_pdc_peripheral_details(all_uart_definitions,
MAX_UARTS,
(void *) p_uart);
/* Check the requested operating mode is valid for the peripheral. */
is_valid_operating_mode = check_requested_operating_mode(
freertos_driver_parameters->operation_mode,
valid_operating_modes,
sizeof(valid_operating_modes) /
sizeof(enum peripheral_operation_mode));
/* Don't do anything unless a valid p_uart pointer was used, and a valid
operating mode was requested. */
if ((uart_index < MAX_UARTS) && (is_valid_operating_mode == true)) {
/* This function must be called exactly once per supported UART. Check it
has not been called before. */
configASSERT(rx_buffer_definitions[uart_index].next_byte_to_read == NULL);
/* Disable everything before enabling the clock. */
uart_disable_tx(p_uart);
uart_disable_rx(p_uart);
pdc_disable_transfer(all_uart_definitions[uart_index].pdc_base_address,
(PERIPH_PTCR_RXTDIS | PERIPH_PTCR_TXTDIS));
/* Enable the peripheral clock in the PMC. */
pmc_enable_periph_clk(
all_uart_definitions[uart_index].peripheral_id);
switch (freertos_driver_parameters->operation_mode) {
case UART_RS232:
/* Call the standard ASF init function. */
uart_init(p_uart, uart_parameters);
break;
default:
/* Other modes are not currently supported. */
break;
}
/* Disable all the interrupts. */
uart_disable_interrupt(p_uart, MASK_ALL_INTERRUPTS);
/* Create any required peripheral access mutexes and transaction complete
semaphores. This peripheral is full duplex so only the Tx semaphores
are created in the following function. The the Rx semaphores are
created separately. */
create_peripheral_control_semaphores(
freertos_driver_parameters->options_flags,
&(tx_dma_control[uart_index]),
NULL /* The rx structures are not created in this function. */);
/* Is the driver also going to receive? */
if (freertos_driver_parameters->receive_buffer != NULL) {
/* rx_event_semaphore is used to signal the arival of new data. It
must be a counting semaphore for the following reason: If the Rx
DMA places data at the end of its circular buffer it will give the
semaphore to indicate the presence of unread data. If it then
receives more data, it will write this to the start of the circular
buffer, then give the semaphore again. Now, if a task reads data
out of the same circular buffer, and requests less data than is
available, but more than is available between the next read pointer
and the end of the buffer, the actual amount returned will be
capped to that available up to the end of the buffer only. If this
semaphore was a binary semaphore, it would then be 'taken' even
though, unknown to the reading task, unread and therefore available
data remained at the beginning of the buffer. */
rx_buffer_definitions[uart_index].rx_event_semaphore =
xSemaphoreCreateCounting(portMAX_DELAY, 0);
configASSERT(rx_buffer_definitions[uart_index].rx_event_semaphore);
/* The receive buffer is currently empty, so the DMA has control
over the entire buffer. */
rx_buffer_definitions[uart_index].rx_pdc_parameters.ul_addr =
(uint32_t)freertos_driver_parameters->receive_buffer;
rx_buffer_definitions[uart_index].rx_pdc_parameters.ul_size =
freertos_driver_parameters->receive_buffer_size;
pdc_rx_init(
all_uart_definitions[uart_index].pdc_base_address,
&(rx_buffer_definitions[uart_index].rx_pdc_parameters),
NULL);
/* Set the next byte to read to the start of the buffer as no data
has yet been read. */
rx_buffer_definitions[uart_index].next_byte_to_read =
freertos_driver_parameters->receive_buffer;
/* Remember the limits of entire buffer. */
rx_buffer_definitions[uart_index].rx_buffer_start_address =
rx_buffer_definitions[uart_index].rx_pdc_parameters.ul_addr;
rx_buffer_definitions[uart_index].past_rx_buffer_end_address =
rx_buffer_definitions[uart_index].rx_buffer_start_address +
freertos_driver_parameters->receive_buffer_size;
/* If the rx driver is to be thread aware, create an access control
mutex. */
if ((freertos_driver_parameters->options_flags &
USE_RX_ACCESS_MUTEX) != 0) {
rx_buffer_definitions[uart_index].rx_access_mutex =
xSemaphoreCreateMutex();
configASSERT(rx_buffer_definitions[uart_index].rx_access_mutex);
}
/* Catch the DMA running out of Rx space, and gaps in the
reception. These events are both used to signal that there is
data available in the Rx buffer. */
uart_enable_interrupt(p_uart, UART_IER_ENDRX | UART_IER_RXRDY);
/* The Rx DMA is running all the time, so enable it now. */
pdc_enable_transfer(
all_uart_definitions[uart_index].pdc_base_address,
PERIPH_PTCR_RXTEN);
} else {
/* next_byte_to_read is used to check to see if this function
has been called before, so it must be set to something, even if
it is not going to be used. The value it is set to is not
important, provided it is not zero (NULL). */
rx_buffer_definitions[uart_index].next_byte_to_read = RX_NOT_USED;
}
/* Configure and enable the UART interrupt in the interrupt controller. */
configure_interrupt_controller(all_uart_definitions[uart_index].peripheral_irq,
freertos_driver_parameters->interrupt_priority);
/* Error interrupts are always enabled. */
uart_enable_interrupt(
all_uart_definitions[uart_index].peripheral_base_address,
IER_ERROR_INTERRUPTS);
/* Finally, enable the receiver and transmitter. */
uart_enable_tx(p_uart);
uart_enable_rx(p_uart);
return_value = (freertos_uart_if) p_uart;
} else {
return_value = NULL;
}
return return_value;
}
/**
* \brief This function opens an UART
*
* \note Opening of the specified UART implies initializing local variables and
* opening required hardware with the following configuration:
* - bauds as specified
* - 8 bits, no parity, 1 stop bit
* - enable interrupts
*
* \param chn Communication channel [0, 1]
* \param bauds Communication speed in bauds
*
* \retval true on success.
* \retval false on failure.
*/
int8_t buart_if_open(uint8_t chn, uint32_t bauds)
{
#if defined(CONF_BOARD_UART0) || defined(CONF_BOARD_UART1)
sam_uart_opt_t uart_console_settings;
/* MCK for UART */
uart_console_settings.ul_mck = sysclk_get_cpu_hz();
/* Expected baud rate. */
uart_console_settings.ul_baudrate = bauds;
/* Initialize value for UART mode register */
uart_console_settings.ul_mode = UART_MR_PAR_NO;
#else
UNUSED(bauds);
#endif
/* check uart and it is close */
if (chn >= 2) {
return false;
}
if (buart_chn_open[chn]) {
return false;
}
switch (chn) {
#ifdef CONF_BOARD_UART0
case 0:
{
/* Configure PMC. */
pmc_enable_periph_clk(ID_UART0);
/* Configure UART. */
uart_init(UART0, &uart_console_settings);
/* Assign buffers to pointers */
buart_comm_data_0.puc_tq_buf = ptr_tx_uart_buf0;
buart_comm_data_0.puc_rq_buf = ptr_rx_uart_buf0;
buart_comm_data_0.us_rq_count = 0;
buart_comm_data_0.us_rq_idx = 0;
buart_comm_data_0.us_wq_idx = 0;
/* Get board UART0 PDC base address and enable receiver and
* transmitter. */
g_p_uart_pdc0 = uart_get_pdc_base(UART0);
pdc_enable_transfer(g_p_uart_pdc0,
PERIPH_PTCR_RXTEN | PERIPH_PTCR_TXTEN);
/* Start receiving data and start timer. */
g_st_uart_rx_packet0.ul_addr = (uint32_t)gs_puc_uart_buf0;
g_st_uart_rx_packet0.ul_size = UART_BUFFER_SIZE;
pdc_rx_init(g_p_uart_pdc0, &g_st_uart_rx_packet0, NULL);
/* Stop transmitting data */
g_st_uart_tx_packet0.ul_addr = (uint32_t)buart_comm_data_0.puc_tq_buf;
g_st_uart_tx_packet0.ul_size = 0;
pdc_tx_init(g_p_uart_pdc0, &g_st_uart_tx_packet0, NULL);
gs_ul_size_uart_buf0 = UART_BUFFER_SIZE;
/* Transfer to PDC communication mode, disable RXRDY interrupt
* and enable RXBUFF interrupt. */
uart_disable_interrupt(UART0, UART_IDR_RXRDY);
uart_enable_interrupt(UART0, UART_IER_RXBUFF);
/* Enable the receiver and transmitter. */
uart_enable_tx(UART0);
uart_enable_rx(UART0);
/* Configure and enable interrupt of USART. */
NVIC_SetPriority((IRQn_Type)UART0_IRQn, UART0_PRIO);
NVIC_EnableIRQ(UART0_IRQn);
buart_chn_open[chn] = true;
num_bytes_rx_uart0 = 0;
/* Configure TC uart */
_configure_TC_uart();
tc_start(TC_UART, TC_UART_CHN);
return true;
}
break;
#endif
#ifdef CONF_BOARD_UART1
case 1:
{
/* Configure PMC. */
pmc_enable_periph_clk(ID_UART1);
/* Configure UART. */
uart_init(UART1, &uart_console_settings);
/* Assign buffers to pointers */
buart_comm_data_1.puc_tq_buf = ptr_tx_uart_buf1;
buart_comm_data_1.puc_rq_buf = ptr_rx_uart_buf1;
buart_comm_data_1.us_rq_count = 0;
buart_comm_data_1.us_rq_idx = 0;
buart_comm_data_1.us_wq_idx = 0;
/* Get board UART1 PDC base address and enable receiver and
* transmitter. */
g_p_uart_pdc1 = uart_get_pdc_base(UART1);
pdc_enable_transfer(g_p_uart_pdc1,
PERIPH_PTCR_RXTEN | PERIPH_PTCR_TXTEN);
/* Start receiving data and start timer. */
g_st_uart_rx_packet1.ul_addr = (uint32_t)gs_puc_uart_buf1;
g_st_uart_rx_packet1.ul_size = UART_BUFFER_SIZE;
pdc_rx_init(g_p_uart_pdc1, &g_st_uart_rx_packet1, NULL);
/* Stop transmitting data */
g_st_uart_tx_packet1.ul_addr = (uint32_t)buart_comm_data_1.puc_tq_buf;
g_st_uart_tx_packet1.ul_size = 0;
pdc_tx_init(g_p_uart_pdc1, &g_st_uart_tx_packet1, NULL);
gs_ul_size_uart_buf1 = UART_BUFFER_SIZE;
/* Transfer to PDC communication mode, disable RXRDY interrupt
* and enable RXBUFF interrupt. */
uart_disable_interrupt(UART1, UART_IDR_RXRDY);
uart_enable_interrupt(UART1, UART_IER_RXBUFF);
/* Enable the receiver and transmitter. */
uart_enable_tx(UART1);
uart_enable_rx(UART1);
/* Configure and enable interrupt of USART. */
NVIC_SetPriority((IRQn_Type)UART1_IRQn, UART1_PRIO);
NVIC_EnableIRQ(UART1_IRQn);
buart_chn_open[chn] = true;
num_bytes_rx_uart1 = 0;
/* Configure TC uart */
_configure_TC_uart();
tc_start(TC_UART, TC_UART_CHN);
return true;
}
break;
#endif
default:
return false;
}
}
