/* =============================================================================
* translates to intel syntax
* =============================================================================
*/
extern void
ud_translate_intel(struct ud* u)
{
/* check if P_OSO prefix is used */
if (!P_OSO(u->itab_entry->prefix) && u->pfx_opr) {
switch (u->dis_mode) {
case 16: ud_asmprintf(u, "o32 "); break;
case 32:
case 64: ud_asmprintf(u, "o16 "); break;
}
}
/* check if P_ASO prefix was used */
if (!P_ASO(u->itab_entry->prefix) && u->pfx_adr) {
switch (u->dis_mode) {
case 16: ud_asmprintf(u, "a32 "); break;
case 32: ud_asmprintf(u, "a16 "); break;
case 64: ud_asmprintf(u, "a32 "); break;
}
}
if (u->pfx_seg &&
u->operand[0].type != UD_OP_MEM &&
u->operand[1].type != UD_OP_MEM ) {
ud_asmprintf(u, "%s ", ud_reg_tab[u->pfx_seg - UD_R_AL]);
}
if (u->pfx_lock) {
ud_asmprintf(u, "lock ");
}
if (u->pfx_rep) {
ud_asmprintf(u, "rep ");
} else if (u->pfx_repe) {
ud_asmprintf(u, "repe ");
} else if (u->pfx_repne) {
ud_asmprintf(u, "repne ");
}
/* print the instruction mnemonic */
ud_asmprintf(u, "%s", ud_lookup_mnemonic(u->mnemonic));
if (u->operand[0].type != UD_NONE) {
int cast = 0;
ud_asmprintf(u, " ");
if (u->operand[0].type == UD_OP_MEM) {
if (u->operand[1].type == UD_OP_IMM ||
u->operand[1].type == UD_OP_CONST ||
u->operand[1].type == UD_NONE ||
(u->operand[0].size != u->operand[1].size)) {
cast = 1;
} else if (u->operand[1].type == UD_OP_REG &&
u->operand[1].base == UD_R_CL) {
switch (u->mnemonic) {
case UD_Ircl:
case UD_Irol:
case UD_Iror:
case UD_Ircr:
case UD_Ishl:
case UD_Ishr:
case UD_Isar:
cast = 1;
break;
default: break;
}
}
}
gen_operand(u, &u->operand[0], cast);
}
if (u->operand[1].type != UD_NONE) {
int cast = 0;
ud_asmprintf(u, ", ");
if (u->operand[1].type == UD_OP_MEM &&
u->operand[0].size != u->operand[1].size &&
!ud_opr_is_sreg(&u->operand[0])) {
cast = 1;
}
gen_operand(u, &u->operand[1], cast);
}
if (u->operand[2].type != UD_NONE) {
int cast = 0;
ud_asmprintf(u, ", ");
if (u->operand[2].type == UD_OP_MEM &&
u->operand[2].size != u->operand[1].size) {
cast = 1;
}
gen_operand(u, &u->operand[2], cast);
}
if (u->operand[3].type != UD_NONE) {
ud_asmprintf(u, ", ");
gen_operand(u, &u->operand[3], 0);
}
}
/* =============================================================================
* 翻译为Intel语法
* =============================================================================
*/
extern void
ud_translate_intel(struct ud *u)
{
uint16_t st;
wchar_t stmp[128] = {0};
/* 检查如果 P_OSO 前缀被使用 */
if (!P_OSO(u->itab_entry->prefix) && u->pfx_opr) {
switch (u->dis_mode) {
case 16: wprintfcat(stmp,128,L"o32 "); break;
case 32:
case 64: wprintfcat(stmp,128,L"o16 "); break;
}
}
/* 检查如果 P_ASO 前缀被使用 */
if (!P_ASO(u->itab_entry->prefix) && u->pfx_adr) {
switch (u->dis_mode) {
case 16: wprintfcat(stmp,128,L"a32 "); break;
case 32: wprintfcat(stmp,128,L"a16 "); break;
case 64: wprintfcat(stmp,128,L"a32 "); break;
}
}
/* 检查段寄存器 */
if (u->pfx_seg && u->operand[0].type != UD_OP_MEM && u->operand[1].type != UD_OP_MEM)
wprintfcat(stmp,128,L"%s ", ud_reg_tab[u->pfx_seg - UD_R_AL]);
/* 检查 lock 前缀 */
if (u->pfx_lock)
wprintfcat(stmp,128,L"lock ");
if (u->pfx_rep)
wprintfcat(stmp,128,L"rep ");
else if (u->pfx_repe)
wprintfcat(stmp,128,L"repe ");
else if (u->pfx_repne)
wprintfcat(stmp,128,L"repne ");
/* 打印指令助记符 */
ud_casmprint(u,UDCA_Prefix,3,stmp);
switch (u->mnemonic)
{
case UD_Ipush: //栈操作指令
case UD_Ipop:
st = UDCA_StackOp;
break;
case UD_Ijmp: //跳转
st = UDCA_Jump;
break;
case UD_Icall: //调用
st = UDCA_Call;
break;
case UD_Iretn: //返回
case UD_Iretf:
st = UDCA_Ret;
break;
case UD_Iint:
case UD_Iint1:
case UD_Iint3:
st = UDCA_Int;
break;
default:
if (u->mnemonic >= UD_Ijo && u->mnemonic <= UD_Ijrcxz) //条件跳转
st = UDCA_CJump;
else if ( (u->mnemonic >= UD_Iemms && u->mnemonic <= UD_Ifyl2xp1) ||
(u->mnemonic >= UD_Ipacksswb && u->mnemonic <= UD_Ipextrw) ||
(u->mnemonic == UD_Ipor) ||
(u->mnemonic >= UD_Ipsadbw && u->mnemonic <= UD_Ipunpckldq) ||
(u->mnemonic == UD_Ipxor) ) //FPU MMX SSE 寄存器相关指令
st = UDCA_FMSOp;
else //普通指令
st = UDCA_Inst;
}
wprintfcat(stmp,128,L"%s", ud_lookup_mnemonic(u->mnemonic));
ud_casmprint(u,st,3,stmp);
if (u->operand[0].type != UD_NONE) {
int cast = 0;
wprintfcat(stmp,128,L" ");
ud_casmprint(u,UDCA_Inst,3,stmp);
if (u->operand[0].type == UD_OP_MEM)
{
if (u->operand[1].type == UD_OP_IMM ||
u->operand[1].type == UD_OP_CONST ||
u->operand[1].type == UD_NONE ||
(u->operand[0].size != u->operand[1].size &&
u->operand[1].type != UD_OP_REG))
{
cast = 1;
} else if (u->operand[1].type == UD_OP_REG &&
u->operand[1].base == UD_R_CL)
{
switch (u->mnemonic)
{
case UD_Ircl:
case UD_Irol:
case UD_Iror:
case UD_Ircr:
case UD_Ishl:
case UD_Ishr:
case UD_Isar:
cast = 1;
break;
default: break;
}
}
}
//默认生成操作数
gen_operand(u, &u->operand[0], cast,stmp,128);
}
if (u->operand[1].type != UD_NONE)
{
int cast = 0;
wprintfcat(stmp,128,L",");
ud_casmprint(u,UDCA_Inst,3,stmp);
if (u->operand[1].type == UD_OP_MEM &&
u->operand[0].size != u->operand[1].size && !ud_opr_is_sreg(&u->operand[0])) {
cast = 1;
}
gen_operand(u, &u->operand[1], cast,stmp,128);
}
if (u->operand[2].type != UD_NONE)
{
wprintfcat(stmp,128,L",");
ud_casmprint(u,UDCA_Inst,3,stmp);
gen_operand(u, &u->operand[2], 0,stmp,128);
}
ud_casmprint(u,UDCA_Inst,3,stmp);
}
