void set_cpu_frequency(void) { PLL_CLC_t_nonv pllclc; if (freq_init) { return; } freq_init = 1; /* check for direct drive mode */ if (PLL_CLC.bits.BYPPIN) { return; } /* check whether we are already running at desired clockrate */ pllclc = PLL_CLC; if ( ((SYS_CFG_NDIV - 1) == pllclc.bits.NDIV) && ((SYS_CFG_PDIV - 1) == pllclc.bits.PDIV) && ((SYS_CFG_KDIV - 1) == pllclc.bits.KDIV) && pllclc.bits.LOCK) { return; } /* prepare value for PLL_CLC */ /* set speed to selected value */ pllclc.reg = 0; pllclc.bits.VCOSEL = SYS_VCOSEL_VAL; pllclc.bits.NDIV = SYS_CFG_NDIV - 1; pllclc.bits.PDIV = SYS_CFG_PDIV - 1; pllclc.bits.KDIV = SYS_CFG_KDIV - 1; pllclc.bits.VCOBYP = 1; pllclc.bits.RESLD = 1; /* switch into VCO BYPASS mode */ unlock_wdtcon(); PLL_CLC.bits.VCOBYP = 1; /* wait for BYPASS mode */ while (!PLL_CLC.bits.VCOBYP) ; /* write new control value */ PLL_CLC = pllclc; lock_wdtcon(); /* wait for stable VCO frequency */ while (!PLL_CLC.bits.LOCK) ; /* leave VCO BYPASS mode */ unlock_wdtcon(); PLL_CLC.bits.VCOBYP = 0; lock_wdtcon(); }
void GPTA::init(uint32_t frequency) { uint32_t f_sys = SystemFrequency::Instance().sysFrequency(); m_iFreq = frequency; /* * all this isync'ing and dsync'ing is most * probably too much, but at least one of those * is needed to make it run from flash, and i * don't have the nerve to test which one... * all works fine without them when running from * external ram... */ unlock_wdtcon(); _isync(); _dsync(); GPTA0_CLC.bits.DISR = 0; _isync(); _dsync(); GPTA0_FDR.bits.DM = 1; // fdr normal mode _isync(); _dsync(); GPTA0_FDR.bits.STEP = 1024 - f_sys / frequency; _isync(); _dsync(); lock_wdtcon(); }
unsigned int get_cpu_frequency(void) { unsigned int frequency; unsigned int fpidiv; SCU_PLLCON0_t_nonv pllcon0; SCU_PLLCON1_t_nonv pllcon1; SCU_PLLSTAT_t_nonv pllstat; if (!freq_init) { set_cpu_frequency(); #ifdef ENABLE_ICACHE /* enable instruction cache (PMI_CON0) */ unlock_wdtcon(); PMI_CON0.bits.PCBYP = 0; lock_wdtcon(); #endif /* ENABLE_ICACHE */ } pllcon0 = SCU_PLLCON0; pllcon1 = SCU_PLLCON1; pllstat = SCU_PLLSTAT; /* read FPI divider value */ fpidiv = SCU_CCUCON0.bits.FPIDIV; if (pllstat.bits.VCOBYST) { /* prescaler mode */ unsigned int k_div; k_div = pllcon1.bits.K1DIV + 1; frequency = DEF_FRQ / k_div; } else if (pllstat.bits.FINDIS) { /* freerunning mode */ unsigned int k_div; k_div = pllcon1.bits.K2DIV + 1; frequency = VCOBASE_FREQ / k_div; } else { /* normal mode */ unsigned int k_div, n_div, p_div; n_div = pllcon0.bits.NDIV + 1; p_div = pllcon0.bits.PDIV + 1; k_div = pllcon1.bits.K2DIV + 1; frequency = DEF_FRQ * n_div / (k_div * p_div); } frequency /= (fpidiv + 1); return frequency; }
unsigned int get_cpu_frequency(void) { unsigned int frequency; PLL_CLC_t_nonv pllclc; #ifdef __USE_USB__ SCU_CON_t_nonv scucon; #endif /* __USE_USB__ */ if (!freq_init) { #ifdef __USE_USB__ /* prepare SCU_CON for USB */ scucon = SCU_CON; scucon.bits.USBCLDIV = (SYS_CFG_USB_CLK_DIVISOR - 1); scucon.bits.USBCLSEL = 3; #endif /* __USE_USB__ */ /* set speed to selected clock frequency */ set_cpu_frequency(); #if defined(__USE_USB__) || defined(ENABLE_ICACHE) unlock_wdtcon(); #ifdef __USE_USB__ SCU_CON = scucon; #endif /* __USE_USB__ */ #ifdef ENABLE_ICACHE /* enable instruction cache (PMI_CON0) */ PMI_CON0.bits.CCBYP = 0; #endif /* ENABLE_ICACHE */ lock_wdtcon(); #endif /* __USE_USB__ || ENABLE_ICACHE */ } pllclc = PLL_CLC; if (pllclc.bits.BYPPIN) { frequency = DEF_FRQ; } else { unsigned int k_div, n_div, p_div; n_div = pllclc.bits.NDIV + 1; k_div = pllclc.bits.KDIV + 1; p_div = pllclc.bits.PDIV + 1; frequency = DEF_FRQ * n_div / (k_div * p_div); } if (!(pllclc.bits.SYSFSL)) frequency /= 2; return frequency; }
xComPortHandle xSerialPortInitMinimal( unsigned long ulWantedBaud, unsigned portBASE_TYPE uxQueueLength ) { unsigned long ulReloadValue = 0UL; ulReloadValue = ( configPERIPHERAL_CLOCK_HZ / ( 48UL * ulWantedBaud ) ) - 1UL; if( NULL == xSerialTransmitQueue ) { xSerialTransmitQueue = xQueueCreate( uxQueueLength, sizeof( char ) ); xSerialReceiveQueue = xQueueCreate( uxQueueLength, sizeof( char ) ); } /* Enable ASC0 Module. */ unlock_wdtcon(); { while ( 0 != ( WDT_CON0.reg & 0x1UL ) ); ASC0_CLC.reg = 0x0200UL; } lock_wdtcon(); /* Disable the Operation. */ ASC0_CON.reg &= 0xFFFF7FFF; /* Set-up the GPIO Ports. */ P3_IOCR0.reg = 0x00009000; /* 3.0 ASC In, 3.1 Alt ASC Out */ /* Write the baud rate. */ ASC0_BG.reg = ulReloadValue; /* Reconfigure and re-initialise the Operation. */ ASC0_PISEL.reg = 0UL; ASC0_CON.reg = 0UL; ASC0_CON.bits.M = 0x01; /* 8bit async. */ ASC0_CON.bits.REN = 0x01; /* Receiver enabled. */ ASC0_CON.bits.FDE = 0x01; /* Fractional divider enabled. */ ASC0_CON.bits.BRS = 0x01; /* Divide by three. */ ASC0_CON.bits.LB = 0x01; /* Loopback enabled. */ ASC0_CON.bits.R = 0x01; /* Enable the baud rate generator. */ /* Install the Tx interrupt. */ if( 0 != _install_int_handler( configINTERRUPT_PRIORITY_TX, prvTxBufferInterruptHandler, 0 ) ) { ASC0_TBSRC.reg = configINTERRUPT_PRIORITY_TX | 0x5000UL; xTransmitStatus = 0UL; } /* Install the Rx interrupt. */ if( 0 != _install_int_handler( configINTERRUPT_PRIORITY_RX, prvRxInterruptHandler, 0 ) ) { ASC0_RSRC.reg = configINTERRUPT_PRIORITY_RX | 0x5000UL; } /* COM Handle is never used by demo code. */ return (xComPortHandle) pdPASS; }
void _init_uart(int baudrate) { unsigned int frequency, reload_value, fdv; unsigned int dfreq; /* initialize vector and trap tables */ _init_vectab(); /* Install handlers for transmit and receive interrupts. */ _install_int_handler(XMIT_INTERRUPT, (void (*) (int)) _uart_tx_handler, 0); _install_int_handler(RECV_INTERRUPT, (void (*) (int)) _uart_rx_handler, 0); /* Set TXD to "output" and "high" */ /* set P3.1 to output and high */ port->IOCR0.bits.PC1 = OUT_PPALT1; port->OMR.bits.PS1 = 1; /* Compute system frequency and reload value for ASC0 */ frequency = get_cpu_frequency(); if (baudrate <= 0) baudrate = BAUDRATE; /* reload_value = fdv/512 * freq/16/baudrate -1 ==> reload_value = (512*freq)/(baudrate * 512*16) - 1 fdv = (reload_value + 1) * (baudrate*512*16/freq) reload_value = (frequency / 32) / BAUDRATE - 1; */ reload_value = (frequency / (baudrate * 16)) - 1; dfreq = frequency / (16*512); fdv = (reload_value + 1) * (unsigned int)baudrate / dfreq; /* Enable ASCn */ unlock_wdtcon(); asc->CLC.bits.RMC = 1; asc->CLC.bits.DISR = 0; lock_wdtcon(); /* Program ASCn */ asc->CON.reg = 0; asc->BG.reg = reload_value; asc->FDV.reg = fdv; asc->TSRC.reg = ASCn_TSRC_SRE_MASK | XMIT_INTERRUPT; asc->RSRC.reg = ASCn_RSRC_SRE_MASK | RECV_INTERRUPT; asc->CON.bits.M = ASCM_8ASYNC; asc->CON.bits.R = 1; asc->CON.bits.REN = 1; asc->CON.bits.FDE = 1; }
void _init_uart(int baudrate) { unsigned int frequency, reload_value, fdv; unsigned int dfreq; /* Set TXD to "output" and "high" */ /* set P5.1 to output and high */ port->IOCR0.bits.PC1 = OUT_PPALT1; port->OMR.bits.PS1 = 1; /* Compute system frequency and reload value for ASC0 */ frequency = get_cpu_frequency(); if (baudrate <= 0) baudrate = BAUDRATE; /* reload_value = fdv/512 * freq/16/baudrate -1 ==> reload_value = (512*freq)/(baudrate * 512*16) - 1 fdv = (reload_value + 1) * (baudrate*512*16/freq) reload_value = (frequency / 32) / BAUDRATE - 1; */ reload_value = (frequency / (baudrate * 16)) - 1; dfreq = frequency / (16*512); fdv = (reload_value + 1) * (unsigned int)baudrate / dfreq; /* Enable ASC0 */ unlock_wdtcon(); asc->CLC.bits.RMC = 1; asc->CLC.bits.DISR = 0; lock_wdtcon(); /* Program ASC0 */ asc->CON.reg = 0; asc->BG.reg = reload_value; asc->FDV.reg = fdv; asc->CON.bits.M = ASCM_8ASYNC; asc->CON.bits.R = 1; asc->CON.bits.REN = 1; asc->CON.bits.FDE = 1; START_TX; }
static void prvSetupTimerInterrupt( void ) { /* Set-up the clock divider. */ unlock_wdtcon(); { /* Wait until access to Endint protected register is enabled. */ while( 0 != ( WDT_CON0.reg & 0x1UL ) ); /* RMC == 1 so STM Clock == FPI */ STM_CLC.reg = ( 1UL << 8 ); } lock_wdtcon(); /* Determine how many bits are used without changing other bits in the CMCON register. */ STM_CMCON.reg &= ~( 0x1fUL ); STM_CMCON.reg |= ( 0x1fUL - __CLZ( configPERIPHERAL_CLOCK_HZ / configTICK_RATE_HZ ) ); /* Take into account the current time so a tick doesn't happen immediately. */ STM_CMP0.reg = ulCompareMatchValue + STM_TIM0.reg; if( 0 != _install_int_handler( configKERNEL_INTERRUPT_PRIORITY, prvSystemTickHandler, 0 ) ) { /* Set-up the interrupt. */ STM_SRC0.reg = ( configKERNEL_INTERRUPT_PRIORITY | 0x00005000UL ); /* Enable the Interrupt. */ STM_ISRR.reg &= ~( 0x03UL ); STM_ISRR.reg |= 0x1UL; STM_ISRR.reg &= ~( 0x07UL ); STM_ICR.reg |= 0x1UL; } else { /* Failed to install the Tick Interrupt. */ configASSERT( ( ( volatile void * ) NULL ) ); } }
void set_cpu_frequency(void) { SCU_PLLCON0_t_nonv pllcon0; SCU_PLLCON1_t_nonv pllcon1; if (freq_init) { return; } freq_init = 1; /* check whether we are already running at desired clockrate */ pllcon0 = SCU_PLLCON0; pllcon1 = SCU_PLLCON1; if ( ((SYS_CFG_NDIV - 1) == pllcon0.bits.NDIV) && ((SYS_CFG_PDIV - 1) == pllcon0.bits.PDIV) && ((SYS_CFG_K1DIV - 1) == pllcon1.bits.K1DIV) && ((SYS_CFG_K2DIV - 1) == pllcon1.bits.K2DIV) && SCU_PLLSTAT.bits.VCOLOCK) { return; } if (!SCU_PLLSTAT.bits.PWDSTAT) { /* set speed to 180 MHz with 20MHz Crystal */ pllcon0.reg = 0; pllcon1.reg = 0; pllcon0.bits.NDIV = SYS_CFG_NDIV - 1; pllcon0.bits.PDIV = SYS_CFG_PDIV - 1; pllcon1.bits.K2DIV = SYS_CFG_K2DIV - 1; pllcon1.bits.K1DIV = SYS_CFG_K1DIV - 1; pllcon0.bits.VCOBYP = 1; pllcon0.bits.CLRFINDIS = 1; pllcon0.bits.PLLPWD = 1; pllcon0.bits.RESLD = 1; unlock_wdtcon(); /* FPI at half CPU speed */ SCU_CCUCON0.reg = 1; /* force prescaler mode */ SCU_PLLCON0.bits.VCOBYP = 1; /* wait for prescaler mode */ while (!SCU_PLLSTAT.bits.VCOBYST) ; /* write new control values */ SCU_PLLCON1 = pllcon1; SCU_PLLCON0 = pllcon0; lock_wdtcon(); /* wait for stable VCO frequency */ while (!SCU_PLLSTAT.bits.VCOLOCK) ; unlock_wdtcon(); /* leave prescaler mode */ SCU_PLLCON0.bits.VCOBYP = 0; lock_wdtcon(); } }