/** * Specify vertex buffers for hardware drawing. */ void svga_hwtnl_vertex_buffers(struct svga_hwtnl *hwtnl, unsigned count, struct pipe_vertex_buffer *buffers) { util_set_vertex_buffers_count(hwtnl->cmd.vbufs, &hwtnl->cmd.vbuf_count, buffers, 0, count); }
static void nvc0_set_vertex_buffers(struct pipe_context *pipe, unsigned start_slot, unsigned count, const struct pipe_vertex_buffer *vb) { struct nvc0_context *nvc0 = nvc0_context(pipe); unsigned i; util_set_vertex_buffers_count(nvc0->vtxbuf, &nvc0->num_vtxbufs, vb, start_slot, count); if (!vb) { nvc0->vbo_user &= ~(((1ull << count) - 1) << start_slot); nvc0->constant_vbos &= ~(((1ull << count) - 1) << start_slot); return; } for (i = 0; i < count; ++i) { unsigned dst_index = start_slot + i; if (vb[i].user_buffer) { nvc0->vbo_user |= 1 << dst_index; if (!vb[i].stride && nvc0->screen->eng3d->oclass < GM107_3D_CLASS) nvc0->constant_vbos |= 1 << dst_index; else nvc0->constant_vbos &= ~(1 << dst_index); } else { nvc0->vbo_user &= ~(1 << dst_index); nvc0->constant_vbos &= ~(1 << dst_index); } } nvc0->dirty |= NVC0_NEW_ARRAYS; nouveau_bufctx_reset(nvc0->bufctx_3d, NVC0_BIND_VTX); }
void draw_set_vertex_buffers(struct draw_context *draw, unsigned start_slot, unsigned count, const struct pipe_vertex_buffer *buffers) { assert(start_slot + count <= PIPE_MAX_ATTRIBS); util_set_vertex_buffers_count(draw->pt.vertex_buffer, &draw->pt.nr_vertex_buffers, buffers, start_slot, count); }
static void svga_set_vertex_buffers(struct pipe_context *pipe, unsigned start_slot, unsigned count, const struct pipe_vertex_buffer *buffers) { struct svga_context *svga = svga_context(pipe); util_set_vertex_buffers_count(svga->curr.vb, &svga->curr.num_vertex_buffers, buffers, start_slot, count); svga->dirty |= SVGA_NEW_VBUFFER; }
static void nv30_set_vertex_buffers(struct pipe_context *pipe, unsigned start_slot, unsigned count, const struct pipe_vertex_buffer *vb) { struct nv30_context *nv30 = nv30_context(pipe); nouveau_bufctx_reset(nv30->bufctx, BUFCTX_VTXBUF); util_set_vertex_buffers_count(nv30->vtxbuf, &nv30->num_vtxbufs, vb, start_slot, count); nv30->dirty |= NV30_NEW_ARRAYS; }
static void i915_set_vertex_buffers(struct pipe_context *pipe, unsigned start_slot, unsigned count, const struct pipe_vertex_buffer *buffers) { struct i915_context *i915 = i915_context(pipe); struct draw_context *draw = i915->draw; util_set_vertex_buffers_count(i915->vertex_buffers, &i915->nr_vertex_buffers, buffers, start_slot, count); /* pass-through to draw module */ draw_set_vertex_buffers(draw, start_slot, count, buffers); }
static void softpipe_set_vertex_buffers(struct pipe_context *pipe, unsigned start_slot, unsigned count, const struct pipe_vertex_buffer *buffers) { struct softpipe_context *softpipe = softpipe_context(pipe); assert(count <= PIPE_MAX_ATTRIBS); util_set_vertex_buffers_count(softpipe->vertex_buffer, &softpipe->num_vertex_buffers, buffers, start_slot, count); softpipe->dirty |= SP_NEW_VERTEX; draw_set_vertex_buffers(softpipe->draw, start_slot, count, buffers); }
static void nv50_set_vertex_buffers(struct pipe_context *pipe, unsigned start_slot, unsigned count, const struct pipe_vertex_buffer *vb) { struct nv50_context *nv50 = nv50_context(pipe); unsigned i; nouveau_bufctx_reset(nv50->bufctx_3d, NV50_BIND_3D_VERTEX); nv50->dirty_3d |= NV50_NEW_3D_ARRAYS; util_set_vertex_buffers_count(nv50->vtxbuf, &nv50->num_vtxbufs, vb, start_slot, count); if (!vb) { nv50->vbo_user &= ~(((1ull << count) - 1) << start_slot); nv50->vbo_constant &= ~(((1ull << count) - 1) << start_slot); nv50->vtxbufs_coherent &= ~(((1ull << count) - 1) << start_slot); return; } for (i = 0; i < count; ++i) { unsigned dst_index = start_slot + i; if (!vb[i].buffer && vb[i].user_buffer) { nv50->vbo_user |= 1 << dst_index; if (!vb[i].stride) nv50->vbo_constant |= 1 << dst_index; else nv50->vbo_constant &= ~(1 << dst_index); nv50->vtxbufs_coherent &= ~(1 << dst_index); } else { nv50->vbo_user &= ~(1 << dst_index); nv50->vbo_constant &= ~(1 << dst_index); if (vb[i].buffer && vb[i].buffer->flags & PIPE_RESOURCE_FLAG_MAP_COHERENT) nv50->vtxbufs_coherent |= (1 << dst_index); else nv50->vtxbufs_coherent &= ~(1 << dst_index); } } }