void vPortSysTickHandler( void * context, alt_u32 id ) { /* Increment the Kernel Tick. */ vTaskIncrementTick(); /* If using preemption, also force a context switch. */ #if configUSE_PREEMPTION == 1 vTaskSwitchContext(); #endif /* Clear the interrupt. */ IOWR_ALTERA_AVALON_TIMER_STATUS( SYS_CLK_BASE, ~ALTERA_AVALON_TIMER_STATUS_TO_MSK ); }
/* This function is called from an asm wrapper, so does not require the __irq keyword. */ void vPortPreemptiveTick( void ) { /* Increment the tick counter. */ if( xTaskIncrementTick() != pdFALSE ) { /* Select a new task to execute. */ vTaskSwitchContext(); } /* Clear the interrupt in the watchdog and EIC. */ WDG->SR = 0x0000; portCLEAR_EIC(); }
void vPortYieldFromTick( void ) { portSAVE_CONTEXT(); if( xTaskIncrementTick() != pdFALSE ) { vTaskSwitchContext(); } portRESTORE_CONTEXT(); __asm__ __volatile__ ( "ret" ); }
interrupt (TIMERA0_VECTOR) prvTickISR( void ) { /* Save the context of the interrupted task. */ portSAVE_CONTEXT(); /* Increment the tick count then switch to the highest priority task that is ready to run. */ vTaskIncrementTick(); vTaskSwitchContext(); /* Restore the context of the new task. */ portRESTORE_CONTEXT(); }
static void prvPortPreemptiveTick( void ) { asm volatile ( "move.w #0x2700, %sr\n\t" ); #if _GCC_USES_FP == 1 asm volatile ( "unlk %fp\n\t" ); #endif portSAVE_CONTEXT( ); MCF_PIT_PCSR0 |= MCF_PIT_PCSR_PIF; vTaskIncrementTick( ); vTaskSwitchContext( ); portRESTORE_CONTEXT( ); }
void WDG_IRQHandler( void ) { { /* Increment the tick counter. */ if( xTaskIncrementTick() != pdFALSE ) { /* Select a new task to execute. */ vTaskSwitchContext(); } /* Clear the interrupt in the watchdog. */ WDG->SR &= ~0x0001; } }
/* This function is called from an asm wrapper, so does not require the __irq keyword. */ void vPortPreemptiveTick( void ) { /* Increment the tick counter. */ vTaskIncrementTick(); /* The new tick value might unblock a task. Ensure the highest task that is ready to execute is the task that will execute when the tick ISR exits. */ vTaskSwitchContext(); /* Clear the interrupt in the watchdog and EIC. */ WDG->SR = 0x0000; portCLEAR_EIC(); }
__arm void vPortPreemptiveTick( void ) { /* Increment the tick counter. */ vTaskIncrementTick(); /* The new tick value might unblock a task. Ensure the highest task that is ready to execute is the task that will execute when the tick ISR exits. */ #if configUSE_PREEMPTION == 1 vTaskSwitchContext(); #endif TB_ClearITPendingBit( TB_IT_Update ); }
/* * This is the TICK interrupt service routine, note. no SAVE/RESTORE_CONTEXT here * as thats done in the bottom-half of the ISR. * * See bt_interrupts.c in the RaspberryPi Drivers folder. */ void vTickISR(int nIRQ, void *pParam ) { /* unused parameters*/ (void) nIRQ; (void) pParam; xTaskIncrementTick(); #if configUSE_PREEMPTION == 1 vTaskSwitchContext(); #endif pRegs->CLI = 0; // Acknowledge the timer interrupt. }
void vPortPreemptiveTick( void ) { /* Increment the tick counter. */ vTaskIncrementTick(); /* The new tick value might unblock a task. Ensure the highest task that is ready to execute is the task that will execute when the tick ISR exits. */ vTaskSwitchContext(); /* Ready for the next interrupt. */ T0IR = portTIMER_MATCH_ISR_BIT; VICVectAddr = portCLEAR_VIC_INTERRUPT; }
void vPortSystemTickHandler( int sig ) { pthread_t xTaskToSuspend; pthread_t xTaskToResume; (void)(sig); if ( ( pdTRUE == xInterruptsEnabled ) && ( pdTRUE != xServicingTick ) ) { if ( 0 == pthread_mutex_trylock( &xSingleThreadMutex ) ) { xServicingTick = pdTRUE; xTaskToSuspend = prvGetThreadHandle( xTaskGetCurrentTaskHandle() ); /* Tick Increment. */ xTaskIncrementTick(); /* Select Next Task. */ #if ( configUSE_PREEMPTION == 1 ) vTaskSwitchContext(); #endif xTaskToResume = prvGetThreadHandle( xTaskGetCurrentTaskHandle() ); /* The only thread that can process this tick is the running thread. */ if ( xTaskToSuspend != xTaskToResume ) { /* Remember and switch the critical nesting. */ prvSetTaskCriticalNesting( xTaskToSuspend, uxCriticalNesting ); uxCriticalNesting = prvGetTaskCriticalNesting( xTaskToResume ); /* Resume next task. */ prvResumeThread( xTaskToResume ); /* Suspend the current task. */ prvSuspendThread( xTaskToSuspend ); } else { /* Release the lock as we are Resuming. */ (void)pthread_mutex_unlock( &xSingleThreadMutex ); } xServicingTick = pdFALSE; } else { xPendYield = pdTRUE; } } else { xPendYield = pdTRUE; } }
/* * See header file for description. */ portBASE_TYPE xPortStartScheduler( void ) { _xt_isr_attach(INUM_SOFT, SV_ISR); _xt_isr_unmask(BIT(INUM_SOFT)); /* Initialize system tick timer interrupt and schedule the first tick. */ sdk__xt_tick_timer_init(); vTaskSwitchContext(); sdk__xt_int_exit(); /* Should not get here as the tasks are now running! */ return pdTRUE; }
void TIM2_IRQHandler( void ) { /* Reset the timer counter to avioid overflow. */ TIM2->OC1R += s_nPulseLength; /* Increment the tick counter. */ if( xTaskIncrementTick() != pdFALSE ) { /* Select a new task to run. */ vTaskSwitchContext(); } /* Clear the interrupt in the watchdog. */ TIM2->SR &= ~TIM_FLAG_OC1; }
void prvTickISR( void ) { /* Save the context of the interrupted task. */ portSAVE_CONTEXT(); /* Increment the tick count then switch to the highest priority task that is ready to run. */ if( xTaskIncrementTick() != pdFALSE ) { vTaskSwitchContext(); } /* Restore the context of the new task. */ portRESTORE_CONTEXT(); }
/* * Called by portYIELD() or taskYIELD() to manually force a context switch. */ static void prvPortYield( void ) { asm volatile ( "move.w #0x2700, %sr\n\t" ); #if _GCC_USES_FP == 1 asm volatile ( "unlk %fp\n\t" ); #endif /* Perform the context switch. First save the context of the current task. */ portSAVE_CONTEXT( ); /* Find the highest priority task that is ready to run. */ vTaskSwitchContext( ); /* Restore the context of the new task. */ portRESTORE_CONTEXT( ); }
/* * Manual context switch. This is similar to the tick context switch, * but does not increment the tick count. It must be identical to the * tick context switch in how it stores the stack of a task. */ void vPortYield( void ) { /* This can get called with interrupts either enabled or disabled. We will save the INTCON register with the interrupt enable bits unmodified. */ Nop(); Nop(); portSAVE_CONTEXT( portINTERRUPTS_UNCHANGED ); Nop(); Nop(); /* Switch to the highest priority task that is ready to run. */ vTaskSwitchContext(); /* Start executing the task we have just switched to. */ portRESTORE_CONTEXT(); }
/* * Called by portYIELD() or taskYIELD() to manually force a context switch. * * When a context switch is performed from the task level the saved task * context is made to look as if it occurred from within the tick ISR. This * way the same restore context function can be used when restoring the context * saved from the ISR or that saved from a call to vPortYieldProcessor. */ void vPortYieldProcessor( void ) { /* Within an IRQ ISR the link register has an offset from the true return address, but an SWI ISR does not. Add the offset manually so the same ISR return code can be used in both cases. */ __asm volatile ( "ADD LR, LR, #4" ); /* Perform the context switch. First save the context of the current task. */ portSAVE_CONTEXT(); /* Find the highest priority task that is ready to run. */ vTaskSwitchContext();//__asm volatile ( "bl vTaskSwitchContext" ); /* Restore the context of the new task. */ portRESTORE_CONTEXT(); }
void vPortForciblyEndThread( void *pxTaskToDelete ) { xTaskHandle hTaskToDelete = ( xTaskHandle )pxTaskToDelete; pthread_t xTaskToDelete; pthread_t xTaskToResume; portBASE_TYPE xResult; if ( 0 == pthread_mutex_lock( &xSingleThreadMutex ) ) { xTaskToDelete = prvGetThreadHandle( hTaskToDelete ); xTaskToResume = prvGetThreadHandle( xTaskGetCurrentTaskHandle() ); if ( xTaskToResume == xTaskToDelete ) { /* This is a suicidal thread, need to select a different task to run. */ vTaskSwitchContext(); xTaskToResume = prvGetThreadHandle( xTaskGetCurrentTaskHandle() ); } if ( pthread_self() != xTaskToDelete ) { /* Cancelling a thread that is not me. */ if ( xTaskToDelete != ( pthread_t )NULL ) { /* Send a signal to wake the task so that it definitely cancels. */ pthread_testcancel(); xResult = pthread_cancel( xTaskToDelete ); if (xResult) printf("pthread_cancel error!\n"); /* Pthread Clean-up function will note the cancellation. */ } (void)pthread_mutex_unlock( &xSingleThreadMutex ); } else { /* Resume the other thread. */ prvResumeThread( xTaskToResume ); /* Pthread Clean-up function will note the cancellation. */ /* Release the execution. */ uxCriticalNesting = 0; vPortEnableInterrupts(); (void)pthread_mutex_unlock( &xSingleThreadMutex ); /* Commit suicide */ pthread_exit( (void *)1 ); } } }
void vPreemptiveTick( void ) { /* Save the context of the current task. */ portSAVE_CONTEXT(); /* Increment the tick count - this may wake a task. */ if( xTaskIncrementTick() != pdFALSE ) { /* Find the highest priority task that is ready to run. */ vTaskSwitchContext(); } /* End the interrupt in the AIC. */ AT91C_BASE_AIC->AIC_EOICR = AT91C_BASE_PITC->PITC_PIVR; portRESTORE_CONTEXT(); }
static void prvTrapYield( int iTrapIdentification ) { uint32_t *pxUpperCSA = NULL; uint32_t xUpperCSA = 0UL; extern volatile uint32_t *pxCurrentTCB; switch( iTrapIdentification ) { case portSYSCALL_TASK_YIELD: /* Save the context of a task. The upper context is automatically saved when entering a trap or interrupt. Need to save the lower context as well and copy the PCXI CSA ID into pxCurrentTCB->pxTopOfStack. Only Lower Context CSA IDs may be saved to the TCB of a task. Call vTaskSwitchContext to select the next task, note that this changes the value of pxCurrentTCB so that it needs to be reloaded. Call vPortSetMPURegisterSetOne to change the MPU mapping for the task that has just been switched in. Load the context of the task. Need to restore the lower context by loading the CSA from pxCurrentTCB->pxTopOfStack into PCXI (effectively changing the call stack). In the Interrupt handler post-amble, RSLCX will restore the lower context of the task. RFE will restore the upper context of the task, jump to the return address and restore the previous state of interrupts being enabled/disabled. */ _disable(); _dsync(); xUpperCSA = _mfcr( $PCXI ); pxUpperCSA = portCSA_TO_ADDRESS( xUpperCSA ); *pxCurrentTCB = pxUpperCSA[ 0 ]; vTaskSwitchContext(); pxUpperCSA[ 0 ] = *pxCurrentTCB; CPU_SRC0.bits.SETR = 0; _isync(); break; default: /* Unimplemented trap called. */ configASSERT( ( ( volatile void * ) NULL ) ); break; } }
void vPortYield( void ) { /* We want the stack of the task being saved to look exactly as if the task was saved during a pre-emptive RTOS tick ISR. Before calling an ISR the msp430 places the status register onto the stack. As this is a function call and not an ISR we have to do this manually. */ asm volatile ( "push r2" ); _DINT(); /* Save the context of the current task. */ portSAVE_CONTEXT(); /* Switch to the highest priority task that is ready to run. */ vTaskSwitchContext(); /* Restore the context of the new task. */ portRESTORE_CONTEXT(); }
void WDG_IRQHandler( void ) { { /* Increment the tick counter. */ vTaskIncrementTick(); #if configUSE_PREEMPTION == 1 { /* The new tick value might unblock a task. Ensure the highest task that is ready to execute is the task that will execute when the tick ISR exits. */ vTaskSwitchContext(); } #endif /* configUSE_PREEMPTION. */ /* Clear the interrupt in the watchdog. */ WDG->SR &= ~0x0001; } }
void vPortPreemptiveTick( void ) { /* Save the context of the interrupted task. */ portSAVE_CONTEXT(); /* Increment the RTOS tick count, then look for the highest priority * task that is ready to run. */ vTaskIncrementTick(); vTaskSwitchContext(); /* Clear the interrupt in the watchdog and EIC. */ WDG->SR = 0x0000; /* clear current interrupt pending flag for interupt source. */ EIC->IPR |= 1 << EIC_CurrentIRQChannelValue(); /* Restore the context of the new task. */ portRESTORE_CONTEXT(); }
static __arm void vPortTickISR( void ) { volatile unsigned long ulDummy; /* Increment the tick count - which may wake some tasks but as the preemptive scheduler is not being used any woken task is not given processor time no matter what its priority. */ if( xTaskIncrementTick() != pdFALSE ) { vTaskSwitchContext(); } /* Clear the PIT interrupt. */ ulDummy = AT91C_BASE_PITC->PITC_PIVR; /* To remove compiler warning. */ ( void ) ulDummy; /* The AIC is cleared in the asm wrapper, outside of this function. */ }
void vPortYieldFromTick( void ) { portSAVE_CONTEXT(); if (--ticksRemainingInSec == 0) { system_tick(); ticksRemainingInSec = portTickRateHz; } if( xTaskIncrementTick() != pdFALSE ) { vTaskSwitchContext(); } portRESTORE_CONTEXT(); asm volatile ( "ret" ); }
void TIM2_IRQHandler( void ) { /* Reset the timer counter to avioid overflow. */ TIM2->OC1R += s_nPulseLength; /* Increment the tick counter. */ vTaskIncrementTick(); #if configUSE_PREEMPTION == 1 { /* The new tick value might unblock a task. Ensure the highest task that is ready to execute is the task that will execute when the tick ISR exits. */ vTaskSwitchContext(); } #endif /* Clear the interrupt in the watchdog. */ TIM2->SR &= ~TIM_FLAG_OC1; }
static void prvTimerInterrupt(unsigned int intrLevel, void *pContext) { Timer_t *pISRTimer = (Timer_t *)pContext; #if configUSE_PREEMPTION == 1 /* * Tick ISR for preemptive scheduler. */ vTaskIncrementTick(); vTaskSwitchContext(); #else /* * Tick ISR for the cooperative scheduler. All this does is increment the * tick count. We don't need to switch context, this can only be done by * manual calls to taskYIELD(); */ vTaskIncrementTick(); #endif /* Clear Timer Status */ pISRTimer->Status = 0; }
static void prvInterruptYield( int iId ) { unsigned long *pxUpperCSA = NULL; unsigned long xUpperCSA = 0UL; extern volatile unsigned long *pxCurrentTCB; /* Just to remove compiler warnings. */ ( void ) iId; /* Save the context of a task. The upper context is automatically saved when entering a trap or interrupt. Need to save the lower context as well and copy the PCXI CSA ID into pxCurrentTCB->pxTopOfStack. Only Lower Context CSA IDs may be saved to the TCB of a task. Call vTaskSwitchContext to select the next task, note that this changes the value of pxCurrentTCB so that it needs to be reloaded. Call vPortSetMPURegisterSetOne to change the MPU mapping for the task that has just been switched in. Load the context of the task. Need to restore the lower context by loading the CSA from pxCurrentTCB->pxTopOfStack into PCXI (effectively changing the call stack). In the Interrupt handler post-amble, RSLCX will restore the lower context of the task. RFE will restore the upper context of the task, jump to the return address and restore the previous state of interrupts being enabled/disabled. */ _disable(); _dsync(); xUpperCSA = _mfcr( $PCXI ); pxUpperCSA = portCSA_TO_ADDRESS( xUpperCSA ); *pxCurrentTCB = pxUpperCSA[ 0 ]; vTaskSwitchContext(); pxUpperCSA[ 0 ] = *pxCurrentTCB; CPU_SRC0.bits.SETR = 0; _isync(); }
static void ituIrqHandler(void *context) { a++; ioWrite8(ITU_USB_BUSY, a & 1); static uint8_t pending; pending = ioRead8(ITU_IRQ_ACTIVE); ioWrite8(ITU_IRQ_CLEAR, pending); BaseType_t do_switch = pdFALSE; /* if (pending & 0x20) { RmiiRxInterruptHandler(); do_switch = pdTRUE; } if (pending & 0x10) { do_switch = command_interface_irq(); } if (pending & 0x08) { do_switch |= tape_recorder_irq(); } if (pending & 0x04) { do_switch |= usb_irq(); } if (pending & 0x02) { do_switch |= uart_irq(); } */ if (pending & 0x01) { do_switch |= xTaskIncrementTick(); } if (do_switch != pdFALSE) { vTaskSwitchContext(); } }
/* * The ISR used for the scheduler tick. */ void vTickISR( void ) { //printf("\nInside timer ISR\n"); /* Save LR. Make sure we will be able to go back to the IRQ handler */ __asm volatile("push {lr} \n\t"); /* Increment the RTOS tick count, then look for the highest priority task that is ready to run. */ vTaskIncrementTick();//__asm volatile("bl vTaskIncrementTick"); #if configUSE_PREEMPTION == 1 vTaskSwitchContext();//__asm volatile("bl vTaskSwitchContext"); #endif /* Ready for the next interrupt. * Reset the timer. Clear the interrupts * Writing any value to TTGR register makes GPTimer1 * reloads to the value stored in TLDR * TRM: 2599 * Clear the interrupts * Page: 1060 */ /* Make sure mask is correct after handling the IRQ */ (*(REG32(GPTI1 + GPTI_TISR))) = 0x1; // clear Match interrupt (*(REG32(GPTI1 + GPTI_TTGR))) = 0xFF; // reset timer (*(REG32(MPU_INTC + INTCPS_CONTROL))) = 0x1; //printf("\nInside timer ISR, exit\n"); __asm volatile("pop {lr} \n\t"); }