static void mainboard_init(void *chip_info) { const struct pad_config *pads; size_t num; pads = variant_gpio_table(&num); gpio_configure_pads(pads, num); }
static void mainboard_init(void *chip_info) { int boardid; const struct pad_config *pads; size_t num; boardid = board_id(); printk(BIOS_INFO, "Board ID: %d\n", boardid); pads = variant_gpio_table(&num); gpio_configure_pads(pads, num); mainboard_ec_init(); }
static void mainboard_init(void *chip_info) { const struct sci_source *gpes; size_t num; int boardid = board_id(); size_t num_gpios; const struct soc_amd_gpio *gpios; printk(BIOS_INFO, "Board ID: %d\n", boardid); mainboard_ec_init(); gpios = variant_gpio_table(&num_gpios); sb_program_gpios(gpios, num_gpios); /* * Some platforms use SCI not generated by a GPIO pin (event above 23). * For these boards, gpe_configure_sci() is still needed, but all GPIO * generated events (23-0) must be removed from gpe_table[]. * For boards that only have GPIO generated events, table gpe_table[] * must be removed, and get_gpe_table() should return NULL. */ gpes = get_gpe_table(&num); if (gpes != NULL) gpe_configure_sci(gpes, num); /* Initialize i2c busses that were not initialized in bootblock */ i2c_soc_init(); /* Set GenIntDisable so that GPIO 90 is configured as a GPIO. */ pm_write8(PM_PCIB_CFG, pm_read8(PM_PCIB_CFG) | PM_GENINT_DISABLE); /* Set low-power mode for BayHub eMMC bridge's PCIe clock. */ clrsetbits_le32((uint32_t *)(MISC_MMIO_BASE + GPP_CLK_CNTRL), GPP_CLK2_REQ_MAP_MASK, GPP_CLK2_REQ_MAP_CLK_REQ2 << GPP_CLK2_REQ_MAP_SHIFT); /* Same for the WiFi */ clrsetbits_le32((uint32_t *)(MISC_MMIO_BASE + GPP_CLK_CNTRL), GPP_CLK0_REQ_MAP_MASK, GPP_CLK0_REQ_MAP_CLK_REQ0 << GPP_CLK0_REQ_MAP_SHIFT); }