/*
* cursor() sets an offset (0-1999) into the 80x25 text area
*/
static void
cursor(int x, int y)
{
int pos = console_global_data.cols*y + x;
vga_outb(14, 0x14);
vga_outb(0x15, pos>>8);
vga_outb(0x14, 15);
vga_outb(0x15, pos);
}
void vga_mode_set(const struct vga_regs* regs)
{
unsigned i;
vga_state.regs = *regs;
vga_regs_info_get(&vga_state.regs, &vga_state.info);
/* misc */
outportb(VGAREG_MISC_WRITE_DATA, regs->misc);
/* pel */
outportb(VGAREG_PEL_MASK, 0xFF);
/* sequencer reset on */
vga_outb(VGAREG_SEQ_ADDR, 0, 0x01);
/* sequencer */
for (i = 1; i < VGAREG_SEQ_MAX; ++i)
vga_outb(VGAREG_SEQ_ADDR, i, regs->seq[i]);
/* sequencer reset off */
vga_outb(VGAREG_SEQ_ADDR, 0, 0x03);
/* enable crtc */
vga_outb(VGAREG_CRTC_ADDR, 0x11, vga_inb(VGAREG_CRTC_ADDR, 0x11) & 0x7F);
/* crtc */
for (i = 0; i < VGAREG_CRTC_MAX; ++i)
vga_outb(VGAREG_CRTC_ADDR, i, regs->crtc[i]);
/* graphics controller */
for (i = 0; i < VGAREG_GRACON_MAX; ++i)
vga_outb(VGAREG_GRACON_ADDR, i, regs->gracon[i]);
/* attribute controller */
for (i = 0; i < VGAREG_ATTRCON_MAX; ++i)
vga_outb(VGAREG_ATTRCON_ADDR, i, regs->attrcon[i]);
}
