BYTE viacore_peek(via_context_t *via_context, WORD addr)
{
CLOCK rclk = *(via_context->clk_ptr);
addr &= 0xf;
if (via_context->tai && (via_context->tai <= *(via_context->clk_ptr)))
viacore_intt1(*(via_context->clk_ptr) - via_context->tai,
(void *)via_context);
if (via_context->tbi && (via_context->tbi <= *(via_context->clk_ptr)))
viacore_intt2(*(via_context->clk_ptr) - via_context->tbi,
(void *)via_context);
switch (addr) {
case VIA_PRA:
return viacore_read(via_context, VIA_PRA_NHS);
case VIA_PRB: /* port B */
{
BYTE byte;
#ifdef MYVIA_NEED_LATCHING
if (IS_PB_INPUT_LATCH()) {
byte = via_context->ilb;
} else {
byte = (via_context->read_prb)(via_context);
}
#else
byte = (via_context->read_prb)(via_context);
#endif
byte = (byte & ~(via_context->via[VIA_DDRB]))
| (via_context->via[VIA_PRB] & via_context->via[VIA_DDRB]);
if (via_context->via[VIA_ACR] & 0x80) {
update_myviatal(via_context, rclk);
byte = (byte & 0x7f) | (((via_context->pb7 ^ via_context->pb7x)
| via_context->pb7o) ? 0x80 : 0);
}
return byte;
}
/* Timers */
case VIA_T1CL /*TIMER_AL */ : /* timer A low */
return (BYTE)(myviata(via_context) & 0xff);
case VIA_T2CL /*TIMER_BL */ : /* timer B low */
return (BYTE)(myviatb(via_context) & 0xff);
default:
break;
} /* switch */
return viacore_read(via_context, addr);
}
BYTE REGPARM1 via2_read(WORD addr)
{
return viacore_read(machine_context.via2, addr);
}
BYTE ieeevia2_read(WORD addr)
{
return viacore_read(machine_context.ieeevia2, addr);
}
BYTE via1d2031_read(drive_context_t *ctxptr, WORD addr)
{
return viacore_read(ctxptr->via1d2031, addr);
}
BYTE via_read(WORD addr)
{
return viacore_read(machine_context.via, addr);
}
